| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | adi,adin.yaml | 1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Ardelean <alexandru.ardelean@analog.com>
16 - $ref: ethernet-phy.yaml#
19 adi,rx-internal-delay-ps:
22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
26 adi,tx-internal-delay-ps:
29 internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
33 adi,fifo-depth-bits:
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| D | ti,dp83869.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-phy.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
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| D | ethernet-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
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| D | ethernet-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
16 local-mac-address:
19 $ref: /schemas/types.yaml#definitions/uint8-array
21 - minItems: 6
24 mac-address:
29 local-mac-address property.
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| /kernel/linux/linux-5.10/drivers/memory/ |
| D | jedec_ddr.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
64 /* Refresh rate in nano-seconds */
124 * All parameters are in pico seconds(ps) unless explicitly indicated
175 * All parameters are in pico seconds(ps) excluding max_freq, min_freq which
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-st.txt | 3 Each multi-function pin is controlled, driven and routed through the
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
28 [irqN]----> [gpio-bank (n)]
33 - compatible : should be "st,stih407-<pio-block>-pinctrl"
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-st.txt | 3 Each multi-function pin is controlled, driven and routed through the
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
28 [irqN]----> [gpio-bank (n)]
33 - compatible : should be "st,stih407-<pio-block>-pinctrl"
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ddr/ |
| D | lpddr2-timings.txt | 1 * AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin
4 - compatible : Should be "jedec,lpddr2-timings"
5 - min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
6 - max-freq : maximum DDR clock frequency for the speed-bin. Type is <u32>
11 data-sheet of the device for a given speed-bin. All these properties are
12 of type <u32> and the default unit is ps (pico seconds). Parameters with
13 a different unit have a suffix indicating the unit such as 'tRAS-max-ns'
14 - tRCD
15 - tWR
16 - tRAS-min
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| D | lpddr3-timings.txt | 1 * AC timing parameters of LPDDR3 memories for a given speed-bin.
6 - compatible : Should be "jedec,lpddr3-timings"
7 - min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
8 - reg : maximum DDR clock frequency for the speed-bin. Type is <u32>
13 data-sheet of the device for a given speed-bin. All these properties are
14 of type <u32> and the default unit is ps (pico seconds).
15 - tRFC
16 - tRRD
17 - tRPab
18 - tRPpb
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/lpddr2/ |
| D | lpddr2-timings.txt | 1 * AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin
4 - compatible : Should be "jedec,lpddr2-timings"
5 - min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
6 - max-freq : maximum DDR clock frequency for the speed-bin. Type is <u32>
11 data-sheet of the device for a given speed-bin. All these properties are
12 of type <u32> and the default unit is ps (pico seconds). Parameters with
13 a different unit have a suffix indicating the unit such as 'tRAS-max-ns'
14 - tRCD
15 - tWR
16 - tRAS-min
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| /kernel/linux/linux-4.19/include/memory/ |
| D | jedec_ddr.h | 66 /* Refresh rate in nano-seconds */
126 * All parameters are in pico seconds(ps) unless explicitly indicated
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/85xx/ |
| D | t1042rdb_diu.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
74 * @pixclock: pixel clock in ps (pico seconds)
84 scfg_np = of_find_compatible_node(NULL, NULL, "fsl,t1040-scfg"); in t1042rdb_set_pixel_clock()
107 * range of values is 2-255. in t1042rdb_set_pixel_clock()
112 /* Disable the pixel clock, and set it to non-inverted and no delay */ in t1042rdb_set_pixel_clock()
133 return FSL_DIU_PORT_DVI; /* Dual-link LVDS is not supported */ in t1042rdb_valid_monitor_port()
139 cpld_node = of_find_compatible_node(NULL, NULL, "fsl,t1042rdb-cpld"); in t1042rdb_diu_init()
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| /kernel/linux/linux-4.19/arch/powerpc/platforms/85xx/ |
| D | t1042rdb_diu.c | 78 * @pixclock: pixel clock in ps (pico seconds)
88 scfg_np = of_find_compatible_node(NULL, NULL, "fsl,t1040-scfg"); in t1042rdb_set_pixel_clock()
111 * range of values is 2-255. in t1042rdb_set_pixel_clock()
116 /* Disable the pixel clock, and set it to non-inverted and no delay */ in t1042rdb_set_pixel_clock()
137 return FSL_DIU_PORT_DVI; /* Dual-link LVDS is not supported */ in t1042rdb_valid_monitor_port()
143 cpld_node = of_find_compatible_node(NULL, NULL, "fsl,t1042rdb-cpld"); in t1042rdb_diu_init()
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| /kernel/linux/linux-4.19/Documentation/fb/ |
| D | ep93xx-fb.txt | 24 Note that the pixel clock value is in pico-seconds. You can use the
94 struct ep93xxfb_mach_info *mach_info = pdev->dev.platform_data;
106 video=XRESxYRES[-BPP][@REFRESH]
108 If the EP93xx video driver is built-in then the video mode is set on
111 video=ep93xx-fb:800x600-16@60
116 modprobe ep93xx-fb video=320x240
125 http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
132 ep93xx-fb.check_screenpage_bug=0
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| D | api.txt | 2 ---------------------------
8 ---------------
11 with frame buffer devices. In-kernel APIs between device drivers and the frame
21 ---------------
35 - FB_CAP_FOURCC
43 --------------------
45 Pixels are stored in memory in hardware-dependent formats. Applications need
57 - FB_TYPE_PACKED_PIXELS
66 - FB_TYPE_PLANES
74 - FB_TYPE_INTERLEAVED_PLANES
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| D | framebuffer.txt | 2 -----------------------
4 Maintained by Geert Uytterhoeven <geert@linux-m68k.org>
9 ---------------
13 software to access the graphics hardware through a well-defined interface, so
14 the software doesn't need to know anything about the low-level (hardware
22 --------------------------
39 /dev/fb0current -> fb0
40 /dev/fb1current -> fb1
50 graphics card in addition to the built-in hardware. The corresponding frame
69 --------------------------------
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| /kernel/linux/linux-5.10/Documentation/fb/ |
| D | ep93xx-fb.rst | 24 Note that the pixel clock value is in pico-seconds. You can use the
98 struct ep93xxfb_mach_info *mach_info = pdev->dev.platform_data;
110 video=XRESxYRES[-BPP][@REFRESH]
112 If the EP93xx video driver is built-in then the video mode is set on
115 video=ep93xx-fb:800x600-16@60
120 modprobe ep93xx-fb video=320x240
130 https://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
137 ep93xx-fb.check_screenpage_bug=0
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| D | api.rst | 9 ---------------
12 with frame buffer devices. In-kernel APIs between device drivers and the frame
22 ---------------
36 - FB_CAP_FOURCC
44 --------------------
46 Pixels are stored in memory in hardware-dependent formats. Applications need
58 - FB_TYPE_PACKED_PIXELS
67 - FB_TYPE_PLANES
75 - FB_TYPE_INTERLEAVED_PLANES
86 - FB_TYPE_FOURCC
[all …]
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| D | framebuffer.rst | 9 ---------------
13 software to access the graphics hardware through a well-defined interface, so
14 the software doesn't need to know anything about the low-level (hardware
22 --------------------------
39 /dev/fb0current -> fb0
40 /dev/fb1current -> fb1
50 graphics card in addition to the built-in hardware. The corresponding frame
69 --------------------------------
82 - You can request unchangeable information about the hardware, like name,
86 - You can request and change variable information about the hardware, like
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/512x/ |
| D | mpc512x_shared.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/fsl-diu-fb.h>
50 out_be32(&reset_module_base->rpr, 0x52535445); in mpc512x_restart()
52 out_be32(&reset_module_base->rcr, 0x2); in mpc512x_restart()
61 u8 gamma[0x300]; /* 32-bit aligned! */
62 struct diu_ad ad0; /* 32-bit aligned! */
68 /* receives a pixel clock spec in pico seconds, adjusts the DIU clock rate */
77 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-diu"); in mpc512x_set_pixel_clock()
85 clk_diu = clk_get_sys(np->name, "ipg"); in mpc512x_set_pixel_clock()
99 * determine the acceptable clock range for the monitor (+/- 5%), in mpc512x_set_pixel_clock()
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| /kernel/linux/linux-4.19/arch/powerpc/platforms/512x/ |
| D | mpc512x_shared.c | 20 #include <linux/fsl-diu-fb.h>
54 out_be32(&reset_module_base->rpr, 0x52535445); in mpc512x_restart()
56 out_be32(&reset_module_base->rcr, 0x2); in mpc512x_restart()
65 u8 gamma[0x300]; /* 32-bit aligned! */
66 struct diu_ad ad0; /* 32-bit aligned! */
72 /* receives a pixel clock spec in pico seconds, adjusts the DIU clock rate */
81 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-diu"); in mpc512x_set_pixel_clock()
89 clk_diu = clk_get_sys(np->name, "ipg"); in mpc512x_set_pixel_clock()
103 * determine the acceptable clock range for the monitor (+/- 5%), in mpc512x_set_pixel_clock()
106 pr_debug("DIU pixclock in ps - %u\n", pixclock); in mpc512x_set_pixel_clock()
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | fb.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
23 /* 0x4607-0x460B are defined below */
51 #define FB_AUX_TEXT_SVGA_GROUP 8 /* 8-15: SVGA tileblit compatible modes */
139 #define FB_ACCEL_SAVAGE3D_MV 0x82 /* S3 Savage3D-MV */
141 #define FB_ACCEL_SAVAGE_MX_MV 0x84 /* S3 Savage/MX-MV */
143 #define FB_ACCEL_SAVAGE_IX_MV 0x86 /* S3 Savage/IX-MV */
151 #define FB_ACCEL_PROSAVAGE_DDRK 0x8e /* S3 ProSavage DDR-K */
153 #define FB_ACCEL_PUV3_UNIGFX 0xa0 /* PKUnity-v3 Unigfx */
155 #define FB_CAP_FOURCC 1 /* Device supports FOURCC-based formats */
195 #define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */
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| /kernel/linux/linux-4.19/include/uapi/linux/ |
| D | fb.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
23 /* 0x4607-0x460B are defined below */
51 #define FB_AUX_TEXT_SVGA_GROUP 8 /* 8-15: SVGA tileblit compatible modes */
139 #define FB_ACCEL_SAVAGE3D_MV 0x82 /* S3 Savage3D-MV */
141 #define FB_ACCEL_SAVAGE_MX_MV 0x84 /* S3 Savage/MX-MV */
143 #define FB_ACCEL_SAVAGE_IX_MV 0x86 /* S3 Savage/IX-MV */
151 #define FB_ACCEL_PROSAVAGE_DDRK 0x8e /* S3 ProSavage DDR-K */
153 #define FB_ACCEL_PUV3_UNIGFX 0xa0 /* PKUnity-v3 Unigfx */
155 #define FB_CAP_FOURCC 1 /* Device supports FOURCC-based formats */
195 #define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | amba-clcd.c | 2 * linux/drivers/video/amba-clcd.c
18 #include <linux/dma-mapping.h>
53 unsigned long ustart = fb->fb.fix.smem_start; in clcdfb_set_start()
56 ustart += fb->fb.var.yoffset * fb->fb.fix.line_length; in clcdfb_set_start()
57 lstart = ustart + fb->fb.var.yres * fb->fb.fix.line_length / 2; in clcdfb_set_start()
59 writel(ustart, fb->regs + CLCD_UBAS); in clcdfb_set_start()
60 writel(lstart, fb->regs + CLCD_LBAS); in clcdfb_set_start()
67 if (fb->board->disable) in clcdfb_disable()
68 fb->board->disable(fb); in clcdfb_disable()
70 if (fb->panel->backlight) { in clcdfb_disable()
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| /kernel/linux/linux-4.19/drivers/mtd/nand/raw/ |
| D | marvell_nand.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Author: Miquel RAYNAL <miquel.raynal@free-electrons.com>
22 #include <linux/dma-mapping.h>
23 #include <linux/dma/pxa-dma.h>
24 #include <linux/platform_data/mtd-nand-pxa3xx.h>
104 #define NDSR_CMDD(cs) BIT(8 - cs)
174 * @full_chunk_cnt: Number of full-sized chunks, which is the number of
215 /* Layouts explained in AN-379_Marvell_SoC_NFC_ECC */
278 return &nand->sels[nand->selected_die]; in to_nand_sel()
318 * @dma_buf: 32-bit aligned buffer for DMA transfers (NFCv1 only)
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