Searched +full:pinctrl +full:- +full:pin +full:- +full:array (Results 1 – 25 of 249) sorted by relevance
12345678910
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | pinmux-node.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pinmux-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic pin multiplexing node schema
10 - Linus Walleij <linus.walleij@linaro.org>
13 The contents of the pin configuration child nodes are defined by the binding
14 for the individual pin controller device. The pin configuration nodes need not
15 be direct children of the pin controller device; they may be grandchildren,
18 the binding for the individual pin controller device.
[all …]
|
| D | pinctrl-single.txt | 1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
[all …]
|
| D | atmel,at91-pinctrl.txt | 10 Please refer to pinctrl-bindings.txt in this directory for details of the
11 common pinctrl bindings used by client devices, including the meaning of the
12 phrase "pin configuration node".
14 Atmel AT91 pin configuration node is a node of a group of pins which can be
16 of the pins in that group. The 'pins' selects the function mode(also named pin
17 mode) this pin can work on and the 'config' configures various pad settings
18 such as pull-up, multi drive, etc.
21 - compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
22 or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pinctrl"
23 - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
[all …]
|
| D | ste,nomadik.txt | 4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
5 "stericsson,stn8815-pinctrl"
6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips
7 (these have the register ranges used by the pin controller).
8 - prcm: phandle to the PRCMU managing the back end of this pin controller
10 Please refer to pinctrl-bindings.txt in this directory for details of the
11 common pinctrl bindings used by client devices, including the meaning of the
12 phrase "pin configuration node".
14 ST Ericsson's pin configuration nodes act as a container for an arbitrary number of
16 pin, a group, or a list of pins or groups. This configuration can include the
[all …]
|
| D | qcom,sc7180-pinctrl.txt | 6 - compatible:
9 Definition: must be "qcom,sc7180-pinctrl"
11 - reg:
13 Value type: <prop-encoded-array>
17 - reg-names:
19 Value type: <prop-encoded-array>
23 - interrupts:
25 Value type: <prop-encoded-array>
28 - interrupt-controller:
33 - #interrupt-cells:
[all …]
|
| D | qcom,sm8150-pinctrl.txt | 6 - compatible:
9 Definition: must be "qcom,sm8150-pinctrl"
11 - reg:
13 Value type: <prop-encoded-array>
17 - reg-names:
19 Value type: <prop-encoded-array>
23 - interrupts:
25 Value type: <prop-encoded-array>
28 - interrupt-controller:
33 - #interrupt-cells:
[all …]
|
| D | qcom,pmic-mpp.txt | 1 Qualcomm PMIC Multi-Purpose Pin (MPP) block
6 - compatible:
10 "qcom,pm8018-mpp",
11 "qcom,pm8038-mpp",
12 "qcom,pm8058-mpp",
13 "qcom,pm8821-mpp",
14 "qcom,pm8841-mpp",
15 "qcom,pm8916-mpp",
16 "qcom,pm8917-mpp",
17 "qcom,pm8921-mpp",
[all …]
|
| D | qcom,sdm660-pinctrl.txt | 6 - compatible:
9 Definition: must be "qcom,sdm660-pinctrl" or
10 "qcom,sdm630-pinctrl".
12 - reg:
14 Value type: <prop-encoded-array>
18 - reg-names:
24 - interrupts:
26 Value type: <prop-encoded-array>
29 - interrupt-controller:
34 - #interrupt-cells:
[all …]
|
| D | lantiq,pinctrl-falcon.txt | 4 - compatible: "lantiq,pinctrl-falcon"
5 - reg: Should contain the physical address and length of the gpio/pinmux
8 Please refer to pinctrl-bindings.txt in this directory for details of the
9 common pinctrl bindings used by client devices, including the meaning of the
10 phrase "pin configuration node".
12 Lantiq's pin configuration nodes act as a container for an arbitrary number of
14 pin, a group, or a list of pins or groups. This configuration can include the
15 mux function to select on those group(s), and two pin configuration parameters:
16 pull-up and open-drain
22 other words, a subnode that lists a mux function but no pin configuration
[all …]
|
| D | qcom,mdm9615-pinctrl.txt | 6 - compatible:
9 Definition: must be "qcom,mdm9615-pinctrl"
11 - reg:
13 Value type: <prop-encoded-array>
16 - interrupts:
18 Value type: <prop-encoded-array>
21 - interrupt-controller:
26 - #interrupt-cells:
29 Definition: must be 2. Specifying the pin number and flags, as defined
30 in <dt-bindings/interrupt-controller/irq.h>
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-single.txt | 1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
[all …]
|
| D | pinctrl-bindings.txt | 3 Hardware modules that control pin multiplexing or configuration parameters
4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
5 controllers. Each pin controller must be represented as a node in device tree,
8 Hardware modules whose signals are affected by pin configuration are
12 For a client device to operate correctly, certain pin controllers must
13 set up certain specific pin configurations. Some client devices need a
14 single static pin configuration, e.g. set up during initialization. Others
15 need to reconfigure pins at run-time, for example to tri-state pins when the
20 The common pinctrl bindings defined in this file provide an infrastructure
21 for client device device tree nodes to map those state names to the pin
[all …]
|
| D | atmel,at91-pinctrl.txt | 10 Please refer to pinctrl-bindings.txt in this directory for details of the
11 common pinctrl bindings used by client devices, including the meaning of the
12 phrase "pin configuration node".
14 Atmel AT91 pin configuration node is a node of a group of pins which can be
16 of the pins in that group. The 'pins' selects the function mode(also named pin
17 mode) this pin can work on and the 'config' configures various pad settings
18 such as pull-up, multi drive, etc.
21 - compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
22 or "atmel,sama5d3-pinctrl"
23 - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
[all …]
|
| D | ste,nomadik.txt | 4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
5 "stericsson,stn8815-pinctrl"
6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips
7 (these have the register ranges used by the pin controller).
8 - prcm: phandle to the PRCMU managing the back end of this pin controller
10 Please refer to pinctrl-bindings.txt in this directory for details of the
11 common pinctrl bindings used by client devices, including the meaning of the
12 phrase "pin configuration node".
14 ST Ericsson's pin configuration nodes act as a container for an arbitrary number of
16 pin, a group, or a list of pins or groups. This configuration can include the
[all …]
|
| D | qcom,pmic-mpp.txt | 1 Qualcomm PMIC Multi-Purpose Pin (MPP) block
6 - compatible:
10 "qcom,pm8018-mpp",
11 "qcom,pm8038-mpp",
12 "qcom,pm8058-mpp",
13 "qcom,pm8821-mpp",
14 "qcom,pm8841-mpp",
15 "qcom,pm8916-mpp",
16 "qcom,pm8917-mpp",
17 "qcom,pm8921-mpp",
[all …]
|
| D | lantiq,pinctrl-falcon.txt | 4 - compatible: "lantiq,pinctrl-falcon"
5 - reg: Should contain the physical address and length of the gpio/pinmux
8 Please refer to pinctrl-bindings.txt in this directory for details of the
9 common pinctrl bindings used by client devices, including the meaning of the
10 phrase "pin configuration node".
12 Lantiq's pin configuration nodes act as a container for an arbitrary number of
14 pin, a group, or a list of pins or groups. This configuration can include the
15 mux function to select on those group(s), and two pin configuration parameters:
16 pull-up and open-drain
22 other words, a subnode that lists a mux function but no pin configuration
[all …]
|
| /kernel/linux/linux-5.10/drivers/pinctrl/intel/ |
| D | pinctrl-intel.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Core pinctrl/GPIO driver for Intel GPIO controllers
19 #include <linux/pinctrl/pinctrl.h>
26 * struct intel_pingroup - Description about group of pins
32 * @modes: If not %NULL this will hold mode for each pin in @pins
43 * struct intel_function - Description about a function
45 * @groups: An array of groups for this function
55 * struct intel_padgroup - Hardware pad group information
57 * @base: Starting pin of this group
74 * enum - Special treatment for GPIO base in pad group
[all …]
|
| /kernel/linux/linux-4.19/include/linux/pinctrl/ |
| D | pinctrl.h | 2 * Interface the pinctrl subsystem
4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
17 #include <linux/radix-tree.h>
20 #include <linux/pinctrl/pinctrl-state.h>
21 #include <linux/pinctrl/devinfo.h>
33 * struct pinctrl_pin_desc - boards/machines provide information on their
35 * @number: unique pin number from the global pin number space
36 * @name: a name for this pin
37 * @drv_data: driver-defined per-pin data. pinctrl core does not touch this
[all …]
|
| /kernel/linux/linux-5.10/include/linux/pinctrl/ |
| D | pinctrl.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Interface the pinctrl subsystem
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
14 #include <linux/radix-tree.h>
17 #include <linux/pinctrl/pinctrl-state.h>
18 #include <linux/pinctrl/devinfo.h>
30 * struct pinctrl_pin_desc - boards/machines provide information on their
32 * @number: unique pin number from the global pin number space
33 * @name: a name for this pin
[all …]
|
| /kernel/linux/linux-5.10/drivers/pinctrl/qcom/ |
| D | pinctrl-qdf2xxx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * GPIO and pin control functions on this SOC are handled by the "TLMM"
6 * device. The driver which controls this device is pinctrl-msm.c. Each
8 * with pinctrl-msm.c. This means that all TLMM drivers are pin control
11 * This pin control driver is intended to be used only an ACPI-enabled
12 * system. As such, UEFI will handle all pin control configuration, so
13 * this driver does not provide pin control functions. It is effectively
14 * a GPIO-only driver. The alternative is to duplicate the GPIO code of
15 * pinctrl-msm.c into another driver.
20 #include <linux/pinctrl/pinctrl.h>
[all …]
|
| /kernel/linux/linux-4.19/drivers/pinctrl/qcom/ |
| D | pinctrl-qdf2xxx.c | 13 * GPIO and pin control functions on this SOC are handled by the "TLMM"
14 * device. The driver which controls this device is pinctrl-msm.c. Each
16 * with pinctrl-msm.c. This means that all TLMM drivers are pin control
19 * This pin control driver is intended to be used only an ACPI-enabled
20 * system. As such, UEFI will handle all pin control configuration, so
21 * this driver does not provide pin control functions. It is effectively
22 * a GPIO-only driver. The alternative is to duplicate the GPIO code of
23 * pinctrl-msm.c into another driver.
28 #include <linux/pinctrl/pinctrl.h>
31 #include "pinctrl-msm.h"
[all …]
|
| /kernel/linux/linux-5.10/drivers/pinctrl/ |
| D | core.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Core private header for the pin control subsystem
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
13 #include <linux/radix-tree.h>
14 #include <linux/pinctrl/pinconf.h>
15 #include <linux/pinctrl/machine.h>
20 * struct pinctrl_dev - pin control class device
21 * @node: node to include this pin controller in the global pin controller list
22 * @desc: the pin controller descriptor supplied when initializing this pin
[all …]
|
| /kernel/linux/linux-4.19/drivers/pinctrl/ |
| D | core.h | 2 * Core private header for the pin control subsystem
4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
14 #include <linux/radix-tree.h>
15 #include <linux/pinctrl/pinconf.h>
16 #include <linux/pinctrl/machine.h>
21 * struct pinctrl_dev - pin control class device
22 * @node: node to include this pin controller in the global pin controller list
23 * @desc: the pin controller descriptor supplied when initializing this pin
25 * @pin_desc_tree: each pin descriptor for this pin controller is stored in
[all …]
|
| /kernel/linux/linux-5.10/drivers/pinctrl/samsung/ |
| D | pinctrl-samsung.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
16 #include <linux/pinctrl/pinctrl.h>
17 #include <linux/pinctrl/pinmux.h>
18 #include <linux/pinctrl/pinconf.h>
19 #include <linux/pinctrl/consumer.h>
20 #include <linux/pinctrl/machine.h>
25 * enum pincfg_type - possible pin configuration types supported.
27 * @PINCFG_TYPE_DAT: Pin value configuration.
30 * @PINCFG_TYPE_CON_PDN: Pin function in power down mode.
[all …]
|
| /kernel/linux/linux-4.19/drivers/pinctrl/samsung/ |
| D | pinctrl-samsung.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
16 #include <linux/pinctrl/pinctrl.h>
17 #include <linux/pinctrl/pinmux.h>
18 #include <linux/pinctrl/pinconf.h>
19 #include <linux/pinctrl/consumer.h>
20 #include <linux/pinctrl/machine.h>
25 * enum pincfg_type - possible pin configuration types supported.
27 * @PINCFG_TYPE_DAT: Pin value configuration.
30 * @PINCFG_TYPE_CON_PDN: Pin function in power down mode.
[all …]
|
12345678910