| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ |
| D | ia_css_pipeline.h | 25 /* Pipeline stage to be executed on SP/ISP */
42 /* Pipeline of n stages to be executed on SP/ISP per stage */
71 /* Stage descriptor used to create a new stage in the pipeline */
83 /* @brief initialize the pipeline module
87 * Initializes the pipeline module. This API has to be called
88 * before any operation on the pipeline module is done
92 /* @brief initialize the pipeline structure with default values
94 * @param[out] pipeline structure to be initialized with defaults
96 * @param[in] pipe_num Number that uniquely identifies a pipeline.
99 * Initializes the pipeline structure with a set of default values.
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| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/runtime/pipeline/src/ |
| D | pipeline.c | 44 struct ia_css_pipeline *pipeline,
53 static void ia_css_pipeline_set_zoom_stage(struct ia_css_pipeline *pipeline);
66 struct ia_css_pipeline *pipeline, in ia_css_pipeline_create() argument
71 assert(pipeline); in ia_css_pipeline_create()
72 IA_CSS_ENTER_PRIVATE("pipeline = %p, pipe_id = %d, pipe_num = %d, dvs_frame_delay = %d", in ia_css_pipeline_create()
73 pipeline, pipe_id, pipe_num, dvs_frame_delay); in ia_css_pipeline_create()
74 if (!pipeline) { in ia_css_pipeline_create()
79 pipeline_init_defaults(pipeline, pipe_id, pipe_num, dvs_frame_delay); in ia_css_pipeline_create()
102 /* @brief destroy a pipeline
104 * @param[in] pipeline
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| /kernel/linux/linux-4.19/drivers/gpu/drm/xen/ |
| D | xen_drm_front_kms.c | 97 static void send_pending_event(struct xen_drm_front_drm_pipeline *pipeline) in send_pending_event() argument
99 struct drm_crtc *crtc = &pipeline->pipe.crtc; in send_pending_event()
104 if (pipeline->pending_event) in send_pending_event()
105 drm_crtc_send_vblank_event(crtc, pipeline->pending_event); in send_pending_event()
106 pipeline->pending_event = NULL; in send_pending_event()
114 struct xen_drm_front_drm_pipeline *pipeline = in display_enable() local
123 ret = xen_drm_front_mode_set(pipeline, crtc->x, crtc->y, in display_enable()
130 pipeline->conn_connected = false; in display_enable()
138 struct xen_drm_front_drm_pipeline *pipeline = in display_disable() local
143 ret = xen_drm_front_mode_set(pipeline, 0, 0, 0, 0, 0, in display_disable()
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| D | xen_drm_front_conn.c | 47 struct xen_drm_front_drm_pipeline *pipeline = in connector_detect() local
51 pipeline->conn_connected = false; in connector_detect()
53 return pipeline->conn_connected ? connector_status_connected : in connector_detect()
61 struct xen_drm_front_drm_pipeline *pipeline = in connector_get_modes() local
72 videomode.hactive = pipeline->width; in connector_get_modes()
73 videomode.vactive = pipeline->height; in connector_get_modes()
103 struct xen_drm_front_drm_pipeline *pipeline = in xen_drm_front_conn_init() local
108 pipeline->conn_connected = true; in xen_drm_front_conn_init()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/xen/ |
| D | xen_drm_front_kms.c | 91 static void send_pending_event(struct xen_drm_front_drm_pipeline *pipeline) in send_pending_event() argument
93 struct drm_crtc *crtc = &pipeline->pipe.crtc; in send_pending_event()
98 if (pipeline->pending_event) in send_pending_event()
99 drm_crtc_send_vblank_event(crtc, pipeline->pending_event); in send_pending_event()
100 pipeline->pending_event = NULL; in send_pending_event()
108 struct xen_drm_front_drm_pipeline *pipeline = in display_enable() local
117 ret = xen_drm_front_mode_set(pipeline, crtc->x, crtc->y, in display_enable()
124 pipeline->conn_connected = false; in display_enable()
132 struct xen_drm_front_drm_pipeline *pipeline = in display_disable() local
137 ret = xen_drm_front_mode_set(pipeline, 0, 0, 0, 0, 0, in display_disable()
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| D | xen_drm_front_conn.c | 49 struct xen_drm_front_drm_pipeline *pipeline = in connector_detect() local
53 pipeline->conn_connected = false; in connector_detect()
55 return pipeline->conn_connected ? connector_status_connected : in connector_detect()
63 struct xen_drm_front_drm_pipeline *pipeline = in connector_get_modes() local
74 videomode.hactive = pipeline->width; in connector_get_modes()
75 videomode.vactive = pipeline->height; in connector_get_modes()
104 struct xen_drm_front_drm_pipeline *pipeline = in xen_drm_front_conn_init() local
109 pipeline->conn_connected = true; in xen_drm_front_conn_init()
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| /kernel/linux/linux-5.10/drivers/isdn/mISDN/ |
| D | dsp_pipeline.c | 149 printk(KERN_DEBUG "%s: dsp pipeline module initialized\n", __func__); in dsp_pipeline_module_init()
173 printk(KERN_DEBUG "%s: dsp pipeline module exited\n", __func__); in dsp_pipeline_module_exit()
177 int dsp_pipeline_init(struct dsp_pipeline *pipeline) in dsp_pipeline_init() argument
179 if (!pipeline) in dsp_pipeline_init()
182 INIT_LIST_HEAD(&pipeline->list); in dsp_pipeline_init()
185 printk(KERN_DEBUG "%s: dsp pipeline ready\n", __func__); in dsp_pipeline_init()
191 static inline void _dsp_pipeline_destroy(struct dsp_pipeline *pipeline) in _dsp_pipeline_destroy() argument
195 list_for_each_entry_safe(entry, n, &pipeline->list, list) { in _dsp_pipeline_destroy()
198 dsp_hwec_disable(container_of(pipeline, struct dsp, in _dsp_pipeline_destroy()
199 pipeline)); in _dsp_pipeline_destroy()
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| /kernel/linux/linux-4.19/drivers/isdn/mISDN/ |
| D | dsp_pipeline.c | 166 printk(KERN_DEBUG "%s: dsp pipeline module initialized\n", __func__); in dsp_pipeline_module_init()
190 printk(KERN_DEBUG "%s: dsp pipeline module exited\n", __func__); in dsp_pipeline_module_exit()
194 int dsp_pipeline_init(struct dsp_pipeline *pipeline) in dsp_pipeline_init() argument
196 if (!pipeline) in dsp_pipeline_init()
199 INIT_LIST_HEAD(&pipeline->list); in dsp_pipeline_init()
202 printk(KERN_DEBUG "%s: dsp pipeline ready\n", __func__); in dsp_pipeline_init()
208 static inline void _dsp_pipeline_destroy(struct dsp_pipeline *pipeline) in _dsp_pipeline_destroy() argument
212 list_for_each_entry_safe(entry, n, &pipeline->list, list) { in _dsp_pipeline_destroy()
215 dsp_hwec_disable(container_of(pipeline, struct dsp, in _dsp_pipeline_destroy()
216 pipeline)); in _dsp_pipeline_destroy()
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| /kernel/linux/linux-5.10/Documentation/gpu/ |
| D | komeda-kms.rst | 15 architecture. A display pipeline is made up of multiple individual and
16 functional pipeline stages called components, and every component has some
17 specific capabilities that can give the flowed pipeline pixel data a
24 Layer is the first pipeline stage, which prepares the pixel data for the next
58 Final stage of display pipeline, Timing controller is not for the pixel
76 Possible D71 Pipeline usage
94 Single pipeline data flow
98 :alt: Single pipeline digraph
99 :caption: Single pipeline data flow
140 Dual pipeline with Slave enabled
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| /kernel/linux/linux-5.10/drivers/media/platform/vsp1/ |
| D | vsp1_pipe.h | 3 * vsp1_pipe.h -- R-Car VSP1 Pipeline
84 * struct vsp1_pipeline - A VSP1 hardware pipeline
85 * @pipe: the media pipeline
86 * @irqlock: protects the pipeline state
90 * @lock: protects the pipeline use count and stream count
91 * @kref: pipeline reference count
96 * @inputs: array of RPFs in the pipeline (indexed by RPF index)
97 * @output: WPF at the output of the pipeline
104 * @entities: list of entities in the pipeline
107 * @interlaced: True when the pipeline is configured in interlaced mode
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| D | vsp1_drm.c | 56 * Pipeline Configuration
60 * Insert the UIF in the pipeline between the prev and next entities. If no UIF
264 * The BRx might be acquired by the other pipeline in in vsp1_du_pipeline_setup_brx()
266 * of entities for this pipeline. The other pipeline's in vsp1_du_pipeline_setup_brx()
270 * However, if the other pipeline doesn't acquire our in vsp1_du_pipeline_setup_brx()
273 * the pipeline. To solve this, store the released BRx in vsp1_du_pipeline_setup_brx()
275 * if it isn't acquired by the other pipeline. in vsp1_du_pipeline_setup_brx()
286 * If the BRx we need is in use, force the owner pipeline to in vsp1_du_pipeline_setup_brx()
306 "DRM pipeline %u reconfiguration timeout\n", in vsp1_du_pipeline_setup_brx()
312 * by the other pipeline, add it back to the entities list (with in vsp1_du_pipeline_setup_brx()
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| /kernel/linux/linux-4.19/drivers/media/platform/vsp1/ |
| D | vsp1_pipe.h | 3 * vsp1_pipe.h -- R-Car VSP1 Pipeline
84 * struct vsp1_pipeline - A VSP1 hardware pipeline
85 * @pipe: the media pipeline
86 * @irqlock: protects the pipeline state
90 * @lock: protects the pipeline use count and stream count
91 * @kref: pipeline reference count
96 * @inputs: array of RPFs in the pipeline (indexed by RPF index)
97 * @output: WPF at the output of the pipeline
104 * @entities: list of entities in the pipeline
107 * @interlaced: True when the pipeline is configured in interlaced mode
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| D | vsp1_drm.c | 54 * Pipeline Configuration
58 * Insert the UIF in the pipeline between the prev and next entities. If no UIF
262 * The BRx might be acquired by the other pipeline in in vsp1_du_pipeline_setup_brx()
264 * of entities for this pipeline. The other pipeline's in vsp1_du_pipeline_setup_brx()
268 * However, if the other pipeline doesn't acquire our in vsp1_du_pipeline_setup_brx()
271 * the pipeline. To solve this, store the released BRx in vsp1_du_pipeline_setup_brx()
273 * if it isn't acquired by the other pipeline. in vsp1_du_pipeline_setup_brx()
284 * If the BRx we need is in use, force the owner pipeline to in vsp1_du_pipeline_setup_brx()
304 "DRM pipeline %u reconfiguration timeout\n", in vsp1_du_pipeline_setup_brx()
310 * by the other pipeline, add it back to the entities list (with in vsp1_du_pipeline_setup_brx()
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| /kernel/linux/linux-5.10/drivers/net/wireless/ti/wl18xx/ |
| D | debugfs.c | 143 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, hs_tx_stat_fifo_int, "%u");
144 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, enc_tx_stat_fifo_int, "%u");
145 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, enc_rx_stat_fifo_int, "%u");
146 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, rx_complete_stat_fifo_int, "%u");
147 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, pre_proc_swi, "%u");
148 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, post_proc_swi, "%u");
149 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, sec_frag_swi, "%u");
150 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, pre_to_defrag_swi, "%u");
151 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, defrag_to_rx_xfer_swi, "%u");
152 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, dec_packet_in, "%u");
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| /kernel/linux/linux-5.10/drivers/media/test-drivers/vimc/ |
| D | vimc-streamer.c | 42 * @stream: the pointer to the stream structure with the pipeline to be
45 * Calls s_stream to disable the stream in each entity of the pipeline
73 * construct the pipeline used later on the streamer thread.
75 * the pipeline.
107 /* Check if the end of the pipeline was reached */ in vimc_streamer_pipeline_init()
120 /* Get the next device in the pipeline */ in vimc_streamer_pipeline_init()
137 * vimc_streamer_thread - Process frames through the pipeline
142 * the next one of the pipeline at a fixed framerate.
176 * vimc_streamer_s_stream - Start/stop the streaming on the media pipeline
184 * pipeline, creates and runs a kthread to consume buffers through the pipeline.
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_crtc.c | 91 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in crtc_flush() local
98 return mdp5_ctl_commit(ctl, pipeline, flush_mask, start); in crtc_flush()
123 mixer = mdp5_cstate->pipeline.mixer; in crtc_flush_all()
126 r_mixer = mdp5_cstate->pipeline.r_mixer; in crtc_flush_all()
137 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in complete_flip() local
155 mdp5_ctl_blend(ctl, pipeline, NULL, NULL, 0, 0); in complete_flip()
214 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in blend_setup() local
219 struct mdp5_hw_mixer *mixer = pipeline->mixer; in blend_setup()
221 struct mdp5_hw_mixer *r_mixer = pipeline->r_mixer; in blend_setup()
353 mdp5_ctl_blend(ctl, pipeline, stage, r_stage, plane_cnt, in blend_setup()
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| D | mdp5_ctl.c | 135 static void set_ctl_op(struct mdp5_ctl *ctl, struct mdp5_pipeline *pipeline) in set_ctl_op() argument
138 struct mdp5_interface *intf = pipeline->intf; in set_ctl_op()
159 if (pipeline->r_mixer) in set_ctl_op()
168 int mdp5_ctl_set_pipeline(struct mdp5_ctl *ctl, struct mdp5_pipeline *pipeline) in mdp5_ctl_set_pipeline() argument
171 struct mdp5_interface *intf = pipeline->intf; in mdp5_ctl_set_pipeline()
177 set_ctl_op(ctl, pipeline); in mdp5_ctl_set_pipeline()
183 struct mdp5_pipeline *pipeline) in start_signal_needed() argument
185 struct mdp5_interface *intf = pipeline->intf; in start_signal_needed()
203 * For a given control operation (display pipeline), a START signal needs to be
225 struct mdp5_pipeline *pipeline, in mdp5_ctl_set_encoder_state() argument
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| /kernel/linux/linux-5.10/drivers/media/platform/xilinx/ |
| D | xilinx-dma.c | 83 * Pipeline Stream Management
87 * xvip_pipeline_start_stop - Start ot stop streaming on a pipeline
88 * @pipe: The pipeline
89 * @start: Start (when true) or stop (when false) the pipeline
91 * Walk the entities chain starting at the pipeline output video node and start
127 * xvip_pipeline_set_stream - Enable/disable streaming on a pipeline
128 * @pipe: The pipeline
131 * The pipeline is shared between all DMA engines connect at its input and
134 * all entities in the pipeline. For this reason the pipeline uses a streaming
139 * the pipeline streaming count. If the streaming count reaches the number of
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| D | xilinx-dma.h | 29 * struct xvip_pipeline - Xilinx Video IP pipeline structure
30 * @pipe: media pipeline
31 * @lock: protects the pipeline @stream_count
32 * @use_count: number of DMA engines using the pipeline
34 * @num_dmas: number of DMA engines in the pipeline
35 * @output: DMA engine at the output of the pipeline
59 * @pipe: pipeline belonging to the DMA channel
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| /kernel/linux/linux-4.19/drivers/media/platform/xilinx/ |
| D | xilinx-dma.c | 86 * Pipeline Stream Management
90 * xvip_pipeline_start_stop - Start ot stop streaming on a pipeline
91 * @pipe: The pipeline
92 * @start: Start (when true) or stop (when false) the pipeline
94 * Walk the entities chain starting at the pipeline output video node and start
130 * xvip_pipeline_set_stream - Enable/disable streaming on a pipeline
131 * @pipe: The pipeline
134 * The pipeline is shared between all DMA engines connect at its input and
137 * all entities in the pipeline. For this reason the pipeline uses a streaming
142 * the pipeline streaming count. If the streaming count reaches the number of
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| D | xilinx-dma.h | 32 * struct xvip_pipeline - Xilinx Video IP pipeline structure
33 * @pipe: media pipeline
34 * @lock: protects the pipeline @stream_count
35 * @use_count: number of DMA engines using the pipeline
37 * @num_dmas: number of DMA engines in the pipeline
38 * @output: DMA engine at the output of the pipeline
62 * @pipe: pipeline belonging to the DMA channel
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| /kernel/linux/linux-4.19/drivers/net/wireless/ti/wl18xx/ |
| D | debugfs.c | 157 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, hs_tx_stat_fifo_int, "%u");
158 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, enc_tx_stat_fifo_int, "%u");
159 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, enc_rx_stat_fifo_int, "%u");
160 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, rx_complete_stat_fifo_int, "%u");
161 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, pre_proc_swi, "%u");
162 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, post_proc_swi, "%u");
163 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, sec_frag_swi, "%u");
164 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, pre_to_defrag_swi, "%u");
165 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, defrag_to_rx_xfer_swi, "%u");
166 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, dec_packet_in, "%u");
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| /kernel/linux/linux-4.19/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_crtc.c | 99 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in crtc_flush() local
106 return mdp5_ctl_commit(ctl, pipeline, flush_mask, start); in crtc_flush()
131 mixer = mdp5_cstate->pipeline.mixer; in crtc_flush_all()
134 r_mixer = mdp5_cstate->pipeline.r_mixer; in crtc_flush_all()
145 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in complete_flip() local
163 mdp5_ctl_blend(ctl, pipeline, NULL, NULL, 0, 0); in complete_flip()
222 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in blend_setup() local
228 struct mdp5_hw_mixer *mixer = pipeline->mixer; in blend_setup()
230 struct mdp5_hw_mixer *r_mixer = pipeline->r_mixer; in blend_setup()
364 mdp5_ctl_blend(ctl, pipeline, stage, r_stage, plane_cnt, in blend_setup()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | arm,komeda.txt | 18 Required properties for sub-node: pipeline@nq
19 Each device contains one or two pipeline sub-nodes (at least one), each
20 pipeline node should provide properties:
21 - reg: Zero-indexed identifier for the pipeline
27 - port: each pipeline connect to an encoder input port. The connection is
53 dp0_pipe0: pipeline@0 {
65 dp0_pipe1: pipeline@1 {
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| /kernel/linux/linux-5.10/drivers/gpu/drm/arm/display/komeda/ |
| D | komeda_pipeline.h | 21 /* pipeline component IDs */
76 * component into the display pipeline.
82 /** @pipeline: the komeda pipeline this component belongs to */
83 struct komeda_pipeline *pipeline; member
119 * pipeline.
385 * Represent a complete display pipeline and hold all functional components.
388 /** @obj: link pipeline as private obj of drm_atomic_state */
394 /** @id: pipeline id */
396 /** @avail_comps: available components mask of pipeline */
401 * When disable the pipeline, some components can not be disabled
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