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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Daspeed-bmc-facebook-cmm.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2500-facebook-netbmc-common.dtsi"
9 compatible = "facebook,cmm-bmc", "aspeed,ast2500";
22 * PCA9548 (1-0077) provides 8 channels for connecting to
35 * PCA9548 (2-0071) provides 8 channels for connecting to
48 * PCA9548 (8-0077) provides 8 channels and the first 4
61 * 2 PCA9548 (18-0070 & 18-0073), 16 channels connecting
82 * 2 PCA9548 (19-0070 & 19-0073), 16 channels connecting
103 * 2 PCA9548 (20-0070 & 20-0073), 16 channels connecting
[all …]
Daspeed-bmc-facebook-minipack.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2500-facebook-netbmc-common.dtsi"
9 compatible = "facebook,minipack-bmc", "aspeed,ast2500";
23 * i2c switch 2-0070, pca9548, 8 child channels assigned
24 * with bus number 16-23.
36 * i2c switch 8-0070, pca9548, 8 child channels assigned
37 * with bus number 24-31.
49 * i2c switch 9-0070, pca9548, 8 child channels assigned
50 * with bus number 32-39.
[all …]
Daspeed-bmc-ibm-rainier.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,rainier-bmc", "aspeed,ast2600";
36 stdout-path = &uart5;
42 reg = <0x80000000 0x40000000>;
45 reserved-memory {
[all …]
Daspeed-bmc-opp-mihawk.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/leds-pca955x.h>
9 compatible = "ibm,mihawk-bmc", "aspeed,ast2500";
59 stdout-path = &uart5;
64 reg = <0x80000000 0x20000000>;
67 reserved-memory {
68 #address-cells = <1>;
[all …]
Daspeed-bmc-facebook-wedge400.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include "ast2500-facebook-netbmc-common.dtsi"
10 compatible = "facebook,wedge400-bmc", "aspeed,ast2500";
14 * PCA9548 (2-0070) provides 8 channels connecting to
27 * PCA9548 (8-0070) provides 8 channels connecting to
40 * PCA9548 (11-0076) provides 8 channels connecting to
56 stdout-path = &uart1;
60 ast-adc-hwmon {
[all …]
Daspeed-bmc-quanta-q71l.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3 #include "aspeed-g4.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "quanta,q71l-bmc", "aspeed,ast2400";
30 stdout-path = &uart5;
35 reg = <0x40000000 0x8000000>;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
[all …]
Dvf610-zii-dev-rev-b.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
21 mdio-parent-bus = <&mdio1>;
22 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/amazon/
Dalpine-v3.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "amazon,al-alpine-v3";
14 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a72";
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Daspeed-bmc-quanta-q71l.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3 #include "aspeed-g4.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "quanta,q71l-bmc", "aspeed,ast2400";
11 stdout-path = &uart5;
16 reg = <0x40000000 0x8000000>;
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dmpc5121.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 #include <dt-bindings/clock/mpc512x-clock.h>
10 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&ipic>;
25 #address-cells = <1>;
26 #size-cells = <0>;
30 reg = <0>;
[all …]
Deiger.dts11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 reg = <0x00000000>;
37 clock-frequency = <0>; /* Filled in by U-Boot */
38 timebase-frequency = <0>; /* Filled in by U-Boot */
39 i-cache-line-size = <32>;
[all …]
Dtqm8540.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 reg = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
[all …]
Dtqm8548.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 reg = <0>;
36 d-cache-line-size = <32>; // 32 bytes
37 i-cache-line-size = <32>; // 32 bytes
38 d-cache-size = <0x8000>; // L1, 32K
[all …]
Dtqm8548-bigflash.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 reg = <0>;
36 d-cache-line-size = <32>; // 32 bytes
37 i-cache-line-size = <32>; // 32 bytes
38 d-cache-size = <0x8000>; // L1, 32K
[all …]
Dxcalibur1501.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 * XCalibur1501 6U CompactPCI single-board computer based on MPC8572E
9 /dts-v1/;
13 #address-cells = <2>;
14 #size-cells = <2>;
27 #address-cells = <1>;
28 #size-cells = <0>;
32 reg = <0x0>;
33 d-cache-line-size = <32>; // 32 bytes
34 i-cache-line-size = <32>; // 32 bytes
[all …]
/kernel/linux/linux-4.19/arch/powerpc/boot/dts/
Dmpc5121.dtsi4 * Copyright 2007-2008 Freescale Semiconductor Inc.
12 #include <dt-bindings/clock/mpc512x-clock.h>
14 /dts-v1/;
19 #address-cells = <1>;
20 #size-cells = <1>;
21 interrupt-parent = <&ipic>;
29 #address-cells = <1>;
30 #size-cells = <0>;
34 reg = <0>;
35 d-cache-line-size = <0x20>; /* 32 bytes */
[all …]
Deiger.dts11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 reg = <0x00000000>;
37 clock-frequency = <0>; /* Filled in by U-Boot */
38 timebase-frequency = <0>; /* Filled in by U-Boot */
39 i-cache-line-size = <32>;
[all …]
Dtqm8540.dts12 /dts-v1/;
17 #address-cells = <1>;
18 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 reg = <0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
[all …]
Dtqm8548.dts13 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <0>;
39 reg = <0>;
40 d-cache-line-size = <32>; // 32 bytes
41 i-cache-line-size = <32>; // 32 bytes
42 d-cache-size = <0x8000>; // L1, 32K
43 i-cache-size = <0x8000>; // L1, 32K
[all …]
Dtqm8548-bigflash.dts13 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <0>;
39 reg = <0>;
40 d-cache-line-size = <32>; // 32 bytes
41 i-cache-line-size = <32>; // 32 bytes
42 d-cache-size = <0x8000>; // L1, 32K
43 i-cache-size = <0x8000>; // L1, 32K
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-sata.dtsi4 * Copyright(c) 2016-2017 Broadcom. All rights reserved.
34 compatible = "simple-bus";
35 #address-cells = <1>;
36 #size-cells = <1>;
40 compatible = "brcm,iproc-ahci", "generic-ahci";
41 reg = <0x00000000 0x1000>;
42 reg-names = "ahci";
44 #address-cells = <1>;
45 #size-cells = <0>;
48 sata0_port0: sata-port@0 {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-sata.dtsi4 * Copyright(c) 2016-2017 Broadcom. All rights reserved.
34 compatible = "simple-bus";
35 #address-cells = <1>;
36 #size-cells = <1>;
40 compatible = "brcm,iproc-ahci", "generic-ahci";
41 reg = <0x00000000 0x1000>;
42 reg-names = "ahci";
44 #address-cells = <1>;
45 #size-cells = <0>;
48 sata0_port0: sata-port@0 {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
24 #address-cells = <1>;
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/xilinx/
Dzynqmp-zcu111-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2018, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
19 compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
33 stdout-path = "serial0:115200n8";
38 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
42 gpio-keys {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/microchip/
Dsparx5_pcb134_board.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
34 gpio-restart {
35 compatible = "gpio-restart";
44 compatible = "spi-mux";
45 mux-controls = <&mux>;
46 #address-cells = <1>;
47 #size-cells = <0>;
48 reg = <0>; /* CS0 */
49 spi-flash@9 {
[all …]

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