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/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhi3660-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2016-2018 Hisilicon Ltd.
15 compatible = "arm,coresight-etm4x", "arm,primecell";
18 clock-names = "apb_pclk";
21 out-ports {
23 etm0_out: endpoint {
24 remote-endpoint =
32 compatible = "arm,coresight-etm4x", "arm,primecell";
35 clock-names = "apb_pclk";
38 out-ports {
[all …]
Dhi6220-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
17 clock-names = "apb_pclk";
19 out-ports {
21 soc_funnel_out: endpoint {
22 remote-endpoint =
28 in-ports {
30 soc_funnel_in: endpoint {
31 remote-endpoint =
39 compatible = "arm,coresight-tmc", "arm,primecell";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dhip04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2014 Hisilicon Ltd.
6 * Copyright (C) 2013-2014 Linaro Ltd.
12 /* memory bus is 64-bit */
13 #address-cells = <2>;
14 #size-cells = <2>;
21 compatible = "hisilicon,hip04-bootwrapper";
22 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>;
26 #address-cells = <1>;
27 #size-cells = <0>;
[all …]
Dimx6q.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6q-pinfunc.h"
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a9";
23 next-level-cache = <&L2>;
24 operating-points = <
32 fsl,soc-operating-points = <
33 /* ARM kHz SOC-PU uV */
[all …]
Dimx6dl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6dl-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
23 operating-points = <
29 fsl,soc-operating-points = <
30 /* ARM kHz SOC-PU uV */
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/hisilicon/
Dhi6220-coresight.dtsi18 compatible = "arm,coresight-funnel", "arm,primecell";
21 clock-names = "apb_pclk";
24 #address-cells = <1>;
25 #size-cells = <0>;
29 soc_funnel_out: endpoint {
30 remote-endpoint =
37 soc_funnel_in: endpoint {
38 slave-mode;
39 remote-endpoint =
47 compatible = "arm,coresight-tmc", "arm,primecell";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Daudio-graph-card.txt3 Audio Graph Card specifies audio DAI connections of SoC <-> codec.
8 see ${LINUX}/Documentation/devicetree/bindings/sound/simple-card.yaml
10 Below are same as Simple-Card.
12 - label
13 - widgets
14 - routing
15 - dai-format
16 - frame-master
17 - bitclock-master
18 - bitclock-inversion
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dhip04.dtsi4 * Copyright (C) 2013-2014 Hisilicon Ltd.
5 * Copyright (C) 2013-2014 Linaro Ltd.
15 /* memory bus is 64-bit */
16 #address-cells = <2>;
17 #size-cells = <2>;
24 compatible = "hisilicon,hip04-bootwrapper";
25 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>;
29 #address-cells = <1>;
30 #size-cells = <0>;
32 cpu-map {
[all …]
Dimx6q.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6q-pinfunc.h"
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a9";
23 next-level-cache = <&L2>;
24 operating-points = <
32 fsl,soc-operating-points = <
33 /* ARM kHz SOC-PU uV */
[all …]
Dimx6dl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6dl-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
23 operating-points = <
29 fsl,soc-operating-points = <
30 /* ARM kHz SOC-PU uV */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/i2c/
Dmaxim,max9286.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jacopo Mondi <jacopo+renesas@jmondi.org>
12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
18 Serial Links (GMSL) and outputs them on a CSI-2 D-PHY port using up to 4 data
28 '#address-cells':
31 '#size-cells':
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/sprd/
Dsc9863a.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/clock/sprd,sc9863a-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #address-cells = <2>;
15 #size-cells = <0>;
17 cpu-map {
48 compatible = "arm,cortex-a55";
50 enable-method = "psci";
51 cpu-idle-states = <&CORE_PD>;
56 compatible = "arm,cortex-a55";
[all …]
Dsc9860.dtsi6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
53 compatible = "arm,cortex-a53";
55 enable-method = "psci";
56 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
[all …]
Dsc9836.dtsi10 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a53";
23 enable-method = "psci";
28 compatible = "arm,cortex-a53";
30 enable-method = "psci";
35 compatible = "arm,cortex-a53";
37 enable-method = "psci";
42 compatible = "arm,cortex-a53";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Drenesas,csi2.yaml1 # SPDX-License-Identifier: GPL-2.0-only
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car MIPI CSI-2 receiver
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car CSI-2 receiver device provides MIPI CSI-2 capabilities for the
15 Renesas R-Car and RZ/G2 family of devices. It is used in conjunction with the
16 R-Car VIN module, which provides the video capture capabilities.
21 - enum:
22 - renesas,r8a774a1-csi2 # RZ/G2M
[all …]
Drenesas,vin.yaml1 # SPDX-License-Identifier: GPL-2.0-only
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Video Input (VIN)
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car Video Input (VIN) device provides video input capabilities for the
15 Renesas R-Car family of devices.
20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
25 - items:
26 - enum:
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/sprd/
Dsc9860.dtsi6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
53 compatible = "arm,cortex-a53", "arm,armv8";
55 enable-method = "psci";
56 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
[all …]
Dsc9836.dtsi10 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a53", "arm,armv8";
23 enable-method = "psci";
28 compatible = "arm,cortex-a53", "arm,armv8";
30 enable-method = "psci";
35 compatible = "arm,cortex-a53", "arm,armv8";
37 enable-method = "psci";
42 compatible = "arm,cortex-a53", "arm,armv8";
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/
Dgraph.txt4 ---------------
12 can not be inferred from device tree parent-child relationships. The device
22 Documentation/devicetree/bindings/media/video-interfaces.txt.
28 -----------------------------------
31 Each port node contains an 'endpoint' subnode for each remote device port
33 remote device, an 'endpoint' child node must be provided for each link.
35 endpoint at a port, or a port node needs to be associated with a selected
36 hardware interface, a common scheme using '#address-cells', '#size-cells'
41 #address-cells = <1>;
42 #size-cells = <0>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/
Dgraph.txt4 ---------------
12 can not be inferred from device tree parent-child relationships. The device
22 Documentation/devicetree/bindings/media/video-interfaces.txt.
28 -----------------------------------
31 Each port node contains an 'endpoint' subnode for each remote device port
33 remote device, an 'endpoint' child node must be provided for each link.
35 endpoint at a port, or a port node needs to be associated with a selected
36 hardware interface, a common scheme using '#address-cells', '#size-cells'
41 #address-cells = <1>;
42 #size-cells = <0>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/
Dr8a77950.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H3 (R8A77950) SoC
53 gpio-ranges = <&pfc 0 32 28>;
57 renesas,ipmmu-main = <&ipmmu_mm 11>;
61 renesas,ipmmu-main = <&ipmmu_mm 12>;
65 renesas,ipmmu-main = <&ipmmu_mm 9>;
69 renesas,ipmmu-main = <&ipmmu_mm 10>;
73 renesas,ipmmu-main = <&ipmmu_mm 7>;
77 /delete-node/ dma-controller@e6460000;
78 /delete-node/ dma-controller@e6470000;
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/renesas/
Dr8a7795-es1.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
16 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
21 /delete-node/ mmu@febe0000;
22 /delete-node/ mmu@fe980000;
23 /delete-node/ mmu@fd950000;
24 /delete-node/ mmu@fd960000;
25 /delete-node/ mmu@fd970000;
28 compatible = "renesas,ipmmu-r8a7795";
30 renesas,ipmmu-main = <&ipmmu_mm 5>;
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/media/
Drenesas,rcar-csi2.txt1 Renesas R-Car MIPI CSI-2
2 ------------------------
4 The R-Car CSI-2 receiver device provides MIPI CSI-2 capabilities for the
5 Renesas R-Car family of devices. It is used in conjunction with the
6 R-Car VIN module, which provides the video capture capabilities.
9 --------------------
10 - compatible: Must be one or more of the following
11 - "renesas,r8a7795-csi2" for the R8A7795 device.
12 - "renesas,r8a7796-csi2" for the R8A7796 device.
13 - "renesas,r8a77965-csi2" for the R8A77965 device.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/
Dcoresight.txt11 * Required properties for all components *except* non-configurable replicators
12 and non-configurable funnels:
16 - Embedded Trace Buffer (version 1.0):
17 "arm,coresight-etb10", "arm,primecell";
19 - Trace Port Interface Unit:
20 "arm,coresight-tpiu", "arm,primecell";
22 - Trace Memory Controller, used for Embedded Trace Buffer(ETB),
26 "arm,coresight-tmc", "arm,primecell";
28 - Trace Programmable Funnel:
29 "arm,coresight-dynamic-funnel", "arm,primecell";
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/
Dcoresight.txt11 * Required properties for all components *except* non-configurable replicators:
15 - Embedded Trace Buffer (version 1.0):
16 "arm,coresight-etb10", "arm,primecell";
18 - Trace Port Interface Unit:
19 "arm,coresight-tpiu", "arm,primecell";
21 - Trace Memory Controller, used for Embedded Trace Buffer(ETB),
25 "arm,coresight-tmc", "arm,primecell";
27 - Trace Funnel:
28 "arm,coresight-funnel", "arm,primecell";
30 - Embedded Trace Macrocell (version 3.x) and
[all …]

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