| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/dma/ |
| D | jz4780-dma.txt | 5 - compatible: Should be "ingenic,jz4780-dma"
6 - reg: Should contain the DMA controller registers location and length.
7 - interrupts: Should contain the interrupt specifier of the DMA controller.
8 - clocks: Should contain a clock specifier for the JZ4780 PDMA clock.
9 - #dma-cells: Must be <2>. Number of integer cells in the dmas property of
14 - ingenic,reserved-channels: Bitmask of channels to reserve for devices that
15 need a specific channel. These channels will only be assigned when explicitly
16 requested by a client. The primary use for this is channels 0 and 1, which
23 compatible = "ingenic,jz4780-dma";
26 interrupt-parent = <&intc>;
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| D | ti-edma.txt | 8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
[all …]
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| D | fsl-mxs-dma.txt | 4 - compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx"
5 - reg : Should contain registers location and length
6 - interrupts : Should contain the interrupt numbers of DMA channels.
7 If a channel is empty/reserved, 0 should be filled in place.
8 - #dma-cells : Must be <1>. The number cell specifies the channel ID.
9 - dma-channels : Number of channels supported by the DMA controller
12 - interrupt-names : Name of DMA channel interrupts
19 dma_apbh: dma-apbh@80004000 {
20 compatible = "fsl,imx28-dma-apbh";
26 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | ingenic,dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: "dma-controller.yaml#"
18 - ingenic,jz4740-dma
19 - ingenic,jz4725b-dma
20 - ingenic,jz4770-dma
21 - ingenic,jz4780-dma
22 - ingenic,x1000-dma
[all …]
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| D | ti-edma.txt | 8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
[all …]
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| D | dma-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
20 "#dma-cells":
27 dma-channel-mask:
29 Bitmask of available DMA channels in ascending order that are
30 not reserved by firmware and are available to the
32 The first item in the array is for channels 0-31, the second is for
[all …]
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| D | fsl-mxs-dma.txt | 4 - compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx"
5 - reg : Should contain registers location and length
6 - interrupts : Should contain the interrupt numbers of DMA channels.
7 If a channel is empty/reserved, 0 should be filled in place.
8 - #dma-cells : Must be <1>. The number cell specifies the channel ID.
9 - dma-channels : Number of channels supported by the DMA controller
12 - interrupt-names : Name of DMA channel interrupts
19 dma_apbh: dma-apbh@80004000 {
20 compatible = "fsl,imx28-dma-apbh";
26 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| D | scan.h | 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 * Copyright(c) 2018 - 2020 Intel Corporation
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34 * Copyright(c) 2018 - 2020 Intel Corporation
35 * All rights reserved.
[all …]
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| D | nvm-reg.h | 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 * Copyright(C) 2018 - 2020 Intel Corporation
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34 * Copyright(C) 2018 - 2020 Intel Corporation
35 * All rights reserved.
[all …]
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| /kernel/linux/linux-4.19/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| D | scan.h | 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
35 * All rights reserved.
74 * struct iwl_ssid_ie - directed scan network information element
114 * struct iwl_scan_offload_blacklist - SCAN_OFFLOAD_BLACKLIST_S
[all …]
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| D | nvm-reg.h | 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
35 * All rights reserved.
69 * enum iwl_regulatory_and_nvm_subcmd_ids - regulatory/NVM commands
86 * enum iwl_nvm_access_op - NVM access opcode
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/iio/adc/ |
| D | cc10001_adc.txt | 1 * Cosmic Circuits - Analog to Digital Converter (CC-10001-ADC)
4 - compatible: Should be "cosmic,10001-adc"
5 - reg: Should contain adc registers location and length.
6 - clock-names: Should contain "adc".
7 - clocks: Should contain a clock specifier for each entry in clock-names
8 - vref-supply: The regulator supply ADC reference voltage.
11 - adc-reserved-channels: Bitmask of reserved channels,
12 i.e. channels that cannot be used by the OS.
16 compatible = "cosmic,10001-adc";
18 adc-reserved-channels = <0x2>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | cosmic,10001-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cosmic Circuits CC-10001 ADC
10 - Jonathan Cameron <jic23@kernel.org>
13 Cosmic Circuits 10001 10-bit ADC device.
17 const: cosmic,10001-adc
22 adc-reserved-channels:
25 Bitmask of reserved channels, i.e. channels that cannot be
[all …]
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| /kernel/linux/linux-5.10/drivers/interconnect/qcom/ |
| D | icc-rpmh.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
9 #include <dt-bindings/interconnect/qcom,icc.h>
15 * struct qcom_icc_provider - Qualcomm specific interconnect provider
31 * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager (BCM)
35 * @reserved: reserved field
41 u8 reserved; member
50 * struct qcom_icc_node - Qualcomm specific interconnect nodes
55 * @channels: num of channels at this node
67 u16 channels; member
[all …]
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| /kernel/linux/linux-4.19/drivers/staging/comedi/drivers/ |
| D | amplc_dio200.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2005-2013 MEV Ltd. <http://www.mev.co.uk/>
9 * COMEDI - Linux Control and Measurement Device Interface
24 * [0] - I/O port base address
25 * [1] - IRQ (optional, but commands won't work without it)
32 * ------------- ------------- -------------
34 * 0 PPI-X PPI-X PPI-X
35 * 1 CTR-Y1 PPI-Y PPI-Y
36 * 2 CTR-Y2 CTR-Z1* CTR-Z1
37 * 3 CTR-Z1 INTERRUPT* CTR-Z2
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/comedi/drivers/ |
| D | amplc_dio200.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
9 * COMEDI - Linux Control and Measurement Device Interface
24 * [0] - I/O port base address
25 * [1] - IRQ (optional, but commands won't work without it)
32 * ------------- ------------- -------------
34 * 0 PPI-X PPI-X PPI-X
35 * 1 CTR-Y1 PPI-Y PPI-Y
36 * 2 CTR-Y2 CTR-Z1* CTR-Z1
37 * 3 CTR-Z1 INTERRUPT* CTR-Z2
[all …]
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| /kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/ |
| D | vidioc-g-modulator.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_MODULATOR - VIDIOC_S_MODULATOR - Get or set modulator attributes
39 ``index`` field and zero out the ``reserved`` array of a struct
49 initialize the ``index`` and ``txsubchans`` fields and the ``reserved``
52 this is a write-only ioctl, it does not return the actual audio
67 .. flat-table:: struct v4l2_modulator
68 :header-rows: 0
69 :stub-columns: 0
72 * - __u32
73 - ``index``
[all …]
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| /kernel/linux/linux-4.19/Documentation/media/uapi/v4l/ |
| D | vidioc-g-modulator.rst | 1 .. -*- coding: utf-8; mode: rst -*-
12 VIDIOC_G_MODULATOR - VIDIOC_S_MODULATOR - Get or set modulator attributes
29 File descriptor returned by :ref:`open() <func-open>`.
39 ``index`` field and zero out the ``reserved`` array of a struct
49 initialize the ``index`` and ``txsubchans`` fields and the ``reserved``
52 this is a write-only ioctl, it does not return the actual audio
68 .. flat-table:: struct v4l2_modulator
69 :header-rows: 0
70 :stub-columns: 0
73 * - __u32
[all …]
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| /kernel/linux/linux-4.19/include/linux/ |
| D | hyperv.h | 16 * Place - Suite 330, Boston, MA 02111-1307 USA.
45 /* Single-page buffer */
52 /* Multiple-page buffer */
61 * Multiple-page buffer array; the pfn array is variable size:
92 * WS2012/Win8 and later versions of Hyper-V implement interrupt
94 * is set by the host on the host->guest ring buffer, and by the
95 * guest on the guest->host ring buffer.
99 * the feature bit in the guest->host ring buffer, the guest is
101 * 1) It will set the pending_send_sz field in the guest->host ring
103 * 2) It will read the pending_send_sz field in the host->guest
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| /kernel/linux/linux-4.19/Documentation/rapidio/ |
| D | tsi721.txt | 1 RapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.
8 doorbells, inbound maintenance port-writes and RapidIO messaging.
11 channels. This mechanism provides access to larger range of hop counts and
14 RapidIO messaging support uses dedicated messaging channels for each mailbox.
20 - 'dbg_level' - This parameter allows to control amount of debug information
28 - 'dma_desc_per_channel' - This parameter defines number of hardware buffer
32 - 'dma_txqueue_sz' - DMA transactions queue size. Defines number of pending
36 - 'dma_sel' - DMA channel selection mask. Bitmask that defines which hardware
37 DMA channels (0 ... 6) will be registered with DmaEngine core.
39 DMA channels not selected by this mask will not be used by this device
[all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/rapidio/ |
| D | tsi721.rst | 2 RapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.
10 doorbells, inbound maintenance port-writes and RapidIO messaging.
13 channels. This mechanism provides access to larger range of hop counts and
16 RapidIO messaging support uses dedicated messaging channels for each mailbox.
23 - 'dbg_level'
24 - This parameter allows to control amount of debug information
32 - 'dma_desc_per_channel'
33 - This parameter defines number of hardware buffer
37 - 'dma_txqueue_sz'
38 - DMA transactions queue size. Defines number of pending
[all …]
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| /kernel/linux/linux-5.10/sound/soc/amd/ |
| D | acp.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
72 /* Playback DMA channels */
76 /* Capture DMA channels */
80 /* Playback DMA Channels for I2S BT instance */
84 /* Capture DMA Channels for I2S BT Instance */
203 /* Reserved for future use */
204 u32 reserved; member
|
| /kernel/linux/linux-4.19/sound/soc/amd/ |
| D | acp.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
72 /* Playback DMA channels */
76 /* Capture DMA channels */
80 /* Playback DMA Channels for I2S BT instance */
84 /* Capture DMA Channels for I2S BT Instance */
202 /* Reserved for future use */
203 u32 reserved; member
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/ |
| D | fsl-sec2.txt | 1 Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
5 - compatible : Should contain entries for this and backward compatible
9 - reg : Offset and length of the register set for the device
10 - interrupts : the SEC's interrupt number
11 - fsl,num-channels : An integer representing the number of channels
13 - fsl,channel-fifo-len : An integer representing the number of
15 - fsl,exec-units-mask : The bitmask representing what execution units
16 (EUs) are available. It's a single 32-bit cell. EU information
20 bit 0 = reserved - should be 0
23 bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/crypto/ |
| D | fsl-sec2.txt | 1 Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
5 - compatible : Should contain entries for this and backward compatible
9 - reg : Offset and length of the register set for the device
10 - interrupts : the SEC's interrupt number
11 - fsl,num-channels : An integer representing the number of channels
13 - fsl,channel-fifo-len : An integer representing the number of
15 - fsl,exec-units-mask : The bitmask representing what execution units
16 (EUs) are available. It's a single 32-bit cell. EU information
20 bit 0 = reserved - should be 0
23 bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
[all …]
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