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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/interrupt-controller/
Dmips-gic.txt4 It also supports local (per-processor) interrupts and software-generated
5 interrupts which can be used as IPIs. The GIC also includes a free-running
6 global timer, per-CPU count/compare timers, and a watchdog.
9 - compatible : Should be "mti,gic".
10 - interrupt-controller : Identifies the node as an interrupt controller
11 - #interrupt-cells : Specifies the number of cells needed to encode an
13 - The first cell is the type of interrupt, local or shared.
14 See <include/dt-bindings/interrupt-controller/mips-gic.h>.
15 - The second cell is the GIC interrupt number.
16 - The third cell encodes the interrupt flags.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dmti,gic.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mti,gic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Burton <paulburton@kernel.org>
11 - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
15 It also supports local (per-processor) interrupts and software-generated
16 interrupts which can be used as IPIs. The GIC also includes a free-running
17 global timer, per-CPU count/compare timers, and a watchdog.
23 "#interrupt-cells":
[all …]
/kernel/linux/linux-5.10/arch/ia64/include/asm/
Dhw_irq.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2001-2003 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
23 * 1,3-14 are reserved from firmware
25 * 16-255 (vectored external interrupts) are available
37 #define AUTO_ASSIGN -1
42 * Vectors 0x10-0x1f are used for low priority interrupts, e.g. CMCI.
45 #define IA64_CMCP_VECTOR 0x1d /* corrected machine-check polling vector */
47 #define IA64_CMC_VECTOR 0x1f /* corrected machine-check interrupt vector */
49 * Vectors 0x20-0x2f are reserved for legacy ISA IRQs.
[all …]
/kernel/linux/linux-4.19/arch/ia64/include/asm/
Dhw_irq.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2001-2003 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
24 * 1,3-14 are reserved from firmware
26 * 16-255 (vectored external interrupts) are available
38 #define AUTO_ASSIGN -1
43 * Vectors 0x10-0x1f are used for low priority interrupts, e.g. CMCI.
46 #define IA64_CMCP_VECTOR 0x1d /* corrected machine-check polling vector */
48 #define IA64_CMC_VECTOR 0x1f /* corrected machine-check interrupt vector */
50 * Vectors 0x20-0x2f are reserved for legacy ISA IRQs.
[all …]
/kernel/linux/linux-5.10/arch/arc/kernel/
Dentry-arcv2.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * ARCv2 ISA based core Low Level Intr/Traps/Exceptions(non-TLB) Handling
16 ; first 16 lines are reserved for exceptions and are not configurable.
28 # Initial 16 slots are Exception Vectors
43 VECTOR reserved ; Reserved slots
44 VECTOR reserved ; Reserved slots
46 # Begin Interrupt Vectors
50 VECTOR handle_interrupt ; (19) Inter core Interrupt (IPI)
52 VECTOR handle_interrupt ; (21) Software Triggered Intr (Self IPI)
57 .rept NR_CPU_IRQS - 8
[all …]
/kernel/linux/linux-4.19/arch/arc/kernel/
Dentry-arcv2.S2 * ARCv2 ISA based core Low Level Intr/Traps/Exceptions(non-TLB) Handling
19 ; first 16 lines are reserved for exceptions and are not configurable.
31 # Initial 16 slots are Exception Vectors
46 VECTOR reserved ; Reserved slots
47 VECTOR reserved ; Reserved slots
49 # Begin Interrupt Vectors
53 VECTOR handle_interrupt ; (19) Inter core Interrupt (IPI)
55 VECTOR handle_interrupt ; (21) Software Triggered Intr (Self IPI)
60 .rept NR_CPU_IRQS - 8
66 reserved: label
[all …]
/kernel/linux/linux-4.19/drivers/irqchip/
Dirq-mips-gic.c6 * Copyright (C) 2008 Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
10 #define pr_fmt(fmt) "irq-mips-gic: " fmt
24 #include <asm/mips-cps.h>
28 #include <dt-bindings/interrupt-controller/mips-gic.h>
42 #define GIC_HWIRQ_TO_LOCAL(x) ((x) - GIC_LOCAL_HWIRQ_BASE)
45 #define GIC_HWIRQ_TO_SHARED(x) ((x) - GIC_SHARED_HWIRQ_BASE)
102 irq -= GIC_PIN_TO_VEC_OFFSET; in gic_bind_eic_interrupt()
128 return -1; in gic_get_c0_perfcount_int()
140 return -1; in gic_get_c0_fdc_int()
[all …]
/kernel/linux/linux-5.10/drivers/irqchip/
Dirq-mips-gic.c6 * Copyright (C) 2008 Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
10 #define pr_fmt(fmt) "irq-mips-gic: " fmt
24 #include <asm/mips-cps.h>
28 #include <dt-bindings/interrupt-controller/mips-gic.h>
42 #define GIC_HWIRQ_TO_LOCAL(x) ((x) - GIC_LOCAL_HWIRQ_BASE)
45 #define GIC_HWIRQ_TO_SHARED(x) ((x) - GIC_SHARED_HWIRQ_BASE)
102 irq -= GIC_PIN_TO_VEC_OFFSET; in gic_bind_eic_interrupt()
128 return -1; in gic_get_c0_perfcount_int()
140 return -1; in gic_get_c0_fdc_int()
[all …]
/kernel/linux/linux-5.10/arch/mips/include/asm/netlogic/xlp-hal/
Dpic.h2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
3 * reserved.
59 /* PIC IPI control register offsets */
69 #define PIC_IRT_RVEC 20 /* Interrupt receive vectors */
335 uint64_t ipi; in nlm_pic_send_ipi() local
338 ipi = (nmi << 23) | (irq << 24) | in nlm_pic_send_ipi()
341 ipi = ((uint64_t)nmi << 31) | (irq << 20) | in nlm_pic_send_ipi()
344 nlm_write_pic_reg(base, PIC_IPI_CTL, ipi); in nlm_pic_send_ipi()
/kernel/linux/linux-4.19/arch/mips/include/asm/netlogic/xlp-hal/
Dpic.h2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
3 * reserved.
59 /* PIC IPI control register offsets */
69 #define PIC_IRT_RVEC 20 /* Interrupt receive vectors */
335 uint64_t ipi; in nlm_pic_send_ipi() local
338 ipi = (nmi << 23) | (irq << 24) | in nlm_pic_send_ipi()
341 ipi = ((uint64_t)nmi << 31) | (irq << 20) | in nlm_pic_send_ipi()
344 nlm_write_pic_reg(base, PIC_IPI_CTL, ipi); in nlm_pic_send_ipi()
/kernel/linux/linux-5.10/arch/powerpc/sysdev/
Dmpic.c9 * Copyright 2010-2012 Freescale Semiconductor, Inc.
150 #define MPIC_INFO(name) mpic->hw_set[MPIC_IDX_##name]
162 if (!(mpic->flags & MPIC_SECONDARY)) in mpic_processor_id()
180 return dcr_read(rb->dhost, reg); in _mpic_read()
183 return in_be32(rb->base + (reg >> 2)); in _mpic_read()
186 return in_le32(rb->base + (reg >> 2)); in _mpic_read()
197 dcr_write(rb->dhost, reg, value); in _mpic_write()
201 out_be32(rb->base + (reg >> 2), value); in _mpic_write()
205 out_le32(rb->base + (reg >> 2), value); in _mpic_write()
210 static inline u32 _mpic_ipi_read(struct mpic *mpic, unsigned int ipi) in _mpic_ipi_read() argument
[all …]
/kernel/linux/linux-4.19/arch/powerpc/sysdev/
Dmpic.c9 * Copyright 2010-2012 Freescale Semiconductor, Inc.
150 #define MPIC_INFO(name) mpic->hw_set[MPIC_IDX_##name]
162 if (!(mpic->flags & MPIC_SECONDARY)) in mpic_processor_id()
180 return dcr_read(rb->dhost, reg); in _mpic_read()
183 return in_be32(rb->base + (reg >> 2)); in _mpic_read()
186 return in_le32(rb->base + (reg >> 2)); in _mpic_read()
197 dcr_write(rb->dhost, reg, value); in _mpic_write()
201 out_be32(rb->base + (reg >> 2), value); in _mpic_write()
205 out_le32(rb->base + (reg >> 2), value); in _mpic_write()
210 static inline u32 _mpic_ipi_read(struct mpic *mpic, unsigned int ipi) in _mpic_ipi_read() argument
[all …]
/kernel/linux/linux-4.19/arch/arm64/kernel/
Dentry.S2 * Low-level exception handling code
21 #include <linux/arm-smccc.h>
27 #include <asm/asm-offsets.h>
37 #include <asm/asm-uaccess.h>
64 *-----------------
93 sub x0, sp, x0 // x0' = sp' - x0 = (sp + x0) - x0 = sp
95 sub x0, sp, x0 // x0'' = sp' - x0' = (sp + x0) - sp = x0
96 sub sp, sp, x0 // sp'' = sp' - x0 = (sp + x0) - x0 = sp
118 * after panic() re-enables interrupts.
122 tst x0, #~(OVERFLOW_STACK_SIZE - 1) // within range?
[all …]
/kernel/linux/linux-4.19/arch/x86/include/asm/
Dhyperv-tlfs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * This file contains definitions from Hyper-V Hypervisor Top-Level Functional
6 * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
145 * than inter-processor interrupts
150 * EOI, ICR and TPR rather than their memory-mapped counterparts
153 /* Recommend using the hypervisor-provided MSR to initiate a system RESET */
163 * Recommend not using Auto End-Of-Interrupt feature
168 * Recommend using cluster IPI hypercalls.
199 /* MSR used to read the per-partition time reference counter */
249 /* Hyper-V guest crash notification MSR's */
[all …]
/kernel/linux/linux-4.19/arch/mips/kvm/
Dmips.c8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
98 return !!(vcpu->arch.pending_exceptions); in kvm_arch_vcpu_runnable()
113 return kvm_mips_callbacks->hardware_enable(); in kvm_arch_hardware_enable()
118 kvm_mips_callbacks->hardware_disable(); in kvm_arch_hardware_disable()
144 return -EINVAL; in kvm_arch_init_vm()
147 /* Allocate page table to map GPA -> RPA */ in kvm_arch_init_vm()
148 kvm->arch.gpa_mm.pgd = kvm_pgd_alloc(); in kvm_arch_init_vm()
149 if (!kvm->arch.gpa_mm.pgd) in kvm_arch_init_vm()
150 return -ENOMEM; in kvm_arch_init_vm()
174 mutex_lock(&kvm->lock); in kvm_mips_free_vcpus()
[all …]
/kernel/linux/linux-5.10/arch/mips/kvm/
Dmips.c8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
102 return !!(vcpu->arch.pending_exceptions); in kvm_arch_vcpu_runnable()
117 return kvm_mips_callbacks->hardware_enable(); in kvm_arch_hardware_enable()
122 kvm_mips_callbacks->hardware_disable(); in kvm_arch_hardware_disable()
150 return -EINVAL; in kvm_arch_init_vm()
153 /* Allocate page table to map GPA -> RPA */ in kvm_arch_init_vm()
154 kvm->arch.gpa_mm.pgd = kvm_pgd_alloc(); in kvm_arch_init_vm()
155 if (!kvm->arch.gpa_mm.pgd) in kvm_arch_init_vm()
156 return -ENOMEM; in kvm_arch_init_vm()
174 mutex_lock(&kvm->lock); in kvm_mips_free_vcpus()
[all …]
/kernel/linux/linux-4.19/drivers/infiniband/ulp/srp/
Dib_srp.c2 * Copyright (c) 2005 Cisco Systems. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
138 …le completion vectors. The default value is the minimum of four times the number of online CPU soc…
163 int tmo = *(int *)kp->arg; in srp_tmo_get()
179 if (kp->arg == &srp_reconnect_delay) in srp_tmo_set()
182 else if (kp->arg == &srp_fast_io_fail_tmo) in srp_tmo_set()
189 *(int *)kp->arg = tmo; in srp_tmo_set()
202 return (struct srp_target_port *) host->hostdata; in host_to_target()
207 return host_to_target(host)->target_name; in srp_target_info()
[all …]
/kernel/linux/linux-5.10/drivers/infiniband/ulp/srp/
Dib_srp.c2 * Copyright (c) 2005 Cisco Systems. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
142 …le completion vectors. The default value is the minimum of four times the number of online CPU soc…
169 int tmo = *(int *)kp->arg; in srp_tmo_get()
185 if (kp->arg == &srp_reconnect_delay) in srp_tmo_set()
188 else if (kp->arg == &srp_fast_io_fail_tmo) in srp_tmo_set()
195 *(int *)kp->arg = tmo; in srp_tmo_set()
208 return (struct srp_target_port *) host->hostdata; in host_to_target()
213 return host_to_target(host)->target_name; in srp_target_info()
[all …]
/kernel/linux/linux-5.10/arch/x86/kernel/apic/
Dapic.c1 // SPDX-License-Identifier: GPL-2.0-only
13 * Mikael Pettersson : Power Management for UP-APIC.
61 #include <asm/intel-family.h>
69 unsigned int boot_cpu_physical_apicid __ro_after_init = -1U;
148 * +1=force-enable
240 * so apic->write/read doesn't do anything
293 * get_physical_broadcast - Get number of physical broadcast IDs
302 * lapic_get_maxlvt - get the maximum number of local vector table entries
307 * - we always have APIC integrated on 64bit mode in lapic_get_maxlvt()
308 * - 82489DXs do not report # of LVT entries in lapic_get_maxlvt()
[all …]
/kernel/linux/linux-4.19/arch/x86/kvm/
Dlapic.c18 * the COPYING file in the top-level directory.
47 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
61 #define APIC_VERSION (0x14UL | ((KVM_APIC_LVT_NUM - 1) << 16))
80 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_pending_eoi()
82 return apic_test_vector(vector, apic->regs + APIC_ISR) || in kvm_apic_pending_eoi()
83 apic_test_vector(vector, apic->regs + APIC_IRR); in kvm_apic_pending_eoi()
123 return apic->vcpu->vcpu_id; in kvm_x2apic_id()
128 switch (map->mode) { in kvm_apic_map_get_logical_dest()
131 u32 max_apic_id = map->max_apic_id; in kvm_apic_map_get_logical_dest()
134 u8 cluster_size = min(max_apic_id - offset + 1, 16U); in kvm_apic_map_get_logical_dest()
[all …]
/kernel/linux/linux-5.10/arch/x86/kvm/
Dlapic.c1 // SPDX-License-Identifier: GPL-2.0-only
46 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
57 #define APIC_VERSION (0x14UL | ((KVM_APIC_LVT_NUM - 1) << 16))
68 /* step-by-step approximation to mitigate fluctuation */
78 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_pending_eoi()
80 return apic_test_vector(vector, apic->regs + APIC_ISR) || in kvm_apic_pending_eoi()
81 apic_test_vector(vector, apic->regs + APIC_IRR); in kvm_apic_pending_eoi()
111 return apic->vcpu->vcpu_id; in kvm_x2apic_id()
122 && !(kvm_mwait_in_guest(vcpu->kvm) || in kvm_can_use_hv_timer()
129 return kvm_can_post_timer_interrupt(vcpu) && vcpu->mode == IN_GUEST_MODE; in kvm_use_posted_timer_interrupt()
[all …]
/kernel/linux/linux-5.10/arch/arm64/kernel/
Dcpufeature.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * there's a little bit of over-abstraction that tends to obscure what's going
14 * user-visible instructions are available only on a subset of the available
18 * snapshot state to indicate the lowest-common denominator of the feature,
31 * - Mismatched features are *always* sanitised to a "safe" value, which
34 * - A mismatched feature marked with FTR_STRICT will cause a "SANITY CHECK"
38 * - Features marked as FTR_VISIBLE have their sanitised value visible to
43 * - A "feature" is typically a 4-bit register field. A "capability" is the
44 * high-level description derived from the sanitised field value.
46 * - Read the Arm ARM (DDI 0487F.a) section D13.1.3 ("Principles of the ID
[all …]
/kernel/linux/linux-4.19/arch/x86/kernel/apic/
Dapic.c12 * Mikael Pettersson : Power Management for UP-APIC.
58 #include <asm/intel-family.h>
66 unsigned int boot_cpu_physical_apicid = -1U;
145 * +1=force-enable
232 * so apic->write/read doesn't do anything
285 * get_physical_broadcast - Get number of physical broadcast IDs
294 * lapic_get_maxlvt - get the maximum number of local vector table entries
299 * - we always have APIC integrated on 64bit mode in lapic_get_maxlvt()
300 * - 82489DXs do not report # of LVT entries in lapic_get_maxlvt()
343 * See Intel SDM: TSC-Deadline Mode chapter. In xAPIC mode, in __setup_APIC_LVTT()
[all …]
/kernel/linux/linux-5.10/arch/arm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
131 The ARM series is a line of low-power-consumption RISC chip designs
133 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
134 manufactured, but legacy ARM-based PC hardware remains popular in
244 Patch phys-to-virt and virt-to-phys translation functions at
248 This can only be used with non-XIP MMU kernels where the base
294 bool "MMU-based Paged Memory Management Support"
297 Select if you want MMU-based virtualised addressing space
336 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
349 bool "EBSA-110"
[all …]
/kernel/linux/linux-4.19/arch/arm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
115 The ARM series is a line of low-power-consumption RISC chip designs
117 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
118 manufactured, but legacy ARM-based PC hardware remains popular in
170 ---help---
179 Say Y here if you are building a kernel for an EISA-based machine.
251 Patch phys-to-virt and virt-to-phys translation functions at
255 This can only be used with non-XIP MMU kernels where the base
305 bool "MMU-based Paged Memory Management Support"
308 Select if you want MMU-based virtualised addressing space
[all …]

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