| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/rtc/ |
| D | ingenic,jz4740-rtc.txt | 1 JZ4740 and similar SoCs real-time clock driver
5 - compatible: One of:
6 - "ingenic,jz4740-rtc" - for use with the JZ4740 SoC
7 - "ingenic,jz4780-rtc" - for use with the JZ4780 SoC
8 - reg: Address range of rtc register set
9 - interrupts: IRQ number for the alarm interrupt
10 - clocks: phandle to the "rtc" clock
11 - clock-names: must be "rtc"
14 - system-power-controller: To use this component as the
16 - reset-pin-assert-time-ms: Reset pin low-level assertion
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/ |
| D | ingenic,rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs Real-Time Clock DT bindings
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: rtc.yaml#
18 - enum:
19 - ingenic,jz4740-rtc
20 - ingenic,jz4760-rtc
21 - items:
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/sound/ |
| D | ti,tas5086.txt | 1 Texas Instruments TAS5086 6-channel PWM Processor
5 - compatible: Should contain "ti,tas5086".
6 - reg: The i2c address. Should contain <0x1b>.
10 - reset-gpio: A GPIO spec to define which pin is connected to the
11 chip's !RESET pin. If specified, the driver will
12 assert a hardware reset at probe time.
14 - ti,charge-period: This property should contain the time in microseconds
15 that closely matches the external single-ended
16 split-capacitor charge period. The hardware chip
17 waits for this period of time before starting the
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | ti,tas5086.txt | 1 Texas Instruments TAS5086 6-channel PWM Processor
5 - compatible: Should contain "ti,tas5086".
6 - reg: The i2c address. Should contain <0x1b>.
10 - reset-gpio: A GPIO spec to define which pin is connected to the
11 chip's !RESET pin. If specified, the driver will
12 assert a hardware reset at probe time.
14 - ti,charge-period: This property should contain the time in microseconds
15 that closely matches the external single-ended
16 split-capacitor charge period. The hardware chip
17 waits for this period of time before starting the
[all …]
|
| /kernel/linux/linux-5.10/drivers/rtc/ |
| D | rtc-jz4740.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
66 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
76 } while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout); in jz4740_rtc_wait_write_ready()
78 return timeout ? 0 : -EIO; in jz4740_rtc_wait_write_ready()
90 writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write()
93 ctrl = readl(rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write()
94 } while (!(ctrl & JZ_RTC_WENR_WEN) && --timeout); in jz4780_rtc_enable_write()
96 return timeout ? 0 : -EIO; in jz4780_rtc_enable_write()
104 if (rtc->type >= ID_JZ4760) in jz4740_rtc_reg_write()
[all …]
|
| /kernel/linux/linux-4.19/drivers/rtc/ |
| D | rtc-jz4740.c | 2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
79 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
89 } while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout); in jz4740_rtc_wait_write_ready()
91 return timeout ? 0 : -EIO; in jz4740_rtc_wait_write_ready()
103 writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write()
106 ctrl = readl(rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write()
107 } while (!(ctrl & JZ_RTC_WENR_WEN) && --timeout); in jz4780_rtc_enable_write()
109 return timeout ? 0 : -EIO; in jz4780_rtc_enable_write()
117 if (rtc->type >= ID_JZ4780) in jz4740_rtc_reg_write()
122 writel(val, rtc->base + reg); in jz4740_rtc_reg_write()
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3399-gru-scarlet.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-scarlet board device tree source
8 #include "rk3399-gru.dtsi"
14 pp1250_s3: pp1250-s3 {
15 compatible = "regulator-fixed";
16 regulator-name = "pp1250_s3";
19 regulator-always-on;
20 regulator-boot-on;
21 regulator-min-microvolt = <1250000>;
22 regulator-max-microvolt = <1250000>;
[all …]
|
| /kernel/linux/linux-5.10/drivers/pps/clients/ |
| D | pps-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pps-gpio.c -- PPS client driver using GPIO
9 #define PPS_GPIO_NAME "pps-gpio"
19 #include <linux/pps-gpio.h>
34 struct timer_list echo_timer; /* timer to reset echo active state */
51 /* Get the time stamp first */ in pps_gpio_irq_handler()
56 rising_edge = gpiod_get_value(info->gpio_pin); in pps_gpio_irq_handler()
57 if ((rising_edge && !info->assert_falling_edge) || in pps_gpio_irq_handler()
58 (!rising_edge && info->assert_falling_edge)) in pps_gpio_irq_handler()
59 pps_event(info->pps, &ts, PPS_CAPTUREASSERT, data); in pps_gpio_irq_handler()
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/ |
| D | parade-ps8622.c | 1 // SPDX-License-Identifier: GPL-2.0-only
69 struct i2c_adapter *adap = client->adapter; in ps8622_set()
73 msg.addr = client->addr + page; in ps8622_set()
81 client->addr + page, reg, val, ret); in ps8622_set()
87 struct i2c_client *cl = ps8622->client; in ps8622_send_config()
138 /* [7:5] DCO_FTRNG=+-40% */ in ps8622_send_config()
148 /* Gitune=-37% */ in ps8622_send_config()
168 /* [7:6] Right-bar GPIO output strength is 8mA */ in ps8622_send_config()
180 err = ps8622_set(cl, 0x01, 0x02, 0x80 | ps8622->max_lane_count); in ps8622_send_config()
185 err = ps8622_set(cl, 0x01, 0x21, 0x80 | ps8622->lane_count); in ps8622_send_config()
[all …]
|
| /kernel/linux/linux-5.10/arch/mips/include/asm/sn/ |
| D | ioc3.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
50 u8 fill0[0x151 - 0x142 - 1];
56 u8 fill1[0x159 - 0x153 - 1];
62 u8 fill2[0x16a - 0x15b - 1];
67 u8 fill3[0x170 - 0x16b - 1];
153 u32 pad1[(0x20000 - 0x00154) / 4];
157 u32 pad2[(0x40000 - 0x20180) / 4];
160 u32 ssram[(0x80000 - 0x40000) / 4];
163 0x80000 - Access to the generic devices selected with DEV0
165 0xA0000 - Access to the generic devices selected with DEV1
[all …]
|
| /kernel/linux/linux-4.19/drivers/gpu/drm/bridge/ |
| D | parade-ps8622.c | 83 struct i2c_adapter *adap = client->adapter; in ps8622_set()
87 msg.addr = client->addr + page; in ps8622_set()
95 client->addr + page, reg, val, ret); in ps8622_set()
101 struct i2c_client *cl = ps8622->client; in ps8622_send_config()
152 /* [7:5] DCO_FTRNG=+-40% */ in ps8622_send_config()
162 /* Gitune=-37% */ in ps8622_send_config()
182 /* [7:6] Right-bar GPIO output strength is 8mA */ in ps8622_send_config()
194 err = ps8622_set(cl, 0x01, 0x02, 0x80 | ps8622->max_lane_count); in ps8622_send_config()
199 err = ps8622_set(cl, 0x01, 0x21, 0x80 | ps8622->lane_count); in ps8622_send_config()
216 /* Counter number, add 1ms counter delay */ in ps8622_send_config()
[all …]
|
| /kernel/linux/linux-4.19/arch/mips/include/asm/sn/ |
| D | ioc3.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
47 volatile u8 fill0[0x150 - 0x142 - 1];
53 volatile u8 fill1[0x158 - 0x152 - 1];
59 volatile u8 fill2[0x168 - 0x15a - 1];
64 volatile u8 fill3[0x170 - 0x169 - 1];
161 volatile u32 pad1[(0x20000 - 0x00154) / 4];
165 volatile u32 pad2[(0x40000 - 0x20180) / 4];
168 volatile u32 ssram[(0x80000 - 0x40000) / 4];
171 0x80000 - Access to the generic devices selected with DEV0
173 0xA0000 - Access to the generic devices selected with DEV1
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/ethernet/chelsio/cxgb/ |
| D | pm3393.c | 7 * PMC/SIERRA (pm3393) MAC-PHY functionality. *
23 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
96 t1_tpi_read(cmac->adapter, OFFSET(reg), data32); in pmread()
102 t1_tpi_write(cmac->adapter, OFFSET(reg), data32); in pmwrite()
106 /* Port reset. */
124 /* PM3393 - Enabling all hardware block interrupts. in pm3393_interrupt_enable()
147 /* PM3393 - Global interrupt enable in pm3393_interrupt_enable()
153 /* TERMINATOR - PL_INTERUPTS_EXT */ in pm3393_interrupt_enable()
154 pl_intr = readl(cmac->adapter->regs + A_PL_ENABLE); in pm3393_interrupt_enable()
156 writel(pl_intr, cmac->adapter->regs + A_PL_ENABLE); in pm3393_interrupt_enable()
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb/ |
| D | pm3393.c | 7 * PMC/SIERRA (pm3393) MAC-PHY functionality. *
23 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
96 t1_tpi_read(cmac->adapter, OFFSET(reg), data32); in pmread()
102 t1_tpi_write(cmac->adapter, OFFSET(reg), data32); in pmwrite()
106 /* Port reset. */
124 /* PM3393 - Enabling all hardware block interrupts. in pm3393_interrupt_enable()
147 /* PM3393 - Global interrupt enable in pm3393_interrupt_enable()
153 /* TERMINATOR - PL_INTERUPTS_EXT */ in pm3393_interrupt_enable()
154 pl_intr = readl(cmac->adapter->regs + A_PL_ENABLE); in pm3393_interrupt_enable()
156 writel(pl_intr, cmac->adapter->regs + A_PL_ENABLE); in pm3393_interrupt_enable()
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/igb/ |
| D | e1000_defines.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
44 #define E1000_CTRL_EXT_SDP2_DATA 0x00000040 /* Value of SW Defineable Pin 2 */
45 #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Defineable Pin 3 */
49 /* Physical Func Reset Done Indication */
62 /* Interrupt acknowledge Auto-mask */
91 #define E1000_RXD_STAT_TS 0x10000 /* Pkt was time stamped */
118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
183 #define E1000_CTRL_LRST 0x00000008 /* Link reset. 0=normal,1=reset */
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/ethernet/intel/igb/ |
| D | e1000_defines.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
44 #define E1000_CTRL_EXT_SDP2_DATA 0x00000040 /* Value of SW Defineable Pin 2 */
45 #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Defineable Pin 3 */
49 /* Physical Func Reset Done Indication */
62 /* Interrupt acknowledge Auto-mask */
91 #define E1000_RXD_STAT_TS 0x10000 /* Pkt was time stamped */
118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
183 #define E1000_CTRL_LRST 0x00000008 /* Link reset. 0=normal,1=reset */
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/ixgb/ |
| D | ixgb_hw.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2008 Intel Corporation. */
61 /* Workaround for 82597EX reset errata */ in ixgb_mac_reset()
67 /* Delay a few ms just to allow the reset to complete */ in ixgb_mac_reset()
71 /* Make sure the self-clearing global reset bit did self clear */ in ixgb_mac_reset()
72 ASSERT(!(ctrl_reg & IXGB_CTRL0_RST)); in ixgb_mac_reset()
75 if (hw->subsystem_vendor_id == PCI_VENDOR_ID_SUN) { in ixgb_mac_reset()
86 if (hw->phy_type == ixgb_phy_type_txn17401) in ixgb_mac_reset()
93 * Reset the transmit and receive units; mask and clear all interrupts.
95 * hw - Struct containing variables accessed by shared code
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/ethernet/intel/ixgb/ |
| D | ixgb_hw.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2008 Intel Corporation. */
61 /* Workaround for 82597EX reset errata */ in ixgb_mac_reset()
67 /* Delay a few ms just to allow the reset to complete */ in ixgb_mac_reset()
71 /* Make sure the self-clearing global reset bit did self clear */ in ixgb_mac_reset()
72 ASSERT(!(ctrl_reg & IXGB_CTRL0_RST)); in ixgb_mac_reset()
75 if (hw->subsystem_vendor_id == PCI_VENDOR_ID_SUN) { in ixgb_mac_reset()
86 if (hw->phy_type == ixgb_phy_type_txn17401) in ixgb_mac_reset()
93 * Reset the transmit and receive units; mask and clear all interrupts.
95 * hw - Struct containing variables accessed by shared code
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/ethernet/marvell/ |
| D | skge.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
139 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
140 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
141 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
149 CS_MRST_CLR = 1<<3, /* Clear Master reset */
150 CS_MRST_SET = 1<<2, /* Set Master reset */
151 CS_RST_CLR = 1<<1, /* Clear Software reset */
152 CS_RST_SET = 1, /* Set Software reset */
223 IS_IRQ_TIST_OV = 1<<13, /* Time Stamp Timer Overflow (YUKON only) */
229 IS_NO_TIST_M1 = 1<<7, /* No Time Stamp from MAC 1 */
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/ |
| D | skge.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
143 CS_MRST_CLR = 1<<3, /* Clear Master reset */
144 CS_MRST_SET = 1<<2, /* Set Master reset */
145 CS_RST_CLR = 1<<1, /* Clear Software reset */
146 CS_RST_SET = 1, /* Set Software reset */
217 IS_IRQ_TIST_OV = 1<<13, /* Time Stamp Timer Overflow (YUKON only) */
223 IS_NO_TIST_M1 = 1<<7, /* No Time Stamp from MAC 1 */
[all …]
|
| /kernel/linux/linux-5.10/drivers/macintosh/ |
| D | via-cuda.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * This MCU controls system power, Parameter RAM, Real Time Clock and the
35 /* VIA registers - spaced 0x200 bytes apart */
37 #define B 0 /* B-side data */
38 #define A RS /* A-side data */
39 #define DIRB (2*RS) /* B-side direction (1=output) */
40 #define DIRA (3*RS) /* A-side direction (1=output) */
52 #define ANH (15*RS) /* A-side data, no handshake */
58 * VIA pin | Egret pin
59 * ----------------+------------------------------------------
[all …]
|
| /kernel/linux/linux-5.10/drivers/iio/light/ |
| D | rpr0521.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * RPR-0521 ROHM Ambient Light and Proximity Sensor
7 * IIO driver for RPR-0521RS (7-bit I2C slave address 0x38).
31 #define RPR0521_REG_PXS_DATA 0x44 /* 16-bit, little endian */
32 #define RPR0521_REG_ALS_DATA0 0x46 /* 16-bit, little endian */
33 #define RPR0521_REG_ALS_DATA1 0x48 /* 16-bit, little endian */
68 #define RPR0521_DEFAULT_MEAS_TIME 0x06 /* ALS - 100ms, PXS - 100ms */
170 {2, 500000, 20, 0}, /* 1000, measurement 100ms, sleep 300ms */
171 {2, 500000, 10, 0}, /* 1001, measurement 100ms, sleep 300ms */
190 /* optimize runtime pm ops - enable/disable device only if needed */
[all …]
|
| /kernel/linux/linux-4.19/drivers/iio/light/ |
| D | rpr0521.c | 2 * RPR-0521 ROHM Ambient Light and Proximity Sensor
10 * IIO driver for RPR-0521RS (7-bit I2C slave address 0x38).
34 #define RPR0521_REG_PXS_DATA 0x44 /* 16-bit, little endian */
35 #define RPR0521_REG_ALS_DATA0 0x46 /* 16-bit, little endian */
36 #define RPR0521_REG_ALS_DATA1 0x48 /* 16-bit, little endian */
71 #define RPR0521_DEFAULT_MEAS_TIME 0x06 /* ALS - 100ms, PXS - 100ms */
173 {2, 500000, 20, 0}, /* 1000, measurement 100ms, sleep 300ms */
174 {2, 500000, 10, 0}, /* 1001, measurement 100ms, sleep 300ms */
193 /* optimize runtime pm ops - enable/disable device only if needed */
289 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL, in rpr0521_als_enable()
[all …]
|
| /kernel/linux/linux-4.19/drivers/macintosh/ |
| D | via-cuda.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * This MCU controls system power, Parameter RAM, Real Time Clock and the
35 /* VIA registers - spaced 0x200 bytes apart */
37 #define B 0 /* B-side data */
38 #define A RS /* A-side data */
39 #define DIRB (2*RS) /* B-side direction (1=output) */
40 #define DIRA (3*RS) /* A-side direction (1=output) */
52 #define ANH (15*RS) /* A-side data, no handshake */
58 * VIA pin | Egret pin
59 * ----------------+------------------------------------------
[all …]
|
| /kernel/linux/linux-5.10/drivers/staging/octeon-usb/ |
| D | octeon-hcd.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
11 * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
104 * This register can be used to configure the core after power-on or a change in
105 * mode of operation. This register mainly contains AHB system-related
126 * @nptxfemplvl: Non-Periodic TxFIFO Empty Level (NPTxFEmpLvl)
128 * Indicates when the Non-Periodic TxFIFO Empty Interrupt bit in
131 * * 1'b0: GINTSTS.NPTxFEmp interrupt indicates that the Non-
133 * * 1'b1: GINTSTS.NPTxFEmp interrupt indicates that the Non-
172 * This value is in terms of 32-bit words.
181 * @rsttype: Reset Style for Clocked always Blocks in RTL (RstType)
[all …]
|