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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dadi,adin.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Ardelean <alexandru.ardelean@analog.com>
16 - $ref: ethernet-phy.yaml#
19 adi,rx-internal-delay-ps:
21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
26 adi,tx-internal-delay-ps:
28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
[all …]
Damlogic,meson-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
12 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
20 - amlogic,meson6-dwmac
21 - amlogic,meson8b-dwmac
22 - amlogic,meson8m2-dwmac
23 - amlogic,meson-gxbb-dwmac
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Dmediatek-dwmac.txt9 - compatible: Should be "mediatek,mt2712-gmac" for MT2712 SoC
10 - reg: Address and length of the register set for the device
11 - interrupts: Should contain the MAC interrupts
12 - interrupt-names: Should contain a list of interrupt names corresponding to
15 - clocks: Must contain a phandle for each entry in clock-names.
16 - clock-names: The name of the clock listed in the clocks property. These are
18 - mac-address: See ethernet.txt in the same directory
19 - phy-mode: See ethernet.txt in the same directory
20 - mediatek,pericfg: A phandle to the syscon node that control ethernet
24 - mediatek,tx-delay-ps: TX clock delay macro value. Default is 0.
[all …]
Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
16 local-mac-address:
19 $ref: /schemas/types.yaml#definitions/uint8-array
21 - minItems: 6
24 mac-address:
29 local-mac-address property.
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Dti,k3-am654-cpsw-nuss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Grygorii Strashko <grygorii.strashko@ti.com>
11 - Sekhar Nori <nsekhar@ti.com>
16 CPSW2G NUSS features - the Reduced Gigabit Media Independent Interface (RGMII),
21 One external Ethernet port (port 1) with selectable RGMII/RMII interfaces and
25 Peripheral Root Complex (UDMA-P) controller.
47 "#address-cells": true
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/kernel/linux/linux-4.19/Documentation/ABI/testing/
Dsysfs-class-net-phydev22 32-bit hexadecimal value corresponding to the PHY device's OUI,
32 <empty> (not available), mii, gmii, sgmii, tbi, rev-mii,
33 rmii, rgmii, rgmii-id, rgmii-rxid, rgmii-txid, rtbi, smii
34 xgmii, moca, qsgmii, trgmii, 1000base-x, 2500base-x, rxaui,
35 xaui, 10gbase-kr, unknown
/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dsysfs-class-net-phydev24 This attribute contains the 32-bit PHY Identifier as reported
41 <empty> (not available), mii, gmii, sgmii, tbi, rev-mii,
42 rmii, rgmii, rgmii-id, rgmii-rxid, rgmii-txid, rtbi, smii
43 xgmii, moca, qsgmii, trgmii, 1000base-x, 2500base-x, rxaui,
44 xaui, 10gbase-kr, unknown
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/
Dethernet.txt5 Documentation/devicetree/bindings/phy/phy-bindings.txt.
7 - local-mac-address: array of 6 bytes, specifies the MAC address that was
9 - mac-address: array of 6 bytes, specifies the MAC address that was last used by
11 the device by the boot program is different from the "local-mac-address"
13 - nvmem-cells: phandle, reference to an nvmem node for the MAC address;
14 - nvmem-cell-names: string, should be "mac-address" if nvmem is to be used;
15 - max-speed: number, specifies maximum speed in Mbit/s supported by the device;
16 - max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
19 - phy-mode: string, operation mode of the PHY interface. This is now a de-facto
27 * "rev-mii"
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
Ducc.txt4 - device_type : should be "network", "hldc", "uart", "transparent"
6 - compatible : could be "ucc_geth" or "fsl_atm" and so on.
7 - cell-index : the ucc number(1-8), corresponding to UCCx in UM.
8 - reg : Offset and length of the register set for the device
9 - interrupts : <a b> where a is the interrupt number and b is a
14 - pio-handle : The phandle for the Parallel I/O port configuration.
15 - port-number : for UART drivers, the port number to use, between 0 and 3.
18 CPM UART driver, the port-number is required for the QE UART driver.
19 - soft-uart : for UART drivers, if specified this means the QE UART device
20 driver should use "Soft-UART" mode, which is needed on some SOCs that have
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
Ducc.txt4 - device_type : should be "network", "hldc", "uart", "transparent"
6 - compatible : could be "ucc_geth" or "fsl_atm" and so on.
7 - cell-index : the ucc number(1-8), corresponding to UCCx in UM.
8 - reg : Offset and length of the register set for the device
9 - interrupts : <a b> where a is the interrupt number and b is a
14 - pio-handle : The phandle for the Parallel I/O port configuration.
15 - port-number : for UART drivers, the port number to use, between 0 and 3.
18 CPM UART driver, the port-number is required for the QE UART driver.
19 - soft-uart : for UART drivers, if specified this means the QE UART device
20 driver should use "Soft-UART" mode, which is needed on some SOCs that have
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/dsa/
Dsja1105.txt6 - compatible:
8 - "nxp,sja1105e"
9 - "nxp,sja1105t"
10 - "nxp,sja1105p"
11 - "nxp,sja1105q"
12 - "nxp,sja1105r"
13 - "nxp,sja1105s"
18 and the non-SGMII devices, while pin-compatible, are not equal in terms
19 of support for RGMII internal delays (supported on P/Q/R/S, but not on
24 - sja1105,role-mac:
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/kernel/linux/linux-5.10/drivers/staging/mt7621-dts/
Dmt7621.dtsi1 #include <dt-bindings/interrupt-controller/mips-gic.h>
2 #include <dt-bindings/gpio/gpio.h>
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "mediatek,mt7621-soc";
20 #address-cells = <0>;
21 #interrupt-cells = <1>;
22 interrupt-controller;
23 compatible = "mti,cpu-interrupt-controller";
31 #clock-cells = <0>;
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dmpc836x_rdk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2007-2008 MontaVista Software, Inc.
11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt2712-evb.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
26 stdout-path = "serial0:921600n8";
30 compatible = "regulator-fixed";
31 regulator-name = "vproc_buck0";
32 regulator-min-microvolt = <1000000>;
33 regulator-max-microvolt = <1000000>;
37 compatible = "regulator-fixed";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmt7623n-rfb-emmc.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
15 compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
24 stdout-path = "serial2:115200n8";
28 compatible = "hdmi-connector";
31 ddc-i2c-bus = <&hdmiddc0>;
35 remote-endpoint = <&hdmi0_out>;
42 proc-supply = <&mt6323_vproc_reg>;
[all …]
Dam57xx-idk-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
6 #include "am57xx-industrial-grade.dtsi"
16 stdout-path = &uart3;
19 vmain: fixedregulator-vmain {
20 compatible = "regulator-fixed";
21 regulator-name = "VMAIN";
22 regulator-min-microvolt = <5000000>;
23 regulator-max-microvolt = <5000000>;
24 regulator-always-on;
[all …]
Dam57xx-beagle-x15-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "am57xx-commercial-grade.dtsi"
9 #include "dra74x-mmc-iodelay.dtsi"
10 #include "dra74-ipu-dsp-common.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
15 compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
25 stdout-path = &uart3;
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Dbcm2711-rpi-4-b.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "bcm2835-rpi.dtsi"
5 #include "bcm283x-rpi-usb-peripheral.dtsi"
7 #include <dt-bindings/reset/raspberrypi,firmware-reset.h>
10 compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
15 stdout-path = "serial1:115200n8";
31 led-act {
35 led-pwr {
38 default-state = "keep";
[all …]
Dat91-sama5d3_xplained.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-sama5d3_xplained.dts - Device Tree file for the SAMA5D3 Xplained board
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
14 compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5";
17 stdout-path = "serial0:115200n8";
26 clock-frequency = <32768>;
30 clock-frequency = <12000000>;
37 …pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd…
38 vmmc-supply = <&vcc_mmc0_reg>;
[all …]
Dam437x-sk-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
11 #include <dt-bindings/pinctrl/am43xx.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
19 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
26 stdout-path = &uart0;
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/kernel/linux/linux-4.19/arch/powerpc/boot/dts/
Dmpc836x_rdk.dts5 * Copyright 2007-2008 MontaVista Software, Inc.
15 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
35 #address-cells = <1>;
36 #size-cells = <0>;
41 d-cache-line-size = <32>;
42 i-cache-line-size = <32>;
43 d-cache-size = <32768>;
44 i-cache-size = <32768>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/
Dk3-j7200-common-proc-board.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j7200-som-p0.dtsi"
9 #include <dt-bindings/net/ti-dp83867.h>
10 #include <dt-bindings/mux/ti-serdes.h>
14 stdout-path = "serial2:115200n8";
20 mcu_cpsw_pins_default: mcu-cpsw-pins-default {
21 pinctrl-single,pins = <
37 mcu_mdio_pins_default: mcu-mdio1-pins-default {
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dmt7623n-rfb-emmc.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
15 compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
24 stdout-path = "serial2:115200n8";
29 proc-supply = <&mt6323_vproc_reg>;
33 proc-supply = <&mt6323_vproc_reg>;
37 proc-supply = <&mt6323_vproc_reg>;
41 proc-supply = <&mt6323_vproc_reg>;
[all …]
/kernel/linux/linux-5.10/drivers/net/phy/
Dvitesse.c1 // SPDX-License-Identifier: GPL-2.0+
108 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) in vsc824x_config_init()
190 /* bits 14-15 in extended register 0x14 controls DACG amplitude in vsc738x_config_init()
191 * 6 = -8%, 2 is hardware default in vsc738x_config_init()
205 /* This magic sequence appears in the VSC7395 SparX-G5e application in vsc739x_config_init()
239 * with the power-on/reset defaults. Writing some registers will in vsc73xx_config_aneg()
246 * applied to "rgmii-id" interfaces. It may not work as expected
247 * on "rgmii-txid", "rgmii-rxid" or "rgmii" interfaces. */
264 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) in vsc8601_config_init()
281 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in vsc824x_ack_interrupt()
[all …]
/kernel/linux/linux-4.19/drivers/net/phy/
Dvitesse.c117 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) in vsc824x_config_init()
199 /* bits 14-15 in extended register 0x14 controls DACG amplitude in vsc738x_config_init()
200 * 6 = -8%, 2 is hardware default in vsc738x_config_init()
214 /* This magic sequence appears in the VSC7395 SparX-G5e application in vsc739x_config_init()
248 * with the power-on/reset defaults. Writing some registers will in vsc73xx_config_aneg()
255 * applied to "rgmii-id" interfaces. It may not work as expected
256 * on "rgmii-txid", "rgmii-rxid" or "rgmii" interfaces. */
273 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) in vsc8601_config_init()
290 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in vsc824x_ack_interrupt()
300 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in vsc82xx_config_intr()
[all …]

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