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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/riscv/
Dcpus.yaml4 $id: http://devicetree.org/schemas/riscv/cpus.yaml#
36 - const: riscv
37 - const: riscv # Simulator only
47 https://riscv.org/specifications/
50 - riscv,sv32
51 - riscv,sv39
52 - riscv,sv48
54 riscv,isa:
59 https://riscv.org/specifications/
62 insensitive, letters in the riscv,isa string must be all
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/riscv/
Dcpus.txt71 Definition: must contain "riscv", may contain one of
77 "riscv,sv32"
78 "riscv,sv39"
79 "riscv,sv48"
80 - riscv,isa:
99 compatible = "sifive,rocket0", "riscv";
106 riscv,isa = "rv64imac";
110 compatible = "riscv,cpu-intc";
116 compatible = "sifive,rocket0", "riscv";
128 mmu-type = "riscv,sv39";
[all …]
/kernel/linux/linux-5.10/arch/riscv/
DMakefile49 riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
50 riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
51 riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
52 riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
53 KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
54 KBUILD_AFLAGS += -march=$(riscv-march-y)
81 boot := arch/riscv/boot
84 head-y := arch/riscv/kernel/head.o
86 core-y += arch/riscv/
88 libs-y += arch/riscv/lib/
[all …]
/kernel/linux/linux-5.10/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi26 compatible = "sifive,e51", "sifive,rocket0", "riscv";
32 riscv,isa = "rv64imac";
36 compatible = "riscv,cpu-intc";
41 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
53 mmu-type = "riscv,sv39";
55 riscv,isa = "rv64imafdc";
60 compatible = "riscv,cpu-intc";
65 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
77 mmu-type = "riscv,sv39";
79 riscv,isa = "rv64imafdc";
[all …]
/kernel/linux/linux-5.10/arch/riscv/boot/dts/kendryte/
Dk210.dtsi34 compatible = "kendryte,k210", "sifive,rocket0", "riscv";
35 riscv,isa = "rv64imafdc";
46 compatible = "riscv,cpu-intc";
52 compatible = "kendryte,k210", "sifive,rocket0", "riscv";
53 riscv,isa = "rv64imafdc";
64 compatible = "riscv,cpu-intc";
100 compatible = "riscv,clint0";
110 compatible = "kendryte,k210-plic0", "riscv,plic0";
114 riscv,ndev = <65>;
115 riscv,max-priority = <7>;
/kernel/linux/linux-5.10/arch/riscv/kernel/
Dcpu.c20 if (!of_device_is_compatible(node, "riscv")) { in riscv_of_processor_hartid()
35 if (of_property_read_string(node, "riscv,isa", &isa)) { in riscv_of_processor_hartid()
36 pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart); in riscv_of_processor_hartid()
56 if (of_device_is_compatible(node, "riscv")) in riscv_of_parent_hartid()
76 if (strcmp(mmu_type, "riscv,sv32") != 0) in print_mmu()
79 if (strcmp(mmu_type, "riscv,sv39") != 0 && in print_mmu()
80 strcmp(mmu_type, "riscv,sv48") != 0) in print_mmu()
113 if (!of_property_read_string(node, "riscv,isa", &isa)) in c_show()
118 && strcmp(compat, "riscv")) in c_show()
Dcpufeature.c88 if (of_property_read_string(node, "riscv,isa", &isa)) { in riscv_fill_hwcap()
89 pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); in riscv_fill_hwcap()
139 pr_info("riscv: ISA extensions %s\n", print_str); in riscv_fill_hwcap()
145 pr_info("riscv: ELF capabilities %s\n", print_str); in riscv_fill_hwcap()
/kernel/liteos_m/targets/riscv_nuclei_gd32vf103_soc_gcc/GCC/
Dopenocd_gd32vf103.cfg26 set _CHIPNAME riscv
37 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
45 # See https://github.com/riscv/riscv-gnu-toolchain/issues/319#issuecomment-358397306
47 riscv expose_csrs 770-800,835-850,1984-2032,2064-2070
49 riscv set_reset_timeout_sec 1
/kernel/linux/linux-4.19/arch/riscv/
DMakefile65 KBUILD_LDFLAGS_MODULE += -T $(srctree)/arch/riscv/kernel/module.lds
79 head-y := arch/riscv/kernel/head.o
81 core-y += arch/riscv/kernel/ arch/riscv/mm/
83 libs-y += arch/riscv/lib/
87 $(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso $@
/kernel/liteos_m/targets/riscv_nuclei_demo_soc_gcc/GCC/
Dopenocd_demosoc.cfg29 set _CHIPNAME riscv
33 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
42 # See https://github.com/riscv/riscv-gnu-toolchain/issues/319#issuecomment-358397306
44 riscv expose_csrs 416-496,770-800,835-850,1227-1231,1483-1486,1984-2032,2064-2070,2370-2380,2490-25…
/kernel/liteos_m/targets/riscv_nuclei_demo_soc_gcc/SoC/demosoc/Board/nuclei_fpga_eval/
Dopenocd_demosoc.cfg29 set _CHIPNAME riscv
33 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
42 # See https://github.com/riscv/riscv-gnu-toolchain/issues/319#issuecomment-358397306
44 riscv expose_csrs 416-496,770-800,835-850,1227-1231,1483-1486,1984-2032,2064-2070,2370-2380,2490-25…
/kernel/linux/linux-4.19/arch/riscv/kernel/
Dcpu.c24 if (!of_device_is_compatible(node, "riscv")) { in riscv_of_processor_hart()
47 if (of_property_read_string(node, "riscv,isa", &isa)) { in riscv_of_processor_hart()
48 pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart); in riscv_of_processor_hart()
86 if (!of_property_read_string(node, "riscv,isa", &isa) in c_show()
91 && !strncmp(mmu, "riscv,", 6)) in c_show()
94 && strcmp(compat, "riscv")) in c_show()
/kernel/linux/linux-5.10/drivers/clocksource/
Dtimer-riscv.c116 child = of_get_compatible_child(n, "riscv,cpu-intc"); in riscv_timer_init_dt()
138 pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", in riscv_timer_init_dt()
147 "riscv-timer", &riscv_clock_event); in riscv_timer_init_dt()
154 "clockevents/riscv/timer:starting", in riscv_timer_init_dt()
157 pr_err("cpu hp setup state failed for RISCV timer [%d]\n", in riscv_timer_init_dt()
162 TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dsifive,plic-1.0.0.yaml64 riscv,cpu-intc node, which has a riscv node as parent.
66 riscv,ndev:
78 - riscv,ndev
96 riscv,ndev = <10>;
Driscv,cpu-intc.txt27 - compatible : "riscv,cpu-intc"
45 compatible = "riscv";
49 compatible = "sifive,fu540-c000-cpu-intc", "riscv,cpu-intc";
/kernel/linux/linux-5.10/arch/riscv/include/asm/
Dgdb_xml.h13 "qXfer:features:read:riscv-64bit-cpu.xml";
19 "<xi:include href=\"riscv-64bit-cpu.xml\"/>"
25 "<feature name=\"org.gnu.gdb.riscv.cpu\">"
65 "qXfer:features:read:riscv-32bit-cpu.xml";
71 "<xi:include href=\"riscv-32bit-cpu.xml\"/>"
77 "<feature name=\"org.gnu.gdb.riscv.cpu\">"
Dimage.h6 #define RISCV_IMAGE_MAGIC "RISCV\0\0\0"
34 * struct riscv_image_header - riscv kernel image header
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/interrupt-controller/
Dsifive,plic-1.0.0.txt39 to should be a riscv,cpu-intc node, which has a riscv node as parent.
40 - riscv,ndev: Specifies how many external interrupts are supported by
57 riscv,ndev = <10>;
Driscv,cpu-intc.txt27 - compatible : "riscv,cpu-intc"
45 compatible = "riscv";
49 compatible = "sifive,fu540-c000-cpu-intc", "riscv,cpu-intc";
/kernel/linux/linux-5.10/drivers/irqchip/
Dirq-riscv-intc.c8 #define pr_fmt(fmt) "riscv-intc: " fmt
129 "irqchip/riscv/intc:starting", in riscv_intc_init()
138 IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init);
/kernel/linux/linux-5.10/drivers/firmware/efi/
DMakefile39 riscv-obj-$(CONFIG_EFI) := efi-init.o riscv-runtime.o
40 obj-$(CONFIG_RISCV) += $(riscv-obj-y)
/kernel/linux/linux-4.19/drivers/clocksource/
Driscv_timer.c97 "clockevents/riscv/timer:starting", in riscv_timer_init_dt()
100 pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", in riscv_timer_init_dt()
105 TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);
/kernel/linux/linux-5.10/scripts/
Dsubarch.include13 -e s/riscv.*/riscv/)
/kernel/linux/linux-4.19/scripts/
Dsubarch.include13 -e s/riscv.*/riscv/)
/kernel/linux/linux-5.10/Documentation/riscv/
Dpmu.rst228 * struct riscv_pmu: arch/riscv/include/asm/perf_event.h
245 * struct riscv_hw_events: arch/riscv/include/asm/perf_event.h
253 [1] https://github.com/riscv/riscv-linux/pull/124
255 [2] https://groups.google.com/a/groups.riscv.org/forum/#!topic/sw-dev/f19TmCNP6yA

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