Home
last modified time | relevance | path

Searched +full:rk3288 +full:- +full:vop (Results 1 – 25 of 35) sorted by relevance

12

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoC display controller (VOP)
10 VOP (Video Output Processor) is the display controller for the Rockchip
15 - Sandy Huang <hjc@rock-chips.com>
16 - Heiko Stuebner <heiko@sntech.de>
21 - rockchip,px30-vop-big
22 - rockchip,px30-vop-lit
[all …]
Drockchip-lvds.txt1 Rockchip RK3288 LVDS interface
5 - compatible: matching the soc type, one of
6 - "rockchip,rk3288-lvds";
7 - "rockchip,px30-lvds";
9 - reg: physical base address of the controller and length
11 - clocks: must include clock specifiers corresponding to entries in the
12 clock-names property.
13 - clock-names: must contain "pclk_lvds"
15 - avdd1v0-supply: regulator phandle for 1.0V analog power
16 - avdd1v8-supply: regulator phandle for 1.8V analog power
[all …]
Danalogix_dp-rockchip.txt1 Rockchip RK3288 specific extensions to the Analogix Display Port
5 - compatible: "rockchip,rk3288-dp",
6 "rockchip,rk3399-edp";
8 - reg: physical base address of the controller and length
10 - clocks: from common clock binding: handle to dp clock.
13 - clock-names: from common clock binding:
16 - resets: Must contain an entry for each entry in reset-names.
19 - pinctrl-names: Names corresponding to the chip hotplug pinctrl states.
20 - pinctrl-0: pin-control mode. should be <&edp_hpd>
22 - reset-names: Must include the name "dp"
[all …]
Ddw_mipi_dsi_rockchip.txt5 - #address-cells: Should be <1>.
6 - #size-cells: Should be <0>.
7 - compatible: one of
8 "rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi"
9 "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"
10 "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"
11 - reg: Represent the physical address range of the controller.
12 - interrupts: Represent the controller's interrupt to the CPU(s).
13 - clocks, clock-names: Phandles to the controller's pll reference
17 - rockchip,grf: this soc should set GRF regs to mux vopl/vopb.
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.txt1 device-tree bindings for rockchip soc display controller (vop)
3 VOP (Visual Output Processor) is the Display Controller for the Rockchip
8 - compatible: value should be one of the following
9 "rockchip,rk3036-vop";
10 "rockchip,rk3126-vop";
11 "rockchip,rk3288-vop";
12 "rockchip,rk3368-vop";
13 "rockchip,rk3366-vop";
14 "rockchip,rk3399-vop-big";
15 "rockchip,rk3399-vop-lit";
[all …]
Drockchip-lvds.txt1 Rockchip RK3288 LVDS interface
5 - compatible: matching the soc type, one of
6 - "rockchip,rk3288-lvds";
8 - reg: physical base address of the controller and length
10 - clocks: must include clock specifiers corresponding to entries in the
11 clock-names property.
12 - clock-names: must contain "pclk_lvds"
14 - avdd1v0-supply: regulator phandle for 1.0V analog power
15 - avdd1v8-supply: regulator phandle for 1.8V analog power
16 - avdd3v3-supply: regulator phandle for 3.3V analog power
[all …]
Danalogix_dp-rockchip.txt1 Rockchip RK3288 specific extensions to the Analogix Display Port
5 - compatible: "rockchip,rk3288-dp",
6 "rockchip,rk3399-edp";
8 - reg: physical base address of the controller and length
10 - clocks: from common clock binding: handle to dp clock.
13 - clock-names: from common clock binding:
16 - resets: Must contain an entry for each entry in reset-names.
19 - pinctrl-names: Names corresponding to the chip hotplug pinctrl states.
20 - pinctrl-0: pin-control mode. should be <&edp_hpd>
22 - reset-names: Must include the name "dp"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/
Dpwm-rockchip.txt4 - compatible: should be "rockchip,<name>-pwm"
5 "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
6 "rockchip,rk3288-pwm": found on RK3288 SOC
7 "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
8 "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
9 - reg: physical base address and length of the controller's registers
10 - clocks: See ../clock/clock-bindings.txt
11 - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
12 - There is one clock that's used both to derive the functional clock
14 - For newer hardware (rk3328 and future socs): specified by name
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/pwm/
Dpwm-rockchip.txt4 - compatible: should be "rockchip,<name>-pwm"
5 "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
6 "rockchip,rk3288-pwm": found on RK3288 SOC
7 "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
8 "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
9 - reg: physical base address and length of the controller's registers
10 - clocks: See ../clock/clock-bindings.txt
11 - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
12 - There is one clock that's used both to derive the functional clock
14 - For newer hardware (rk3328 and future socs): specified by name
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Drk3288.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3288-cru.h>
8 #include <dt-bindings/power/rk3288-power.h>
9 #include <dt-bindings/thermal/thermal.h>
10 #include <dt-bindings/power/rk3288-power.h>
11 #include <dt-bindings/soc/rockchip,boot-mode.h>
[all …]
Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
16 interrupt-parent = <&gic>;
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/power/
Drockchip-io-domain.txt2 -------------------------------------
8 A specific example using rk3288:
9 - If the regulator hooked up to a pin like SDMMC0_VDD is 3.3V then
18 - any logic for deciding what voltage we should set regulators to
19 - any logic for deciding whether regulators (or internal SoC blocks)
33 - compatible: should be one of:
34 - "rockchip,px30-io-voltage-domain" for px30
35 - "rockchip,px30-pmu-io-voltage-domain" for px30 pmu-domains
36 - "rockchip,rk3188-io-voltage-domain" for rk3188
37 - "rockchip,rk3228-io-voltage-domain" for rk3228
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/
Drockchip-io-domain.txt2 -------------------------------------
8 A specific example using rk3288:
9 - If the regulator hooked up to a pin like SDMMC0_VDD is 3.3V then
18 - any logic for deciding what voltage we should set regulators to
19 - any logic for deciding whether regulators (or internal SoC blocks)
33 - compatible: should be one of:
34 - "rockchip,px30-io-voltage-domain" for px30
35 - "rockchip,px30-pmu-io-voltage-domain" for px30 pmu-domains
36 - "rockchip,rk3188-io-voltage-domain" for rk3188
37 - "rockchip,rk3228-io-voltage-domain" for rk3228
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/rockchip/
Drockchip_vop_reg.c3 * Author:Mark Yao <mark.yao@rock-chips.com>
277 * Note: rk3288 has a dedicated 'cursor' window, however, that window requires
540 { .compatible = "rockchip,rk3036-vop",
542 { .compatible = "rockchip,rk3126-vop",
544 { .compatible = "rockchip,rk3288-vop",
546 { .compatible = "rockchip,rk3368-vop",
548 { .compatible = "rockchip,rk3366-vop",
550 { .compatible = "rockchip,rk3399-vop-big",
552 { .compatible = "rockchip,rk3399-vop-lit",
554 { .compatible = "rockchip,rk3228-vop",
[all …]
Danalogix_dp-rockchip.c5 * Author: Andy Yan <andy.yan@rock-chips.com>
6 * Yakir Yang <ykk@rock-chips.com>
7 * Jeff Chen <jeff.chen@rock-chips.com>
50 * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
52 * @lcdsel_big: reg value of selecting vop big for eDP
53 * @lcdsel_lit: reg value of selecting vop little for eDP
85 if (!analogix_dp_psr_enabled(dp->adp)) in analogix_dp_psr_set()
88 DRM_DEV_DEBUG(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit"); in analogix_dp_psr_set()
90 ret = rockchip_drm_wait_vact_end(dp->encoder.crtc, in analogix_dp_psr_set()
93 DRM_DEV_ERROR(dp->dev, "line flag interrupt did not arrive\n"); in analogix_dp_psr_set()
[all …]
Ddw_hdmi-rockchip.c33 * struct rockchip_hdmi_chip_data - splite the grf setting of kind of chips
35 * @lcdsel_big: reg value of selecting vop big for HDMI
36 * @lcdsel_lit: reg value of selecting vop little for HDMI
167 struct device_node *np = hdmi->dev->of_node; in rockchip_hdmi_parse_dt()
169 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); in rockchip_hdmi_parse_dt()
170 if (IS_ERR(hdmi->regmap)) { in rockchip_hdmi_parse_dt()
171 DRM_DEV_ERROR(hdmi->dev, "Unable to get rockchip,grf\n"); in rockchip_hdmi_parse_dt()
172 return PTR_ERR(hdmi->regmap); in rockchip_hdmi_parse_dt()
175 hdmi->vpll_clk = devm_clk_get(hdmi->dev, "vpll"); in rockchip_hdmi_parse_dt()
176 if (PTR_ERR(hdmi->vpll_clk) == -ENOENT) { in rockchip_hdmi_parse_dt()
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Drk3288.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3288-cru.h>
8 #include <dt-bindings/power/rk3288-power.h>
9 #include <dt-bindings/thermal/thermal.h>
10 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #address-cells = <2>;
[all …]
Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
16 interrupt-parent = <&gic>;
[all …]
Drk3188.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3188-cru.h>
10 #include <dt-bindings/power/rk3188-power.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
24 next-level-cache = <&L2>;
[all …]
Drk322x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3228-cru.h>
8 #include <dt-bindings/thermal/thermal.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
[all …]
Drk3066a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3066a-cru.h>
10 #include <dt-bindings/power/rk3066-power.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
24 next-level-cache = <&L2>;
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/rockchip/
Drockchip_vop_reg.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author:Mark Yao <mark.yao@rock-chips.com>
426 * hs_start interrupt fires at frame-start, so serves
525 * hs_start interrupt fires at frame-start, so serves
655 * Note: rk3288 has a dedicated 'cursor' window, however, that window requires
889 * rk3399 vop big windows register layout is same as rk3288, but we
1044 { .compatible = "rockchip,rk3036-vop",
1046 { .compatible = "rockchip,rk3126-vop",
1048 { .compatible = "rockchip,px30-vop-big",
1050 { .compatible = "rockchip,px30-vop-lit",
[all …]
Danalogix_dp-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Andy Yan <andy.yan@rock-chips.com>
7 * Yakir Yang <ykk@rock-chips.com>
8 * Jeff Chen <jeff.chen@rock-chips.com>
46 * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
48 * @lcdsel_big: reg value of selecting vop big for eDP
49 * @lcdsel_lit: reg value of selecting vop little for eDP
78 reset_control_assert(dp->rst); in rockchip_dp_pre_init()
80 reset_control_deassert(dp->rst); in rockchip_dp_pre_init()
90 ret = clk_prepare_enable(dp->pclk); in rockchip_dp_poweron_start()
[all …]
Drockchip_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Mark Yao <mark.yao@rock-chips.com>
6 * Sandy Huang <hjc@rock-chips.com>
45 * rockchip_lvds_soc_data - rockchip lvds Soc private data
74 writel_relaxed(val, lvds->regs + offset); in rk3288_writel()
75 if (lvds->output == DISPLAY_OUTPUT_LVDS) in rk3288_writel()
77 writel_relaxed(val, lvds->regs + offset + RK3288_LVDS_CH1_OFFSET); in rk3288_writel()
82 if (strncmp(s, "jeida-18", 8) == 0) in rockchip_lvds_name_to_format()
84 else if (strncmp(s, "jeida-24", 8) == 0) in rockchip_lvds_name_to_format()
86 else if (strncmp(s, "vesa-24", 7) == 0) in rockchip_lvds_name_to_format()
[all …]
Ddw_hdmi-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-or-later
56 * struct rockchip_hdmi_chip_data - splite the grf setting of kind of chips
58 * @lcdsel_big: reg value of selecting vop big for HDMI
59 * @lcdsel_lit: reg value of selecting vop little for HDMI
191 struct device_node *np = hdmi->dev->of_node; in rockchip_hdmi_parse_dt()
193 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); in rockchip_hdmi_parse_dt()
194 if (IS_ERR(hdmi->regmap)) { in rockchip_hdmi_parse_dt()
195 DRM_DEV_ERROR(hdmi->dev, "Unable to get rockchip,grf\n"); in rockchip_hdmi_parse_dt()
196 return PTR_ERR(hdmi->regmap); in rockchip_hdmi_parse_dt()
199 hdmi->vpll_clk = devm_clk_get(hdmi->dev, "vpll"); in rockchip_hdmi_parse_dt()
[all …]

12