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/kernel/linux/linux-5.10/tools/testing/selftests/kvm/x86_64/
Dvmx_apic_access_test.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * launched with a valid APIC-access address that is backed by a
13 * The second subtest sets the APIC-access address to a (valid) L1
46 uint32_t control; in l1_guest_code() local
54 control = vmreadz(CPU_BASED_VM_EXEC_CONTROL); in l1_guest_code()
55 control |= CPU_BASED_ACTIVATE_SECONDARY_CONTROLS; in l1_guest_code()
56 vmwrite(CPU_BASED_VM_EXEC_CONTROL, control); in l1_guest_code()
57 control = vmreadz(SECONDARY_VM_EXEC_CONTROL); in l1_guest_code()
58 control |= SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES; in l1_guest_code()
59 vmwrite(SECONDARY_VM_EXEC_CONTROL, control); in l1_guest_code()
[all …]
Ddebug_regs.c1 // SPDX-License-Identifier: GPL-2.0
69 struct kvm_run *run; in main() local
89 run = vcpu_state(vm, VCPU_ID); in main()
91 /* Test software BPs - int3 */ in main()
93 debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; in main()
96 TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG && in main()
97 run->debug.arch.exception == BP_VECTOR && in main()
98 run->debug.arch.pc == CAST_TO_RIP(sw_bp), in main()
100 run->exit_reason, run->debug.arch.exception, in main()
101 run->debug.arch.pc, CAST_TO_RIP(sw_bp)); in main()
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Dvmx_tsc_adjust_test.c1 // SPDX-License-Identifier: GPL-2.0-only
39 #define TSC_OFFSET_VALUE -(1ll << 48)
74 uint64_t l1_tsc = rdtsc() - TSC_OFFSET_VALUE; in l2_guest_code()
76 wrmsr(MSR_IA32_TSC, l1_tsc - TSC_ADJUST_VALUE); in l2_guest_code()
77 check_ia32_tsc_adjust(-2 * TSC_ADJUST_VALUE); in l2_guest_code()
87 uint32_t control; in l1_guest_code() local
91 wrmsr(MSR_IA32_TSC, rdtsc() - TSC_ADJUST_VALUE); in l1_guest_code()
92 check_ia32_tsc_adjust(-1 * TSC_ADJUST_VALUE); in l1_guest_code()
100 control = vmreadz(CPU_BASED_VM_EXEC_CONTROL); in l1_guest_code()
101 control |= CPU_BASED_USE_MSR_BITMAPS | CPU_BASED_USE_TSC_OFFSETTING; in l1_guest_code()
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/kernel/linux/linux-5.10/fs/btrfs/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
25 Btrfs is a general purpose copy-on-write filesystem with extents,
43 bool "Btrfs POSIX Access Control Lists"
47 POSIX Access Control Lists (ACLs) support permissions for users and
50 If you don't know what Access Control Lists are, say N
59 after a power-loss or kernel panic event the filesystem is
68 to verify the integrity of (super)-block write requests
69 during the run of a regression test, say N
72 bool "Btrfs will run sanity tests upon loading"
75 This will run some basic sanity tests on the free space cache
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/kernel/linux/linux-4.19/fs/btrfs/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
17 Btrfs is a general purpose copy-on-write filesystem with extents,
35 bool "Btrfs POSIX Access Control Lists"
39 POSIX Access Control Lists (ACLs) support permissions for users and
42 If you don't know what Access Control Lists are, say N
51 after a power-loss or kernel panic event the filesystem is
60 to verify the integrity of (super)-block write requests
61 during the run of a regression test, say N
64 bool "Btrfs will run sanity tests upon loading"
67 This will run some basic sanity tests on the free space cache
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Ddbdma.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Definitions for using the Apple Descriptor-Based DMA controller
13 * DBDMA control/status registers. All little-endian.
16 unsigned int control; /* lets you change bits in status */ member
32 /* Bits in control and status registers */
33 #define RUN 0x8000 macro
43 * DBDMA command structure. These fields are all little-endian!
47 __le16 command; /* command word (has bit-fields) */
49 __le32 cmd_dep; /* command-dependent field */
66 #define KEY_STREAM1 0x100 /* control/status stream */
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/kernel/linux/linux-4.19/arch/powerpc/include/asm/
Ddbdma.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Definitions for using the Apple Descriptor-Based DMA controller
13 * DBDMA control/status registers. All little-endian.
16 unsigned int control; /* lets you change bits in status */ member
32 /* Bits in control and status registers */
33 #define RUN 0x8000 macro
43 * DBDMA command structure. These fields are all little-endian!
47 __le16 command; /* command word (has bit-fields) */
49 __le32 cmd_dep; /* command-dependent field */
66 #define KEY_STREAM1 0x100 /* control/status stream */
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/kernel/linux/linux-5.10/drivers/powercap/
Didle_inject.c1 // SPDX-License-Identifier: GPL-2.0
19 * The idle + run duration is specified via separate helpers and that allows
34 * It is up to the user of this framework to provide a lock for higher-level
51 * struct idle_inject_thread - task on/off switch structure
53 * @should_run: whether or not to run the task (for the smpboot kthread API)
61 * struct idle_inject_device - idle injection data
64 * @run_duration_us: duration of CPU run time to allow
80 * idle_inject_wakeup - Wake up idle injection threads
91 for_each_cpu_and(cpu, to_cpumask(ii_dev->cpumask), cpu_online_mask) { in idle_inject_wakeup()
93 iit->should_run = 1; in idle_inject_wakeup()
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/kernel/linux/linux-4.19/drivers/powercap/
Didle_inject.c1 // SPDX-License-Identifier: GPL-2.0
19 * The idle + run duration is specified via separate helpers and that allows
34 * It is up to the user of this framework to provide a lock for higher-level
50 * struct idle_inject_thread - task on/off switch structure
52 * @should_run: whether or not to run the task (for the smpboot kthread API)
60 * struct idle_inject_device - idle injection data
63 * @run_duration_ms: duration of CPU run time to allow
77 * idle_inject_wakeup - Wake up idle injection threads
88 for_each_cpu_and(cpu, to_cpumask(ii_dev->cpumask), cpu_online_mask) { in idle_inject_wakeup()
90 iit->should_run = 1; in idle_inject_wakeup()
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/kernel/linux/linux-5.10/arch/arm/mach-pxa/include/mach/
Dsmemc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 #define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */
17 #define MSC0 (SMEMC_VIRT + 0x08) /* Static Memory Control Register 0 */
18 #define MSC1 (SMEMC_VIRT + 0x0C) /* Static Memory Control Register 1 */
19 #define MSC2 (SMEMC_VIRT + 0x10) /* Static Memory Control Register 2 */
21 #define SXLCR (SMEMC_VIRT + 0x18) /* LCR value to be written to SDRAM-Timing Synchronous Flash */
22 #define SXCNFG (SMEMC_VIRT + 0x1C) /* Synchronous Static Memory Control Register */
31 #define BOOT_DEF (SMEMC_VIRT + 0x44) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SE…
49 #define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
50 #define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
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/kernel/linux/linux-4.19/arch/arm/mach-pxa/include/mach/
Dsmemc.h19 #define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */
20 #define MSC0 (SMEMC_VIRT + 0x08) /* Static Memory Control Register 0 */
21 #define MSC1 (SMEMC_VIRT + 0x0C) /* Static Memory Control Register 1 */
22 #define MSC2 (SMEMC_VIRT + 0x10) /* Static Memory Control Register 2 */
24 #define SXLCR (SMEMC_VIRT + 0x18) /* LCR value to be written to SDRAM-Timing Synchronous Flash */
25 #define SXCNFG (SMEMC_VIRT + 0x1C) /* Synchronous Static Memory Control Register */
34 #define BOOT_DEF (SMEMC_VIRT + 0x44) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SE…
52 #define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
53 #define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
60 #define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
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/kernel/linux/linux-4.19/Documentation/scheduler/
Dsched-rt-group.txt1 Real-Time group scheduling
2 --------------------------
12 2.1 System-wide settings
33 are real-time processes).
40 ---------------
50 ----------------
53 in a given period. We allocate this "run time" for each realtime group which
56 Any time not allocated to a realtime group will be used to run normal priority
57 tasks (SCHED_OTHER). Any allocated run time not used will also be picked up by
63 time dedicated for the graphics. We can then give this group a run time of 0.8
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/kernel/linux/linux-5.10/Documentation/scheduler/
Dsched-rt-group.rst2 Real-Time group scheduling
12 2.1 System-wide settings
33 are real-time processes).
40 ---------------
50 ----------------
53 in a given period. We allocate this "run time" for each realtime group which
56 Any time not allocated to a realtime group will be used to run normal priority
57 tasks (SCHED_OTHER). Any allocated run time not used will also be picked up by
63 time dedicated for the graphics. We can then give this group a run time of 0.8
66 This way the graphics group will have a 0.04s period with a 0.032s run time
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/kernel/linux/linux-4.19/tools/testing/selftests/kvm/
Dvmx_tsc_adjust_test.c41 #define TSC_OFFSET_VALUE -(1ll << 48)
76 uint64_t l1_tsc = rdtsc() - TSC_OFFSET_VALUE; in l2_guest_code()
78 wrmsr(MSR_IA32_TSC, l1_tsc - TSC_ADJUST_VALUE); in l2_guest_code()
79 check_ia32_tsc_adjust(-2 * TSC_ADJUST_VALUE); in l2_guest_code()
89 uint32_t control; in l1_guest_code() local
93 wrmsr(MSR_IA32_TSC, rdtsc() - TSC_ADJUST_VALUE); in l1_guest_code()
94 check_ia32_tsc_adjust(-1 * TSC_ADJUST_VALUE); in l1_guest_code()
101 control = vmreadz(CPU_BASED_VM_EXEC_CONTROL); in l1_guest_code()
102 control |= CPU_BASED_USE_MSR_BITMAPS | CPU_BASED_USE_TSC_OFFSETING; in l1_guest_code()
103 vmwrite(CPU_BASED_VM_EXEC_CONTROL, control); in l1_guest_code()
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/kernel/linux/linux-4.19/Documentation/leds/
Dledtrig-transient.txt19 As a specific example of this use-case, let's look at vibrate feature on
21 PMIC. There is a need to activate one shot timer to control the vibrate
41 that are active at the time driver gets suspended, continue to run, without
61 non-transient state. When driver gets suspended, irrespective of the transient
70 NOTE: Add a new property trigger state to control the state.
75 - duration allows setting timer value in msecs. The initial value is 0.
76 - activate allows activating and deactivating the timer specified by
79 - state allows user to specify a transient state to be held for the specified
82 activate - one shot timer activate mechanism.
92 duration - one shot timer value. When activate is set, duration value
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Dleds-lp55xx.txt7 -----------
13 Device attributes for user-space interface
26 control multi output LED channels such as led current, channel index.
28 general chip control such like the I2C and platform data.
51 Brightness control register access
60 This pattern data is saved as a file in the user-land or
65 To load and run the pattern, the programming sequence is following.
69 (4) Mode change to run
78 In more details, please refer to 'leds-lp5523.txt'.
80 For example, run blinking pattern in engine #1 of LP5521
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Dleds-lp5523.txt8 Contact: Samu Onkalo (samu.p.onkalo-at-nokia.com)
11 -----------
13 the led class control interface.
14 The name of each channel is configurable in the platform data - name and label.
31 There are two ways to run LED patterns.
33 1) Legacy interface - enginex_mode, enginex_load and enginex_leds
34 Control interface for the engines:
36 enginex_mode : disabled, load, run
38 enginex_leds : led mux control
44 echo "run" > engine3_mode
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Dleds-lp5521.txt8 Contact: Samu Onkalo (samu.p.onkalo-at-nokia.com)
11 -----------
14 the led class control interface. Channels have generic names:
21 There are two ways to run LED patterns.
23 1) Legacy interface - enginex_mode and enginex_load
24 Control interface for the engines:
26 enginex_mode : disabled, load, run
33 echo "run" > engine3_mode
38 2) Firmware interface - LP55xx common interface
39 For the details, please refer to 'firmware' section in leds-lp55xx.txt
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/kernel/linux/linux-5.10/drivers/net/ethernet/apple/
Dmace.c1 // SPDX-License-Identifier: GPL-2.0-only
30 static int port_aaui = -1;
115 int j, rev, rc = -EBUSY; in mace_probe()
120 return -ENODEV; in mace_probe()
123 addr = of_get_property(mace, "mac-address", NULL); in mace_probe()
125 addr = of_get_property(mace, "local-mac-address", NULL); in mace_probe()
127 printk(KERN_ERR "Can't get mac-address for MACE %pOF\n", in mace_probe()
129 return -ENODEV; in mace_probe()
134 * lazy allocate the driver-wide dummy buffer. (Note that we in mace_probe()
140 return -ENOMEM; in mace_probe()
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/kernel/linux/linux-4.19/drivers/net/ethernet/apple/
Dmace.c29 static int port_aaui = -1;
114 int j, rev, rc = -EBUSY; in mace_probe()
119 return -ENODEV; in mace_probe()
122 addr = of_get_property(mace, "mac-address", NULL); in mace_probe()
124 addr = of_get_property(mace, "local-mac-address", NULL); in mace_probe()
126 printk(KERN_ERR "Can't get mac-address for MACE %pOF\n", in mace_probe()
128 return -ENODEV; in mace_probe()
133 * lazy allocate the driver-wide dummy buffer. (Note that we in mace_probe()
139 return -ENOMEM; in mace_probe()
144 return -EBUSY; in mace_probe()
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/kernel/linux/linux-5.10/Documentation/leds/
Dleds-lp5523.rst9 Contact: Samu Onkalo (samu.p.onkalo-at-nokia.com)
12 -----------
14 the led class control interface.
15 The name of each channel is configurable in the platform data - name and label.
22 - /sys/class/leds/R1 (name: 'R1')
23 - /sys/class/leds/B1 (name: 'B1')
28 - /sys/class/leds/RGB:channelN (label: 'RGB', N: 0 ~ 8)
33 - /sys/class/leds/lp5523:channelN (N: 0 ~ 8)
36 There are two ways to run LED patterns.
38 1) Legacy interface - enginex_mode, enginex_load and enginex_leds
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Dleds-lp55xx.rst8 -----------
14 Device attributes for user-space interface
28 control multi output LED channels such as led current, channel index.
30 general chip control such like the I2C and platform data.
50 - Maximum number of channels
51 - Reset command, chip enable command
52 - Chip specific initialization
53 - Brightness control register access
54 - Setting LED output current
55 - Program memory address access for running patterns
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Dleds-lp5521.rst10 Contact: Samu Onkalo (samu.p.onkalo-at-nokia.com)
13 -----------
16 the led class control interface. Channels have generic names:
23 There are two ways to run LED patterns.
25 1) Legacy interface - enginex_mode and enginex_load
26 Control interface for the engines:
31 disabled, load, run
40 echo "run" > engine3_mode
46 2) Firmware interface - LP55xx common interface
48 For the details, please refer to 'firmware' section in leds-lp55xx.txt
[all …]
/kernel/linux/linux-4.19/Documentation/hwmon/
Dg7625 and performs closed-loop or open-loop control of the fan speed. Two
6 modes - PWM or DC - are supported by the device.
9 http://natisbad.org/NAS/ref/GMT_EDS-762_763-080710-0.2.pdf. sysfs
10 bindings are described in Documentation/hwmon/sysfs-interface.
13 /sys/bus/i2c/drivers/g762/ to control the operation of the device.
24 fan1_target: set desired fan speed. This only makes sense in closed-loop
25 fan speed control (i.e. when pwm1_enable is set to 2).
38 fan1_alarm: in closed-loop control mode, if fan RPM value is 25% out
42 pwm1_enable: set current fan speed control mode i.e. 1 for manual fan
43 speed control (open-loop) via pwm1 described below, 2 for
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/kernel/linux/linux-5.10/Documentation/hwmon/
Dg762.rst5 and performs closed-loop or open-loop control of the fan speed. Two
6 modes - PWM or DC - are supported by the device.
9 http://natisbad.org/NAS/ref/GMT_EDS-762_763-080710-0.2.pdf. sysfs
10 bindings are described in Documentation/hwmon/sysfs-interface.rst.
13 /sys/bus/i2c/drivers/g762/ to control the operation of the device.
25 set desired fan speed. This only makes sense in closed-loop
26 fan speed control (i.e. when pwm1_enable is set to 2).
44 in closed-loop control mode, if fan RPM value is 25% out
49 set current fan speed control mode i.e. 1 for manual fan
50 speed control (open-loop) via pwm1 described below, 2 for
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