Home
last modified time | relevance | path

Searched +full:rw +full:- +full:gpios (Results 1 – 25 of 137) sorted by relevance

123456

/kernel/linux/linux-4.19/Documentation/devicetree/bindings/auxdisplay/
Dhit,hd44780.txt5 which can be used in either 4-bit or 8-bit mode.
8 - compatible: Must contain "hit,hd44780",
9 - data-gpios: Must contain an array of either 4 or 8 GPIO specifiers,
10 referring to the GPIO pins connected to the data signal lines DB0-DB7
11 (8-bit mode) or DB4-DB7 (4-bit mode) of the LCD Controller's bus interface,
12 - enable-gpios: Must contain a GPIO specifier, referring to the GPIO pin
15 - rs-gpios: Must contain a GPIO specifier, referring to the GPIO pin
18 - display-height-chars: Height of the display, in character cells,
19 - display-width-chars: Width of the display, in character cells.
22 - rw-gpios: Must contain a GPIO specifier, referring to the GPIO pin
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/auxdisplay/
Dhit,hd44780.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert@linux-m68k.org>
15 interface, which can be used in either 4-bit or 8-bit mode.
21 data-gpios:
23 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or
24 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface.
26 - maxItems: 4
27 - maxItems: 8
[all …]
/kernel/linux/linux-5.10/drivers/tty/serial/
Dmxs-auart.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
11 * Copyright 2008-2010 Freescale Semiconductor, Inc.
34 #include <linux/dma-mapping.h>
126 * RW. Tell the UART to execute the RX DMA Command. The
130 /* RW. 0 use FIFO for status register; 1 use DMA */
133 * RW. RX TIMEOUT Enable. Valid for FIFO and DMA.
140 * RW. Receive Timeout Counter Value: number of 8-bit-time to wait before
142 * input is idle, then the watchdog counter will decrement each bit-time. Note
143 * 7-bit-time is added to the programmed value, so a value of zero will set
[all …]
/kernel/linux/linux-4.19/drivers/tty/serial/
Dmxs-auart.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
11 * Copyright 2008-2010 Freescale Semiconductor, Inc.
38 #include <linux/dma-mapping.h>
130 * RW. Tell the UART to execute the RX DMA Command. The
134 /* RW. 0 use FIFO for status register; 1 use DMA */
137 * RW. RX TIMEOUT Enable. Valid for FIFO and DMA.
144 * RW. Receive Timeout Counter Value: number of 8-bit-time to wait before
146 * input is idle, then the watchdog counter will decrement each bit-time. Note
147 * 7-bit-time is added to the programmed value, so a value of zero will set
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Ds5pv210-fascinate4g.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include "s5pv210-aries.dtsi"
9 model = "Samsung Galaxy S Fascinate 4G (SGH-T959P) based on S5PV210";
13 stdout-path = &uart2;
17 * Let's hardocde bootargs for now, till u-boot port is finished,
20 bootargs = "root=/dev/mmcblk1p1 rw rootwait ignore_loglevel earlyprintk";
23 gpio-keys {
[all …]
Ds5pv210-galaxys.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include "s5pv210-aries.dtsi"
9 model = "Samsung Galaxy S1 (GT-I9000) based on S5PV210";
13 stdout-path = &uart2;
17 * Let's hardocde bootargs for now, till u-boot port is finished,
20 bootargs = "root=/dev/mmcblk2p1 rw rootwait ignore_loglevel earlyprintk";
23 nand_pwrseq: nand-pwrseq {
[all …]
Ddove-d3plug.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
16 bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/mmcblk0p2 rw rootwait";
20 compatible = "gpio-leds";
21 pinctrl-0 = <&pmx_gpio_0 &pmx_gpio_1 &pmx_gpio_2>;
22 pinctrl-names = "default";
24 wlan-act {
25 label = "wlan-act";
26 gpios = <&gpio0 0 1>;
29 wlan-ap {
[all …]
Dusb_a9263.dts2 * usb_a9263.dts - Device Tree file for Caloa USB A9293 board
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 /dts-v1/;
13 compatible = "atmel,usb-a9263", "atmel,at91sam9263", "atmel,at91sam9";
16 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
25 clock-frequency = <32768>;
29 clock-frequency = <12000000>;
41 compatible = "atmel,tcb-timer";
46 compatible = "atmel,tcb-timer";
52 phy-mode = "rmii";
[all …]
Dr8a73a4-ape6evm.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
22 bootargs = "ignore_loglevel root=/dev/nfs ip=dhcp rw";
23 stdout-path = "serial0:115200n8";
36 vcc_mmc0: regulator-mmc0 {
37 compatible = "regulator-fixed";
38 regulator-name = "MMC0 Vcc";
39 regulator-min-microvolt = <2800000>;
[all …]
Dat91sam9263ek.dts2 * at91sam9263ek.dts - Device Tree file for Atmel at91sam9263 reference board
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 /dts-v1/;
16 bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
17 stdout-path = "serial0:115200n8";
26 clock-frequency = <32768>;
30 clock-frequency = <16367660>;
42 compatible = "atmel,tcb-timer";
47 compatible = "atmel,tcb-timer";
53 pinctrl-0 = <
[all …]
Dtny_a9260_common.dtsi2 * tny_a9260_common.dtsi - Device Tree file for Caloa TNY A926x board
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
11 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock6 rw rootfstype=ubifs";
20 clock-frequency = <32768>;
24 clock-frequency = <12000000>;
32 compatible = "atmel,tcb-timer";
37 compatible = "atmel,tcb-timer";
50 nand_controller: nand-controller {
52 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
53 pinctrl-names = "default";
[all …]
Dat91-cosino.dtsi2 * at91-cosino.dtsi - Device Tree file for Cosino core module
4 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
21 bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait";
30 clock-frequency = <32768>;
34 clock-frequency = <12000000>;
42 compatible = "atmel,tcb-timer";
47 compatible = "atmel,tcb-timer";
53 pinctrl-0 = <
60 bus-width = <4>;
61 cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
[all …]
Dat91-wb50n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * at91-wb50n.dtsi - Device Tree include file for wb50n cpu module
12 model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
16 bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs rw";
17 stdout-path = "serial0:115200n8";
38 clock-frequency = <32768>;
42 clock-frequency = <12000000>;
46 atmel,osc-bypass;
50 atmel,clk-output-range = <0 132000000>;
54 pinctrl-names = "default";
[all …]
Dat91sam9rlek.dts2 * at91sam9rlek.dts - Device Tree file for Atmel at91sam9rl reference board
5 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 /dts-v1/;
17 bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";
18 stdout-path = "serial0:115200n8";
27 clock-frequency = <32768>;
31 clock-frequency = <12000000>;
41 bits-per-pixel = <16>;
42 atmel,lcdcon-backlight;
45 atmel,guard-time = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dintel-ixp42x-linksys-nslu2.dts1 // SPDX-License-Identifier: ISC
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
24 bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-status {
[all …]
Ddove-d3plug.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
16 bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/mmcblk0p2 rw rootwait";
20 compatible = "gpio-leds";
21 pinctrl-0 = <&pmx_gpio_0 &pmx_gpio_1 &pmx_gpio_2>;
22 pinctrl-names = "default";
24 wlan-act {
25 label = "wlan-act";
26 gpios = <&gpio0 0 1>;
29 wlan-ap {
[all …]
Demev2-kzm9d.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
28 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
29 stdout-path = "serial1:115200n8";
33 compatible = "gpio-keys";
35 debounce-interval = <50>;
36 wakeup-source;
[all …]
Dintel-ixp43x-gateworks-gw2358.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for Gateworks IXP43x-based Cambria GW2358
6 /dts-v1/;
8 #include "intel-ixp43x.dtsi"
13 #address-cells = <1>;
14 #size-cells = <1>;
23 bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
24 stdout-path = "uart0:115200n8";
32 compatible = "gpio-leds";
33 led-user {
[all …]
Dusb_a9263.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * usb_a9263.dts - Device Tree file for Caloa USB A9293 board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
12 compatible = "atmel,usb-a9263", "atmel,at91sam9263", "atmel,at91sam9";
15 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
24 clock-frequency = <32768>;
28 clock-frequency = <12000000>;
40 compatible = "atmel,tcb-timer";
45 compatible = "atmel,tcb-timer";
[all …]
Dkirkwood-netgear_readynas_nv+_v2.dts1 // SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
11 #include "kirkwood-6282.dtsi"
15 …compatible = "netgear,readynas-nv+-v2", "netgear,readynas", "marvell,kirkwood-88f6282", "marvell,k…
24 stdout-path = &uart0;
28 pinctrl: pin-controller@10000 {
29 pmx_button_power: pmx-button-power {
34 pmx_button_backup: pmx-button-backup {
39 pmx_button_reset: pmx-button-reset {
44 pmx_led_blue_power: pmx-led-blue-power {
[all …]
Dr8a73a4-ape6evm.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
22 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
23 stdout-path = "serial0:115200n8";
36 vcc_mmc0: regulator-mmc0 {
37 compatible = "regulator-fixed";
38 regulator-name = "MMC0 Vcc";
39 regulator-min-microvolt = <2800000>;
[all …]
Dtny_a9260_common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * tny_a9260_common.dtsi - Device Tree file for Caloa TNY A926x board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
10 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock6 rw rootfstype=ubifs";
19 clock-frequency = <32768>;
23 clock-frequency = <12000000>;
31 compatible = "atmel,tcb-timer";
36 compatible = "atmel,tcb-timer";
49 nand_controller: nand-controller {
51 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
[all …]
Dat91-cosino.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-cosino.dtsi - Device Tree file for Cosino core module
5 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
20 bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait";
29 clock-frequency = <32768>;
33 clock-frequency = <12000000>;
39 atmel,adc-ts-wires = <4>;
40 atmel,adc-ts-pressure-threshold = <10000>;
49 pinctrl-0 = <&pinctrl_ebi_addr_nand
51 pinctrl-names = "default";
[all …]
Dat91-wb50n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * at91-wb50n.dtsi - Device Tree include file for wb50n cpu module
12 model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
16 bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs rw";
17 stdout-path = "serial0:115200n8";
38 clock-frequency = <32768>;
42 clock-frequency = <12000000>;
46 atmel,osc-bypass;
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
[all …]
Dat91sam9261ek.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 /dts-v1/;
15 bootargs = "rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs rw";
16 stdout-path = "serial0:115200n8";
25 clock-frequency = <32768>;
29 clock-frequency = <18432000>;
40 atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
44 bits-per-pixel = <16>;
[all …]

123456