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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/
Dpwm-samsung.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC PWM timers
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 Samsung SoCs contain PWM timer blocks which can be used for system clock source
15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
16 PWM timer block provides 5 PWM channels (not all of them can drive physical
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Ds3c64xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <0>;
37 compatible = "arm,arm1176jzf-s", "arm,arm1176";
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
[all …]
Ds5pv210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
19 #include <dt-bindings/clock/s5pv210.h>
20 #include <dt-bindings/clock/s5pv210-audss.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
43 #address-cells = <1>;
44 #size-cells = <0>;
48 compatible = "arm,cortex-a8";
54 compatible = "simple-bus";
[all …]
Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
50 #address-cells = <1>;
51 #size-cells = <0>;
[all …]
Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Ds3c64xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <0>;
37 compatible = "arm,arm1176jzf-s";
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
[all …]
Ds5pv210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
19 #include <dt-bindings/clock/s5pv210.h>
20 #include <dt-bindings/clock/s5pv210-audss.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
45 #address-cells = <1>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a8";
55 xxti: oscillator-0 {
[all …]
Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
50 #address-cells = <1>;
51 #size-cells = <0>;
[all …]
Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/pwm/
Dpwm-samsung.txt1 * Samsung PWM timers
3 Samsung SoCs contain PWM timer blocks which can be used for system clock source
4 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
5 PWM timer block provides 5 PWM channels (not all of them can drive physical
6 outputs - see SoC and board manual).
11 - compatible : should be one of following:
12 samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
13 samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
14 samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs
15 samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Ddma-s3c64xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* linux/arch/arm/mach-s3c6400/include/mach/dma.h
9 * S3C6400 - DMA support
45 #define DMACH_PWM "pwm"
Dpl080.c1 // SPDX-License-Identifier: GPL-2.0
3 // Samsung's S3C64XX generic DMA support using amba-pl08x driver.
17 #include "regs-sys-s3c64xx.h"
21 return cd->min_signal; in pl08x_get_xfer_signal()
117 { "s3c6400-uart.0", "tx", &s3c64xx_dma0_info[0] },
118 { "s3c6400-uart.0", "rx", &s3c64xx_dma0_info[1] },
119 { "s3c6400-uart.1", "tx", &s3c64xx_dma0_info[2] },
120 { "s3c6400-uart.1", "rx", &s3c64xx_dma0_info[3] },
121 { "s3c6400-uart.2", "tx", &s3c64xx_dma0_info[4] },
122 { "s3c6400-uart.2", "rx", &s3c64xx_dma0_info[5] },
[all …]
DKconfig.s3c64xx1 # SPDX-License-Identifier: GPL-2.0
35 Enable S3C6400 CPU support
50 Internal configuration for default SDHCI setup for S3C6400 and
62 Compile in platform device definition LCD backlight with PWM Timer
221 bool "Support Wolfson Microelectronics 1190-EV1 PMIC card"
228 The Wolfson Microelectronics 1190-EV1 is a WM835x based PMIC
233 with or without the 1190-EV1 fitted.
236 bool "Support Wolfson Microelectronics 1192-EV1 PMIC card"
244 The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC
249 with or without the 1192-EV1 fitted.
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0
5 source "arch/arm/mach-s3c/Kconfig.s3c24xx"
6 source "arch/arm/mach-s3c/Kconfig.s3c64xx"
33 int "S3C UART to use for low-level messages"
37 Choice of which UART port to use for the low-level messages,
40 must have been initialised by the boot-loader before use.
155 Compile in platform device definition for USB high-speed OtG
220 Compile in platform device definition for PWM Timer
223 bool "PWM device support"
224 select PWM
[all …]
Ds3c64xx.c1 // SPDX-License-Identifier: GPL-2.0
28 #include <linux/dma-mapping.h>
31 #include <linux/irqchip/arm-vic.h>
40 #include "regs-gpio.h"
41 #include "gpio-samsung.h"
46 #include "gpio-cfg.h"
47 #include "pwm-core.h"
48 #include "regs-irqtype.h"
50 #include "irq-uart-s3c64xx.h"
70 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); in s3c64xx_init_uarts()
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-s3c64xx/include/mach/
Ddma.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* linux/arch/arm/mach-s3c6400/include/mach/dma.h
9 * S3C6400 - DMA support
45 #define DMACH_PWM "pwm"
/kernel/linux/linux-4.19/arch/arm/mach-s3c64xx/
Dpl080.c1 // SPDX-License-Identifier: GPL-2.0
3 // Samsung's S3C64XX generic DMA support using amba-pl08x driver.
17 #include "regs-sys.h"
21 return cd->min_signal; in pl08x_get_xfer_signal()
117 { "s3c6400-uart.0", "tx", &s3c64xx_dma0_info[0] },
118 { "s3c6400-uart.0", "rx", &s3c64xx_dma0_info[1] },
119 { "s3c6400-uart.1", "tx", &s3c64xx_dma0_info[2] },
120 { "s3c6400-uart.1", "rx", &s3c64xx_dma0_info[3] },
121 { "s3c6400-uart.2", "tx", &s3c64xx_dma0_info[4] },
122 { "s3c6400-uart.2", "rx", &s3c64xx_dma0_info[5] },
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0
35 Enable S3C6400 CPU support
50 Internal configuration for default SDHCI setup for S3C6400 and
62 Compile in platform device definition LCD backlight with PWM Timer
222 bool "Support Wolfson Microelectronics 1190-EV1 PMIC card"
229 The Wolfson Microelectronics 1190-EV1 is a WM835x based PMIC
234 with or without the 1190-EV1 fitted.
237 bool "Support Wolfson Microelectronics 1192-EV1 PMIC card"
245 The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC
250 with or without the 1192-EV1 fitted.
[all …]
Dcommon.c1 // SPDX-License-Identifier: GPL-2.0
27 #include <linux/dma-mapping.h>
30 #include <linux/irqchip/arm-vic.h>
40 #include <mach/regs-gpio.h>
41 #include <mach/gpio-samsung.h>
46 #include <plat/gpio-cfg.h>
47 #include <plat/pwm-core.h>
48 #include <plat/regs-irqtype.h>
51 #include "irq-uart.h"
52 #include "watchdog-reset.h"
[all …]
/kernel/linux/linux-4.19/arch/arm/plat-samsung/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
29 int "S3C UART to use for low-level messages"
33 Choice of which UART port to use for the low-level messages,
36 must have been initialised by the boot-loader before use.
151 Compile in platform device definition for USB high-speed OtG
216 Compile in platform device definition for PWM Timer
219 bool "PWM device support"
220 select PWM
223 Support for exporting the PWM timer blocks via the pwm device
234 pinctrl-samsung driver.
[all …]
/kernel/linux/linux-5.10/drivers/clocksource/
Dsamsung_pwm_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * samsung - Common hr-timer support (s3c and s5p)
80 static struct samsung_pwm_clocksource pwm; variable
93 reg = readl(pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
95 reg |= (prescale - 1) << shift; in samsung_timer_set_prescale()
96 writel(reg, pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
108 bits = (fls(divisor) - 1) - pwm.variant.div_base; in samsung_timer_set_divisor()
112 reg = readl(pwm.base + REG_TCFG1); in samsung_timer_set_divisor()
115 writel(reg, pwm.base + REG_TCFG1); in samsung_timer_set_divisor()
130 tcon = readl_relaxed(pwm.base + REG_TCON); in samsung_time_stop()
[all …]
/kernel/linux/linux-4.19/drivers/clocksource/
Dsamsung_pwm_timer.c5 * samsung - Common hr-timer support (s3c and s5p)
83 static struct samsung_pwm_clocksource pwm; variable
96 reg = readl(pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
98 reg |= (prescale - 1) << shift; in samsung_timer_set_prescale()
99 writel(reg, pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
111 bits = (fls(divisor) - 1) - pwm.variant.div_base; in samsung_timer_set_divisor()
115 reg = readl(pwm.base + REG_TCFG1); in samsung_timer_set_divisor()
118 writel(reg, pwm.base + REG_TCFG1); in samsung_timer_set_divisor()
133 tcon = readl_relaxed(pwm.base + REG_TCON); in samsung_time_stop()
135 writel_relaxed(tcon, pwm.base + REG_TCON); in samsung_time_stop()
[all …]
/kernel/linux/linux-5.10/drivers/pwm/
Dpwm-samsung.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
9 * PWM driver for Samsung SoCs
21 #include <linux/pwm.h>
59 * struct samsung_pwm_channel - private data of PWM channel
71 * struct samsung_pwm_chip - private data of PWM chip
72 * @chip: generic PWM chip
74 * @inverter_mask: inverter status for all channels - one bit per channel
75 * @disabled_mask: disabled status for all channels - one bit per channel
76 * @base: base address of mapped PWM registers
[all …]
/kernel/linux/linux-4.19/drivers/pwm/
Dpwm-samsung.c4 * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
8 * PWM driver for Samsung SoCs
24 #include <linux/pwm.h>
62 * struct samsung_pwm_channel - private data of PWM channel
74 * struct samsung_pwm_chip - private data of PWM chip
75 * @chip: generic PWM chip
77 * @inverter_mask: inverter status for all channels - one bit per channel
78 * @disabled_mask: disabled status for all channels - one bit per channel
79 * @base: base address of mapped PWM registers
98 * PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 a well-defined interface, so the software doesn't need to know
21 anything about the low-level (hardware register) stuff.
27 On several non-X86 architectures, the frame buffer device is the
35 and the Framebuffer-HOWTO at
36 <http://www.munted.org.uk/programming/Framebuffer-HOWTO-1.3.html> for more
40 are compiling a kernel for a non-x86 architecture.
46 device-aware may cause unexpected results. If unsure, say N.
104 Allow generic frame-buffer functions to work on displays with 1, 2
136 Allow generic frame-buffer to provide get_fb_unmapped_area
[all …]

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