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Searched +full:sdm845 +full:- +full:llcc (Results 1 – 11 of 11) sorted by relevance

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/msm/
Dqcom,llcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/msm/qcom,llcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rishabh Bhatnagar <rishabhb@codeaurora.org>
11 - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
14 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
24 - qcom,sc7180-llcc
25 - qcom,sdm845-llcc
29 - description: LLCC base register region
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/msm/
Dqcom,llcc.txt3 LLCC (Last Level Cache Controller) provides last level of cache memory in SOC,
11 - compatible:
14 Definition: must be "qcom,sdm845-llcc"
16 - reg:
18 Value Type: <prop-encoded-array>
23 cache-controller@1100000 {
24 compatible = "qcom,sdm845-llcc";
/kernel/linux/linux-4.19/drivers/soc/qcom/
Dllcc-sdm845.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
11 #include <linux/soc/qcom/llcc-qcom.h>
16 * slice_id: llcc slice id for each client
30 * When configured to 0 all ways in llcc are probed.
80 { .compatible = "qcom,sdm845-llcc", },
86 .name = "sdm845-llcc",
93 MODULE_DESCRIPTION("QCOM sdm845 LLCC driver");
DKconfig13 resource on a RPM-hardened platform must use this database to get
44 tristate "Qualcomm Technologies, Inc. LLCC driver"
48 Last Level Cache Controller(LLCC) driver. This provides interfaces
49 to clients that use the LLCC. Say yes here to enable LLCC slice
53 tristate "Qualcomm Technologies, Inc. SDM845 LLCC driver"
56 Say yes here to enable the LLCC driver for SDM845. This provides
57 data required to configure LLCC so that clients can start using the
58 LLCC slices.
90 purpose of exchanging sector-data between the remote filesystem
96 bool "Qualcomm RPM-Hardened (RPMH) Communication"
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 CFLAGS_rpmh-rsc.o := -I$(src)
3 obj-$(CONFIG_QCOM_GENI_SE) += qcom-geni-se.o
4 obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o
5 obj-$(CONFIG_QCOM_GLINK_SSR) += glink_ssr.o
6 obj-$(CONFIG_QCOM_GSBI) += qcom_gsbi.o
7 obj-$(CONFIG_QCOM_MDT_LOADER) += mdt_loader.o
8 obj-$(CONFIG_QCOM_PM) += spm.o
9 obj-$(CONFIG_QCOM_QMI_HELPERS) += qmi_helpers.o
10 qmi_helpers-y += qmi_encdec.o qmi_interface.o
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/kernel/linux/linux-5.10/drivers/soc/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 the low-power state for resources related to the remoteproc
26 resource on a RPM-hardened platform must use this database to get
43 be called qcom-cpr
64 tristate "Qualcomm Technologies, Inc. LLCC driver"
68 Last Level Cache Controller(LLCC) driver for platforms such as,
69 SDM845. This provides interfaces to clients that use the LLCC.
70 Say yes here to enable LLCC slice driver.
105 purpose of exchanging sector-data between the remote filesystem
111 bool "Qualcomm RPM-Hardened (RPMH) Communication"
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Dllcc-qcom.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
19 #include <linux/soc/qcom/llcc-qcom.h>
51 * llcc_slice_config - Data associated with the llcc slice
53 * @slice_id: llcc slice id for each client
67 * When configured to 0 all ways in llcc are probed.
132 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
135 * llcc_slice_getd - get llcc slice descriptor
138 * A pointer to llcc slice descriptor will be returned on success and
150 cfg = drv_data->cfg; in llcc_slice_getd()
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/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_catalog.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
37 #define DPU_HW_VER_400 DPU_HW_VER(4, 0, 0) /* sdm845 v1.0 */
38 #define DPU_HW_VER_401 DPU_HW_VER(4, 0, 1) /* sdm845 v2.0 */
94 * SSPP sub-blocks/features
101 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion
104 * @DPU_SSPP_QOS_8LVL, SSPP support 8-level QoS control
134 * MIXER sub-blocks/features
136 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
150 * DSPP sub-blocks
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/kernel/linux/linux-4.19/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_catalog.h1 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
46 #define DPU_HW_VER_400 DPU_HW_VER(4, 0, 0) /* sdm845 v1.0 */
47 #define DPU_HW_VER_401 DPU_HW_VER(4, 0, 1) /* sdm845 v2.0 */
100 * SSPP sub-blocks/features
106 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion
109 * @DPU_SSPP_QOS_8LVL, SSPP support 8-level QoS control
138 * MIXER sub-blocks/features
140 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
154 * PINGPONG sub-blocks
172 * CTL sub-blocks
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 SoC device tree source
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
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Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
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