Searched +full:sdm845 +full:- +full:qmp +full:- +full:usb3 +full:- +full:uni +full:- +full:phy (Results 1 – 5 of 5) sorted by relevance
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | qcom,qmp-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm QMP PHY controller
11 - Manu Gautam <mgautam@codeaurora.org>
14 QMP phy controller supports physical layer functionality for a number of
20 - qcom,ipq8074-qmp-pcie-phy
21 - qcom,ipq8074-qmp-usb3-phy
22 - qcom,msm8996-qmp-pcie-phy
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/phy/ |
| D | qcom-qmp-phy.txt | 1 Qualcomm QMP PHY controller
4 QMP phy controller supports physical layer functionality for a number of
8 - compatible: compatible list, contains:
9 "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074
10 "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996,
11 "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996,
12 "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845,
13 "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845.
15 - reg:
16 - For "qcom,sdm845-qmp-usb3-phy":
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| /kernel/linux/linux-5.10/drivers/phy/qualcomm/ |
| D | phy-qcom-qmp.c | 1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
17 #include <linux/phy/phy.h>
23 #include <dt-bindings/phy/phy.h>
25 #include "phy-qcom-qmp.h"
42 /* DP PHY soft reset */
44 /* mux to select DP PHY reset control, 0:HW control, 1: software reset */
46 /* USB3 PHY soft reset */
48 /* mux to select USB3 PHY reset control, 0:HW control, 1: software reset */
52 #define USB3_MODE BIT(0) /* enables USB3 mode */
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| /kernel/linux/linux-4.19/drivers/phy/qualcomm/ |
| D | phy-qcom-qmp.c | 1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
17 #include <linux/phy/phy.h>
23 #include <dt-bindings/phy/phy.h>
25 #include "phy-qcom-qmp.h"
42 /* DP PHY soft reset */
44 /* mux to select DP PHY reset control, 0:HW control, 1: software reset */
46 /* USB3 PHY soft reset */
48 /* mux to select USB3 PHY reset control, 0:HW control, 1: software reset */
52 #define USB3_MODE BIT(0) /* enables USB3 mode */
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | sdm845.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 SoC device tree source
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
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