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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dspear310-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear310-evb", "st,spear310";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
28 st,pins = "gpio0_pin0_grp",
37 st,pins = "i2c0_grp";
41 st,pins = "mii0_grp";
[all …]
Dspear320-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear320-evb", "st,spear320";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 st,pinmux-mode = <4>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&state_default>;
29 st,pins = "i2c0_grp";
33 st,pins = "mii0_grp";
[all …]
Dox810se.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ox810se.dtsi - Device tree file for Oxford Semiconductor OX810SE SoC
8 #include <dt-bindings/clock/oxsemi,ox810se.h>
9 #include <dt-bindings/reset/oxsemi,ox810se.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
17 #address-cells = <0>;
18 #size-cells = <0>;
22 compatible = "arm,arm926ej-s";
35 compatible = "fixed-clock";
[all …]
Dat91-foxg20.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-foxg20.dts - Device Tree file for Acme Systems FoxG20 board
9 /dts-v1/;
26 clock-frequency = <32768>;
30 clock-frequency = <18432000>;
38 compatible = "atmel,tcb-timer";
43 compatible = "atmel,tcb-timer";
49 atmel,vbus-gpio = <&pioC 6 GPIO_ACTIVE_HIGH>;
54 pinctrl-0 = <
58 pinctrl-names = "default";
[all …]
Dmt7629-rfb.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
44 reg_3p3v: regulator-3p3v {
45 compatible = "regulator-fixed";
46 regulator-name = "fixed-3.3V";
[all …]
Dspear320-hmi.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear320-hmi", "st,spear320";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 st,pinmux-mode = <4>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&state_default>;
29 st,pins = "i2c0_grp";
33 st,pins = "ssp0_grp";
[all …]
Dat91sam9260.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
20 interrupt-parent = <&aic>;
[all …]
Dqcom-ipq4019-ap.dk04.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
17 stdout-path = "serial0:115200n8";
27 serial_0_pins: serial0-pinmux {
28 pins = "gpio16", "gpio17";
30 bias-disable;
33 serial_1_pins: serial1-pinmux {
[all …]
Darmada-xp-synology-ds414.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
12 * were delivered with an older version of u-boot that left internal
17 * installing it from u-boot prompt) or adjust the Devive Tree
21 /dts-v1/;
23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "armada-xp-mv78230.dtsi"
29 compatible = "synology,ds414", "marvell,armadaxp-mv78230",
30 "marvell,armadaxp", "marvell,armada-370-xp";
[all …]
Dat91-sama5d3_xplained.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-sama5d3_xplained.dts - Device Tree file for the SAMA5D3 Xplained board
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
14 compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5";
17 stdout-path = "serial0:115200n8";
26 clock-frequency = <32768>;
30 clock-frequency = <12000000>;
37 …pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd…
38 vmmc-supply = <&vcc_mmc0_reg>;
[all …]
Dkirkwood-openblocks_a6.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include "kirkwood-6282.dtsi"
9 compatible = "plathome,openblocks-a6", "marvell,kirkwood-88f6283", "marvell,kirkwood";
18 stdout-path = &uart0;
22 serial@12000 {
26 serial@12100 {
31 nr-ports = <1>;
44 pinctrl: pin-controller@10000 {
45 pinctrl-0 = <&pmx_dip_switches>;
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dspear310-evb.dts10 * http://www.opensource.org/licenses/gpl-license.html
14 /dts-v1/;
19 compatible = "st,spear310-evb", "st,spear310";
20 #address-cells = <1>;
21 #size-cells = <1>;
29 pinctrl-names = "default";
30 pinctrl-0 = <&state_default>;
34 st,pins = "gpio0_pin0_grp",
43 st,pins = "i2c0_grp";
47 st,pins = "mii0_grp";
[all …]
Dspear320-evb.dts10 * http://www.opensource.org/licenses/gpl-license.html
14 /dts-v1/;
19 compatible = "st,spear320-evb", "st,spear320";
20 #address-cells = <1>;
21 #size-cells = <1>;
29 st,pinmux-mode = <4>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&state_default>;
35 st,pins = "i2c0_grp";
39 st,pins = "mii0_grp";
[all …]
Dox810se.dtsi2 * ox810se.dtsi - Device tree file for Oxford Semiconductor OX810SE SoC
10 #include <dt-bindings/clock/oxsemi,ox810se.h>
11 #include <dt-bindings/reset/oxsemi,ox810se.h>
17 #address-cells = <0>;
18 #size-cells = <0>;
22 compatible = "arm,arm926ej-s";
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
36 clock-frequency = <25000000>;
40 compatible = "fixed-clock";
[all …]
Dat91-foxg20.dts2 * at91-foxg20.dts - Device Tree file for Acme Systems FoxG20 board
10 /dts-v1/;
27 clock-frequency = <32768>;
31 clock-frequency = <18432000>;
39 compatible = "atmel,tcb-timer";
44 compatible = "atmel,tcb-timer";
50 atmel,vbus-gpio = <&pioC 6 GPIO_ACTIVE_HIGH>;
55 pinctrl-0 = <
63 bus-width = <4>;
67 usart0: serial@fffb0000 {
[all …]
Dqcom-ipq4019-ap.dk04.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
17 stdout-path = "serial0:115200n8";
27 serial_0_pins: serial0-pinmux {
28 pins = "gpio16", "gpio17";
30 bias-disable;
33 serial_1_pins: serial1-pinmux {
[all …]
Dspear320-hmi.dts10 * http://www.opensource.org/licenses/gpl-license.html
14 /dts-v1/;
19 compatible = "st,spear320-hmi", "st,spear320";
20 #address-cells = <1>;
21 #size-cells = <1>;
29 st,pinmux-mode = <4>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&state_default>;
35 st,pins = "i2c0_grp";
39 st,pins = "ssp0_grp";
[all …]
Darmada-xp-synology-ds414.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
12 * were delivered with an older version of u-boot that left internal
17 * installing it from u-boot prompt) or adjust the Devive Tree
21 /dts-v1/;
23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "armada-xp-mv78230.dtsi"
29 compatible = "synology,ds414", "marvell,armadaxp-mv78230",
30 "marvell,armadaxp", "marvell,armada-370-xp";
[all …]
Dkirkwood-openblocks_a6.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include "kirkwood-6282.dtsi"
9 compatible = "plathome,openblocks-a6", "marvell,kirkwood-88f6283", "marvell,kirkwood";
18 stdout-path = &uart0;
22 serial@12000 {
26 serial@12100 {
31 nr-ports = <1>;
44 pinctrl: pin-controller@10000 {
45 pinctrl-0 = <&pmx_dip_switches>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
25 stdout-path = "serial0:115200n8";
31 proc-supply = <&mt6380_vcpu_reg>;
32 sram-supply = <&mt6380_vm_reg>;
36 proc-supply = <&mt6380_vcpu_reg>;
37 sram-supply = <&mt6380_vm_reg>;
[all …]
Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
16 model = "Bananapi BPI-R64";
17 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
24 stdout-path = "serial0:115200n8";
30 proc-supply = <&mt6380_vcpu_reg>;
31 sram-supply = <&mt6380_vm_reg>;
35 proc-supply = <&mt6380_vcpu_reg>;
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/mediatek/
Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
25 stdout-path = "serial0:115200n8";
31 proc-supply = <&mt6380_vcpu_reg>;
32 sram-supply = <&mt6380_vm_reg>;
36 proc-supply = <&mt6380_vcpu_reg>;
37 sram-supply = <&mt6380_vm_reg>;
[all …]
/kernel/linux/linux-4.19/include/linux/
Dioc4.h38 * 0/1: Serial port 0 TX/RX
39 * 2/3: Serial port 1 TX/RX
40 * 4/5: Serial port 2 TX/RX
41 * 6/7: Serial port 3 TX/RX
43 * 9-15: Undefined
46 uint32_t addr:26; /* Bits 31-6 of error addr */
49 uint32_t pci_err_addr_h; /* Bits 63-32 of error addr */
55 uint8_t rx_high:1; /* RX high-water exceeded */
59 uint8_t intr_pass:1; /* Interrupt pass-through */
62 } sio_ir; /* Serial interrupt state */
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/media/
Dstih407-c8sectpfe.txt5 stream data into the SoC on the TS pins, and into DDR for further processing.
9 located on an external DVB frontend card connected to SoC TS input pins.
14 - compatible : Should be "stih407-c8sectpfe"
16 - reg : Address and length of register sets for each device in
17 "reg-names"
19 - reg-names : The names of the register addresses corresponding to the
21 - c8sectpfe: c8sectpfe registers
22 - c8sectpfe-ram: c8sectpfe internal sram
24 - clocks : phandle list of c8sectpfe clocks
25 - clock-names : should be "c8sectpfe"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dstih407-c8sectpfe.txt5 stream data into the SoC on the TS pins, and into DDR for further processing.
9 located on an external DVB frontend card connected to SoC TS input pins.
14 - compatible : Should be "stih407-c8sectpfe"
16 - reg : Address and length of register sets for each device in
17 "reg-names"
19 - reg-names : The names of the register addresses corresponding to the
21 - c8sectpfe: c8sectpfe registers
22 - c8sectpfe-ram: c8sectpfe internal sram
24 - clocks : phandle list of c8sectpfe clocks
25 - clock-names : should be "c8sectpfe"
[all …]

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