Searched +full:skew +full:- +full:delay (Results 1 – 25 of 122) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | micrel-ksz90x1.txt | 4 to clock delays. You can specify clock delay values in the PHY OF 8 Note that these settings are applied after any phy-specific fixup from 14 All skew control options are specified in picoseconds. The minimum 17 skew values actually increase in 120ps steps, starting from -840ps. The 23 The following table shows the actual skew delay you will get for each of the 25 corresponding pad skew register: 27 Device Tree Value Delay Pad Skew Register Value 28 ----------------------------------------------------- 29 0 -840ps 0000 30 200 -720ps 0001 [all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | gemini-sl93512r.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * "Gemini324 EV-Board" before Storm acquired Storlink Semiconductor. 9 /dts-v1/; 12 #include <dt-bindings/input/input.h> 15 model = "Storlink Semiconductor Gemini324 EV-Board / Storm Semiconductor SL93512R_BRD"; 17 #address-cells = <1>; 18 #size-cells = <1>; 28 stdout-path = &uart0; 32 compatible = "gpio-keys"; 34 button-wps { [all …]
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| D | gemini-sq201.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 24 stdout-path = &uart0; 28 compatible = "gpio-keys"; 30 button-setup { 31 debounce-interval = <50>; 32 wakeup-source; [all …]
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| D | gemini-nas4220b.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree file for the Gemini-based Raidsonic NAS IB-4220-B 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 12 model = "Raidsonic NAS IB-4220-B"; 13 compatible = "raidsonic,ib-4220-b", "cortina,gemini"; 14 #address-cells = <1>; 15 #size-cells = <1>; 24 stdout-path = &uart0; 28 compatible = "gpio-keys"; [all …]
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| D | gemini-dlink-dns-313.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree file for D-Link DNS-313 1-Bay Network Storage Enclosure 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/thermal/thermal.h> 13 model = "D-Link DNS-313 1-Bay Network Storage Enclosure"; 14 compatible = "dlink,dns-313", "cortina,gemini"; 15 #address-cells = <1>; 16 #size-cells = <1>; 19 /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */ [all …]
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| D | socfpga_arria10_socdk.dtsi | 21 compatible = "altr,socfpga-arria10", "altr,socfpga"; 30 stdout-path = "serial0:115200n8"; 40 compatible = "gpio-leds"; 43 label = "a10sr-led0"; 48 label = "a10sr-led1"; 53 label = "a10sr-led2"; 58 label = "a10sr-led3"; 67 clock-frequency = <25000000>; 75 phy-mode = "rgmii"; 76 phy-addr = <0xffffffff>; /* probe for phy addr */ [all …]
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| D | socfpga_cyclone5_vining_fpga.dts | 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 49 #include <dt-bindings/gpio/gpio.h> 50 #include <dt-bindings/input/input.h> 54 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga"; 75 gpio-keys { 76 compatible = "gpio-keys"; 97 regulator-usb-nrst { 98 compatible = "regulator-fixed"; 99 regulator-name = "usb_nrst"; [all …]
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| D | socfpga_cyclone5_sodia.dts | 19 #include <dt-bindings/gpio/gpio.h> 20 #include <dt-bindings/input/input.h> 24 compatible = "macnica,sodia", "altr,socfpga-cyclone5", "altr,socfpga"; 28 stdout-path = "serial0:115200n8"; 41 regulator_3_3v: 3-3-v-regulator { 42 compatible = "regulator-fixed"; 43 regulator-name = "3.3V"; 44 regulator-min-microvolt = <3300000>; 45 regulator-max-microvolt = <3300000>; 48 leds: gpio-leds { [all …]
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| D | socfpga_arria5_socdk.dts | 22 compatible = "altr,socfpga-arria5", "altr,socfpga"; 26 stdout-path = "serial0:115200n8"; 43 compatible = "gpio-leds"; 65 regulator_3_3v: 3-3-v-regulator { 66 compatible = "regulator-fixed"; 67 regulator-name = "3.3V"; 68 regulator-min-microvolt = <3300000>; 69 regulator-max-microvolt = <3300000>; 75 phy-mode = "rgmii"; 77 rxd0-skew-ps = <0>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | gemini-sl93512r.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * "Gemini324 EV-Board" before Storm acquired Storlink Semiconductor. 9 /dts-v1/; 12 #include <dt-bindings/input/input.h> 15 model = "Storlink Semiconductor Gemini324 EV-Board / Storm Semiconductor SL93512R_BRD"; 17 #address-cells = <1>; 18 #size-cells = <1>; 28 stdout-path = &uart0; 32 compatible = "gpio-keys"; 34 button-wps { [all …]
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| D | gemini-sq201.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 24 stdout-path = &uart0; 28 compatible = "gpio-keys"; 30 button-setup { 31 debounce-interval = <100>; 32 wakeup-source; [all …]
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| D | gemini-nas4220b.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree file for the Gemini-based Raidsonic NAS IB-4220-B 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 12 model = "Raidsonic NAS IB-4220-B"; 13 compatible = "raidsonic,ib-4220-b", "cortina,gemini"; 14 #address-cells = <1>; 15 #size-cells = <1>; 24 stdout-path = &uart0; 28 compatible = "gpio-keys"; [all …]
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| D | gemini-dlink-dns-313.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree file for D-Link DNS-313 1-Bay Network Storage Enclosure 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/thermal/thermal.h> 13 model = "D-Link DNS-313 1-Bay Network Storage Enclosure"; 14 compatible = "dlink,dns-313", "cortina,gemini"; 15 #address-cells = <1>; 16 #size-cells = <1>; 19 /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */ [all …]
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| D | socfpga_cyclone5_vining_fpga.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR X11) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga"; 16 stdout-path = "serial0:115200n8"; 34 gpio-keys { 35 compatible = "gpio-keys"; 68 regulator-usb-nrst { 69 compatible = "regulator-fixed"; 70 regulator-name = "usb_nrst"; [all …]
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| D | socfpga_arria10_socdk.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 9 compatible = "altr,socfpga-arria10", "altr,socfpga"; 18 stdout-path = "serial0:115200n8"; 28 compatible = "gpio-leds"; 31 label = "a10sr-led0"; 36 label = "a10sr-led1"; 41 label = "a10sr-led2"; 46 label = "a10sr-led3"; 51 ref_033v: 033-v-ref { 52 compatible = "regulator-fixed"; [all …]
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| D | socfpga_cyclone5_sodia.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 12 compatible = "macnica,sodia", "altr,socfpga-cyclone5", "altr,socfpga"; 16 stdout-path = "serial0:115200n8"; 29 regulator_3_3v: 3-3-v-regulator { 30 compatible = "regulator-fixed"; 31 regulator-name = "3.3V"; 32 regulator-min-microvolt = <3300000>; 33 regulator-max-microvolt = <3300000>; [all …]
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| D | socfpga_arria5_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 10 compatible = "altr,socfpga-arria5", "altr,socfpga"; 14 stdout-path = "serial0:115200n8"; 31 compatible = "gpio-leds"; 53 regulator_3_3v: 3-3-v-regulator { 54 compatible = "regulator-fixed"; 55 regulator-name = "3.3V"; 56 regulator-min-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>; 63 phy-mode = "rgmii"; [all …]
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| D | imx6qdl-emcon.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 or MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/pwm/pwm.h> 8 #include <dt-bindings/input/input.h> 12 model = "emtrion SoM emCON-MX6"; 13 compatible = "emtrion,emcon-mx6"; 23 stdout-path = &uart1; 31 gpio-keys { 32 compatible = "gpio-keys"; 33 pinctrl-names = "default"; [all …]
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| D | socfpga_cyclone5_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 10 compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga"; 14 stdout-path = "serial0:115200n8"; 31 compatible = "gpio-leds"; 53 regulator_3_3v: 3-3-v-regulator { 54 compatible = "regulator-fixed"; 55 regulator-name = "3.3V"; 56 regulator-min-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>; 67 phy-mode = "rgmii"; [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/ |
| D | micrel-ksz90x1.txt | 4 to clock delays. You can specify clock delay values in the PHY OF 8 Note that these settings are applied after any phy-specific fixup from 14 All skew control options are specified in picoseconds. The minimum 20 - rxc-skew-ps : Skew control of RXC pad 21 - rxdv-skew-ps : Skew control of RX CTL pad 22 - txc-skew-ps : Skew control of TXC pad 23 - txen-skew-ps : Skew control of TX CTL pad 24 - rxd0-skew-ps : Skew control of RX data 0 pad 25 - rxd1-skew-ps : Skew control of RX data 1 pad 26 - rxd2-skew-ps : Skew control of RX data 2 pad [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/intel/ |
| D | socfpga_agilex_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 18 stdout-path = "serial0:115200n8"; 22 compatible = "gpio-leds"; 48 clock-frequency = <25000000>; 60 phy-mode = "rgmii"; 61 phy-handle = <&phy0>; 63 max-frame-size = <9000>; 66 #address-cells = <1>; 67 #size-cells = <0>; 68 compatible = "snps,dwmac-mdio"; [all …]
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| /kernel/linux/linux-5.10/drivers/net/phy/ |
| D | micrel.c | 1 // SPDX-License-Identifier: GPL-2.0+ 9 * Copyright (c) 2010-2013 Micrel, Inc. 29 #include <linux/delay.h> 160 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr() 164 if (type && type->interrupt_level_mask) in kszphy_config_intr() 165 mask = type->interrupt_level_mask; in kszphy_config_intr() 177 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in kszphy_config_intr() 213 return -EINVAL; in kszphy_setup_led() 233 * unique (non-broadcast) address on a shared bus. 274 struct kszphy_priv *priv = phydev->priv; in kszphy_config_reset() [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/altera/ |
| D | socfpga_stratix10_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 19 stdout-path = "serial0:115200n8"; 23 compatible = "gpio-leds"; 46 ref_033v: 033-v-ref { 47 compatible = "regulator-fixed"; 48 regulator-name = "0.33V"; 49 regulator-min-microvolt = <330000>; 50 regulator-max-microvolt = <330000>; 56 clock-frequency = <25000000>; 61 sdmmca-ecc@ff8c8c00 { [all …]
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| D | socfpga_stratix10_socdk_nand.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 19 stdout-path = "serial0:115200n8"; 23 compatible = "gpio-leds"; 46 ref_033v: 033-v-ref { 47 compatible = "regulator-fixed"; 48 regulator-name = "0.33V"; 49 regulator-min-microvolt = <330000>; 50 regulator-max-microvolt = <330000>; 56 clock-frequency = <25000000>; 61 sdmmca-ecc@ff8c8c00 { [all …]
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/altera/ |
| D | socfpga_stratix10_socdk.dts | 27 stdout-path = "serial0:115200n8"; 31 compatible = "gpio-leds"; 54 ref_033v: 033-v-ref { 55 compatible = "regulator-fixed"; 56 regulator-name = "0.33V"; 57 regulator-min-microvolt = <330000>; 58 regulator-max-microvolt = <330000>; 64 clock-frequency = <25000000>; 76 phy-mode = "rgmii"; 77 phy-handle = <&phy0>; [all …]
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