| /kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | sdm630.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
20 xo_board: xo-board {
21 compatible = "fixed-clock";
[all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/ |
| D | io-mapping.rst | 8 The io_mapping functions in linux/io-mapping.h provide an abstraction for
10 usage is to support the large graphics aperture on 32-bit processors where
11 ioremap_wc cannot be used to statically map the entire aperture to the CPU
39 This _wc variant returns a write-combining map to the
43 Note that the task may not sleep while holding this page
52 page and allows the task to sleep once again.
54 If you need to sleep while holding the lock, you can use the non-atomic
63 the task to sleep while holding the page mapped.
84 On 64-bit processors, io_mapping_create_wc calls ioremap_wc for the whole
85 range, creating a permanent kernel-visible mapping to the resource. The
[all …]
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| /kernel/linux/linux-4.19/Documentation/ |
| D | io-mapping.txt | 8 The io_mapping functions in linux/io-mapping.h provide an abstraction for
10 usage is to support the large graphics aperture on 32-bit processors where
11 ioremap_wc cannot be used to statically map the entire aperture to the CPU
39 This _wc variant returns a write-combining map to the
43 Note that the task may not sleep while holding this page
52 page and allows the task to sleep once again.
54 If you need to sleep while holding the lock, you can use the non-atomic
63 the task to sleep while holding the page mapped.
84 On 64-bit processors, io_mapping_create_wc calls ioremap_wc for the whole
85 range, creating a permanent kernel-visible mapping to the resource. The
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | stm32mp15xx-dkx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
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| D | stm32mp15xx-dhcom-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
6 #include "stm32mp15-pinctrl.dtsi"
7 #include "stm32mp15xxaa-pinctrl.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/mfd/st,stpmic1.h>
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 compatible = "shared-dma-pool";
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | mpc8610_hpcd.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <32768>; // L1
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| D | mpc8377_wlan.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2009 Freescale Semiconductor Inc.
9 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
[all …]
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| D | mpc8377_rdb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
[all …]
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| D | mpc8377_mds.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
[all …]
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| D | mpc8378_rdb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
[all …]
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| D | mpc8378_mds.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
[all …]
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| /kernel/linux/linux-4.19/drivers/mtd/lpddr/ |
| D | lpddr_cmds.c | 21 * 02110-1301, USA.
44 static int get_chip(struct map_info *map, struct flchip *chip, int mode);
45 static int chip_ready(struct map_info *map, struct flchip *chip, int mode);
46 static void put_chip(struct map_info *map, struct flchip *chip);
48 struct mtd_info *lpddr_cmdset(struct map_info *map) in lpddr_cmdset() argument
50 struct lpddr_private *lpddr = map->fldrv_priv; in lpddr_cmdset()
60 mtd->priv = map; in lpddr_cmdset()
61 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
64 mtd->_read = lpddr_read; in lpddr_cmdset()
65 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
[all …]
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| /kernel/linux/linux-4.19/arch/powerpc/boot/dts/ |
| D | mpc8610_hpcd.dts | 4 * Copyright 2007-2008 Freescale Semiconductor Inc.
11 /dts-v1/;
16 #address-cells = <1>;
17 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>; // L1
37 i-cache-size = <32768>; // L1
[all …]
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| D | mpc8377_wlan.dts | 4 * Copyright 2007-2009 Freescale Semiconductor Inc.
13 /dts-v1/;
17 #address-cells = <1>;
18 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
40 i-cache-size = <32768>;
[all …]
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| D | mpc8377_rdb.dts | 12 /dts-v1/;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>;
[all …]
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| D | mpc8377_mds.dts | 12 /dts-v1/;
17 #address-cells = <1>;
18 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
40 i-cache-size = <32768>;
41 timebase-frequency = <0>;
[all …]
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| D | mpc8378_rdb.dts | 12 /dts-v1/;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>;
[all …]
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| D | mpc8378_mds.dts | 12 /dts-v1/;
17 #address-cells = <1>;
18 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
40 i-cache-size = <32768>;
41 timebase-frequency = <0>;
[all …]
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| /kernel/linux/linux-5.10/drivers/mtd/lpddr/ |
| D | lpddr_cmds.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
31 static int get_chip(struct map_info *map, struct flchip *chip, int mode);
32 static int chip_ready(struct map_info *map, struct flchip *chip, int mode);
33 static void put_chip(struct map_info *map, struct flchip *chip);
35 struct mtd_info *lpddr_cmdset(struct map_info *map) in lpddr_cmdset() argument
37 struct lpddr_private *lpddr = map->fldrv_priv; in lpddr_cmdset()
47 mtd->priv = map; in lpddr_cmdset()
48 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
51 mtd->_read = lpddr_read; in lpddr_cmdset()
52 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/ |
| D | sleep.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/powerpc/sleep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerPC sleep property
10 - Rob Herring <robh@kernel.org>
13 Devices on SOCs often have mechanisms for placing devices into low-power
15 this information is more complicated than a cell-index property can
17 may contain a "sleep" property which describes these connections.
19 The sleep property consists of one or more sleep resources, each of
[all …]
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| /kernel/linux/linux-5.10/drivers/iio/imu/inv_icm42600/ |
| D | inv_icm42600_buffer.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
71 *accel = &pack2->accel; in inv_icm42600_fifo_decode_packet()
72 *gyro = &pack2->gyro; in inv_icm42600_fifo_decode_packet()
73 *temp = &pack2->temp; in inv_icm42600_fifo_decode_packet()
74 *timestamp = &pack2->timestamp; in inv_icm42600_fifo_decode_packet()
80 *accel = &pack1->data; in inv_icm42600_fifo_decode_packet()
82 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
90 *gyro = &pack1->data; in inv_icm42600_fifo_decode_packet()
91 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
97 return -EINVAL; in inv_icm42600_fifo_decode_packet()
[all …]
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| /kernel/linux/linux-5.10/drivers/iio/imu/inv_mpu6050/ |
| D | inv_mpu_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
245 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, in inv_mpu6050_pwr_mgmt_1_write() argument
251 clock = st->chip_config.clk; in inv_mpu6050_pwr_mgmt_1_write()
253 temp_dis = !st->chip_config.temp_en; in inv_mpu6050_pwr_mgmt_1_write()
258 if (sleep) in inv_mpu6050_pwr_mgmt_1_write()
261 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); in inv_mpu6050_pwr_mgmt_1_write()
262 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); in inv_mpu6050_pwr_mgmt_1_write()
270 switch (st->chip_type) { in inv_mpu6050_clock_switch()
275 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1); in inv_mpu6050_clock_switch()
278 st->chip_config.clk = clock; in inv_mpu6050_clock_switch()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
| D | sleep-s3c2410.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
6 * S3C2410 Power Manager (Suspend-To-RAM) support
8 * Based on PXA/SA1100 sleep code by:
16 #include "map.h"
18 #include "regs-gpio.h"
19 #include "regs-clock.h"
21 #include "regs-mem-s3c24xx.h"
25 * put the cpu into sleep mode
29 @@ prepare cpu to sleep
38 orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
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| /kernel/linux/linux-4.19/arch/arm/mach-s3c24xx/ |
| D | sleep-s3c2410.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
6 * S3C2410 Power Manager (Suspend-To-RAM) support
8 * Based on PXA/SA1100 sleep code by:
17 #include <mach/map.h>
19 #include <mach/regs-gpio.h>
20 #include <mach/regs-clock.h>
22 #include "regs-mem.h"
26 * put the cpu into sleep mode
30 @@ prepare cpu to sleep
39 orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
[all …]
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| /kernel/linux/linux-4.19/arch/powerpc/boot/dts/fsl/ |
| D | mpc8568si-post.dtsi | 36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus";
40 sleep = <&pmc 0x08000000>;
45 compatible = "fsl,mpc8540-pci";
48 bus-range = <0 0xff>;
49 #interrupt-cells = <1>;
50 #size-cells = <2>;
51 #address-cells = <3>;
52 sleep = <&pmc 0x80000000>;
[all …]
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