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12

/kernel/linux/linux-4.19/Documentation/devicetree/bindings/remoteproc/
Dqcom,adsp.txt6 - compatible:
10 "qcom,msm8974-adsp-pil"
11 "qcom,msm8996-adsp-pil"
12 "qcom,msm8996-slpi-pil"
14 - interrupts-extended:
16 Value type: <prop-encoded-array>
18 stop-ack IRQs
20 - interrupt-names:
23 Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack"
25 - clocks:
[all …]
Dqcom,q6v5.txt6 - compatible:
10 "qcom,q6v5-pil",
11 "qcom,ipq8074-wcss-pil"
12 "qcom,msm8916-mss-pil",
13 "qcom,msm8974-mss-pil"
14 "qcom,msm8996-mss-pil"
15 "qcom,sdm845-mss-pil"
17 - reg:
19 Value type: <prop-encoded-array>
23 - reg-names:
[all …]
Dqcom,wcnss-pil.txt6 - compatible:
10 "qcom,riva-pil",
11 "qcom,pronto-v1-pil",
12 "qcom,pronto-v2-pil"
14 - reg:
16 Value type: <prop-encoded-array>
20 - reg-names:
25 - interrupts-extended:
27 Value type: <prop-encoded-array>
29 ready, handover and stop-ack IRQs
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/
Dqcom,adsp.txt6 - compatible:
10 "qcom,msm8974-adsp-pil"
11 "qcom,msm8996-adsp-pil"
12 "qcom,msm8996-slpi-pil"
13 "qcom,msm8998-adsp-pas"
14 "qcom,msm8998-slpi-pas"
15 "qcom,qcs404-adsp-pas"
16 "qcom,qcs404-cdsp-pas"
17 "qcom,qcs404-wcss-pas"
18 "qcom,sc7180-mpss-pas"
[all …]
Dqcom,hexagon-v56.txt6 - compatible:
10 "qcom,qcs404-cdsp-pil",
11 "qcom,sdm845-adsp-pil"
13 - reg:
15 Value type: <prop-encoded-array>
18 - interrupts-extended:
20 Value type: <prop-encoded-array>
22 stop-ack IRQs
24 - interrupt-names:
27 Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack"
[all …]
Dqcom,wcnss-pil.txt6 - compatible:
10 "qcom,riva-pil",
11 "qcom,pronto-v1-pil",
12 "qcom,pronto-v2-pil"
14 - reg:
16 Value type: <prop-encoded-array>
20 - reg-names:
25 - interrupts-extended:
27 Value type: <prop-encoded-array>
29 ready, handover and stop-ack IRQs
[all …]
Dqcom,q6v5.txt6 - compatible:
10 "qcom,q6v5-pil",
11 "qcom,ipq8074-wcss-pil"
12 "qcom,msm8916-mss-pil",
13 "qcom,msm8974-mss-pil"
14 "qcom,msm8996-mss-pil"
15 "qcom,msm8998-mss-pil"
16 "qcom,sc7180-mss-pil"
17 "qcom,sdm845-mss-pil"
19 - reg:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dqcom,ipa.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alex Elder <elder@kernel.org>
21 and has a distinct interrupt and a separately-defined address space.
28 - |
29 -------- ---------
31 | AP +<---. .----+ Modem |
32 | +--. | | .->+ |
34 -------- | | | | ---------
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/soc/qcom/
Dqcom,wcnss.txt6 - compatible:
11 - qcom,smd-channel:
18 - qcom,mmio:
20 Value type: <prop-encoded-array>
34 - compatible:
38 "qcom,wcnss-bt"
40 - local-bd-address:
48 - compatible:
52 "qcom,wcnss-wlan",
54 - interrupts:
[all …]
Dqcom,smp2p.txt4 a single 32-bit value between two processors. Each value has a single writer
9 - compatible:
15 - interrupts:
17 Value type: <prop-encoded-array>
20 - mboxes:
22 Value type: <prop-encoded-array>
26 - qcom,ipc:
28 Value type: <prop-encoded-array>
31 - phandle to a syscon node representing the apcs registers
32 - u32 representing offset to the register within the syscon
[all …]
Dqcom,smsm.txt1 Qualcomm Shared Memory State Machine
3 The Shared Memory State Machine facilitates broadcasting of single bit state
5 assigned 32 bits of state that can be modified. A processor can through a
9 - compatible:
15 - qcom,ipc-N:
17 Value type: <prop-encoded-array>
20 - phandle to a syscon node representing the apcs registers
21 - u32 representing offset to the register within the syscon
22 - u32 representing the ipc bit within the register
24 - qcom,local-host:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/qcom/
Dqcom,wcnss.txt6 - compatible:
11 - qcom,smd-channel:
18 - qcom,mmio:
20 Value type: <prop-encoded-array>
34 - compatible:
38 "qcom,wcnss-bt"
40 - local-bd-address:
48 - compatible:
52 "qcom,wcnss-wlan",
54 - interrupts:
[all …]
Dqcom,smp2p.txt4 a single 32-bit value between two processors. Each value has a single writer
9 - compatible:
15 - interrupts:
17 Value type: <prop-encoded-array>
20 - mboxes:
22 Value type: <prop-encoded-array>
26 - qcom,ipc:
28 Value type: <prop-encoded-array>
31 - phandle to a syscon node representing the apcs registers
32 - u32 representing offset to the register within the syscon
[all …]
Dqcom,smsm.txt1 Qualcomm Shared Memory State Machine
3 The Shared Memory State Machine facilitates broadcasting of single bit state
5 assigned 32 bits of state that can be modified. A processor can through a
9 - compatible:
15 - qcom,ipc-N:
17 Value type: <prop-encoded-array>
20 - phandle to a syscon node representing the apcs registers
21 - u32 representing offset to the register within the syscon
22 - u32 representing the ipc bit within the register
24 - qcom,local-host:
[all …]
/kernel/linux/linux-5.10/drivers/soc/qcom/
Dsmem_state.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
17 * struct qcom_smem_state - state context
18 * @refcount: refcount for the state
19 * @orphan: boolean indicator that this state has been unregistered
21 * @of_node: of_node to use for matching the state in DT
23 * @ops: ops for the state
38 * qcom_smem_state_update_bits() - update the masked bits in state with value
39 * @state: state handle acquired by calling qcom_smem_state_get()
45 int qcom_smem_state_update_bits(struct qcom_smem_state *state, in qcom_smem_state_update_bits() argument
[all …]
/kernel/linux/linux-4.19/drivers/soc/qcom/
Dsmem_state.c3 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
25 * struct qcom_smem_state - state context
26 * @refcount: refcount for the state
27 * @orphan: boolean indicator that this state has been unregistered
29 * @of_node: of_node to use for matching the state in DT
31 * @ops: ops for the state
46 * qcom_smem_state_update_bits() - update the masked bits in state with value
47 * @state: state handle acquired by calling qcom_smem_state_get()
53 int qcom_smem_state_update_bits(struct qcom_smem_state *state, in qcom_smem_state_update_bits() argument
57 if (state->orphan) in qcom_smem_state_update_bits()
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
8 #include <dt-bindings/gpio/gpio.h>
14 interrupt-parent = <&intc>;
16 reserved-memory {
17 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/gpio/gpio.h>
12 interrupt-parent = <&intc>;
14 qcom,msm-id = <292 0x0>;
16 #address-cells = <2>;
[all …]
Dsm8150.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/power/qcom-aoss-qmp.h>
9 #include <dt-bindings/power/qcom-rpmpd.h>
10 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
13 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
Dqcs404.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
6 #include <dt-bindings/clock/qcom,turingcc-qcs404.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/thermal/thermal.h>
12 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
[all …]
Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&intc>;
19 sleep_clk: sleep-clk {
20 compatible = "fixed-clock";
[all …]
Dmsm8916.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&intc>;
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/qcom/
Dmsm8996.dtsi1 /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
15 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
16 #include <dt-bindings/clock/qcom,rpmcc.h>
21 interrupt-parent = <&intc>;
23 #address-cells = <2>;
24 #size-cells = <2>;
34 reserved-memory {
35 #address-cells = <2>;
[all …]
Dmsm8916.dtsi2 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
16 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
17 #include <dt-bindings/clock/qcom,rpmcc.h>
18 #include <dt-bindings/thermal/thermal.h>
24 interrupt-parent = <&intc>;
26 #address-cells = <2>;
27 #size-cells = <2>;
42 reserved-memory {
[all …]

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