| /kernel/linux/linux-5.10/arch/arm/mach-hisi/ |
| D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on arch/arm/mach-vexpress/platsmp.c, Copyright (C) 2002 ARM Ltd.
7 #include <linux/smp.h>
28 writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2)); in hi3xxx_set_cpu_jump()
36 return readl_relaxed(ctrl_base + ((cpu - 1) << 2)); in hi3xxx_get_cpu_jump()
59 u32 offset = 0; in hi3xxx_smp_prepare_cpus() local
73 if (of_property_read_u32(np, "smp-offset", &offset) < 0) { in hi3xxx_smp_prepare_cpus()
74 pr_err("failed to find smp-offset property\n"); in hi3xxx_smp_prepare_cpus()
77 ctrl_base += offset; in hi3xxx_smp_prepare_cpus()
109 writel_relaxed(0xe51ff004, virt); /* ldr pc, [pc, #-4] */ in hix5hd2_set_scu_boot_addr()
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| /kernel/linux/linux-4.19/arch/arm/mach-hisi/ |
| D | platsmp.c | 4 * Based on arch/arm/mach-vexpress/platsmp.c, Copyright (C) 2002 ARM Ltd.
10 #include <linux/smp.h>
31 writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2)); in hi3xxx_set_cpu_jump()
39 return readl_relaxed(ctrl_base + ((cpu - 1) << 2)); in hi3xxx_get_cpu_jump()
62 u32 offset = 0; in hi3xxx_smp_prepare_cpus() local
76 if (of_property_read_u32(np, "smp-offset", &offset) < 0) { in hi3xxx_smp_prepare_cpus()
77 pr_err("failed to find smp-offset property\n"); in hi3xxx_smp_prepare_cpus()
80 ctrl_base += offset; in hi3xxx_smp_prepare_cpus()
112 writel_relaxed(0xe51ff004, virt); /* ldr pc, [pc, #-4] */ in hix5hd2_set_scu_boot_addr()
162 node = of_find_compatible_node(NULL, NULL, "hisilicon,hip01-sysctrl"); in hip01_boot_secondary()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/cpu-enable-method/ |
| D | al,alpine-smp | 2 Secondary CPU enable-method "al,alpine-smp" binding
5 This document describes the "al,alpine-smp" method for
7 "al,alpine-smp" enable method should be defined in the
10 Enable method name: "al,alpine-smp"
12 Compatible CPUs: "arm,cortex-a15"
17 "al,alpine-cpu-resume" and "al,alpine-nb-service".
26 - compatible : Should contain "al,alpine-cpu-resume".
27 - reg : Offset and length of the register set for the device
30 * Alpine System-Fabric Service Registers
32 The System-Fabric Service Registers allow various operation on CPU and
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| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | smp-tbsync.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Smp timebase synchronization for ppc.
11 #include <linux/smp.h>
15 #include <asm/smp.h>
42 tbsync->race_result = add; in enter_contest()
57 tbsync->ack = 1; in smp_generic_take_timebase()
58 while (!tbsync->handshake) in smp_generic_take_timebase()
62 cmd = tbsync->cmd; in smp_generic_take_timebase()
63 tb = tbsync->tb; in smp_generic_take_timebase()
65 tbsync->ack = 0; in smp_generic_take_timebase()
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| /kernel/linux/linux-4.19/arch/powerpc/kernel/ |
| D | smp-tbsync.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Smp timebase synchronization for ppc.
11 #include <linux/smp.h>
15 #include <asm/smp.h>
42 tbsync->race_result = add; in enter_contest()
57 tbsync->ack = 1; in smp_generic_take_timebase()
58 while (!tbsync->handshake) in smp_generic_take_timebase()
62 cmd = tbsync->cmd; in smp_generic_take_timebase()
63 tb = tbsync->tb; in smp_generic_take_timebase()
65 tbsync->ack = 0; in smp_generic_take_timebase()
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/ |
| D | al,alpine.txt | 2 ---------------------------------------------------------------
20 The Alpine platform includes cortex-a15 cores.
21 enable-method: must be "al,alpine-smp" to allow smp [1]
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "al,alpine-smp";
31 compatible = "arm,cortex-a15";
37 compatible = "arm,cortex-a15";
43 compatible = "arm,cortex-a15";
49 compatible = "arm,cortex-a15";
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| /kernel/linux/linux-4.19/drivers/scsi/isci/ |
| D | scu_task_context.h | 7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
68 * enum scu_ssp_task_type - This enumberation defines the various SSP task
77 SCU_TASK_TYPE_SMP_REQUEST, /* /< SMP Request type */
84 * enum scu_sata_task_type - This enumeration defines the various SATA task
222 * MAKE_SCU_CONTEXT_COMMAND_TYPE() -
293 * struct ssp_task_context - This is the SCU hardware definition for an SSP
299 /* OFFSET 0x18 */
303 /* OFFSET 0x1C */
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| /kernel/linux/linux-5.10/drivers/scsi/isci/ |
| D | scu_task_context.h | 7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
68 * enum scu_ssp_task_type - This enumberation defines the various SSP task
77 SCU_TASK_TYPE_SMP_REQUEST, /* /< SMP Request type */
84 * enum scu_sata_task_type - This enumeration defines the various SATA task
222 * MAKE_SCU_CONTEXT_COMMAND_TYPE() -
293 * struct ssp_task_context - This is the SCU hardware definition for an SSP
299 /* OFFSET 0x18 */
303 /* OFFSET 0x1C */
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| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | processor.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1995-1999 Russell King
20 #define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
41 * Everything usercopied to/from thread_struct is statically-sized, so
44 static inline void arch_thread_struct_whitelist(unsigned long *offset, in arch_thread_struct_whitelist() argument
47 *offset = *size = 0; in arch_thread_struct_whitelist()
57 r7 = regs->ARM_r7; \
58 r8 = regs->ARM_r8; \
59 r9 = regs->ARM_r9; \
61 memset(regs->uregs, 0, sizeof(regs->uregs)); \
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| D | sysctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wei Xu <xuwei5@hisilicon.com>
19 offset. In addition, the HiP01 system controller has some specific control
23 Hisilicon system controller --> hisilicon,sysctrl
24 HiP01 system controller --> hisilicon,hip01-sysctrl
25 Hi6220 system controller --> hisilicon,hi6220-sysctrl
26 Hi3519 system controller --> hisilicon,hi3519-sysctrl
29 - if:
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| /kernel/linux/linux-5.10/sound/synth/emux/ |
| D | soundfont.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (c) 1999-2000 Takashi Iwai <tiwai@suse.de>
69 mutex_lock(&sflist->presets_mutex); in lock_preset()
70 spin_lock_irqsave(&sflist->lock, flags); in lock_preset()
71 sflist->presets_locked = 1; in lock_preset()
72 spin_unlock_irqrestore(&sflist->lock, flags); in lock_preset()
83 spin_lock_irqsave(&sflist->lock, flags); in unlock_preset()
84 sflist->presets_locked = 0; in unlock_preset()
85 spin_unlock_irqrestore(&sflist->lock, flags); in unlock_preset()
86 mutex_unlock(&sflist->presets_mutex); in unlock_preset()
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| /kernel/linux/linux-4.19/sound/synth/emux/ |
| D | soundfont.c | 7 * Copyright (c) 1999-2000 Takashi Iwai <tiwai@suse.de>
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
82 mutex_lock(&sflist->presets_mutex); in lock_preset()
83 spin_lock_irqsave(&sflist->lock, flags); in lock_preset()
84 sflist->presets_locked = 1; in lock_preset()
85 spin_unlock_irqrestore(&sflist->lock, flags); in lock_preset()
96 spin_lock_irqsave(&sflist->lock, flags); in unlock_preset()
97 sflist->presets_locked = 0; in unlock_preset()
98 spin_unlock_irqrestore(&sflist->lock, flags); in unlock_preset()
99 mutex_unlock(&sflist->presets_mutex); in unlock_preset()
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| /kernel/linux/linux-4.19/arch/arm/include/asm/ |
| D | processor.h | 4 * Copyright (C) 1995-1999 Russell King
28 #define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
49 * Everything usercopied to/from thread_struct is statically-sized, so
52 static inline void arch_thread_struct_whitelist(unsigned long *offset, in arch_thread_struct_whitelist() argument
55 *offset = *size = 0; in arch_thread_struct_whitelist()
65 r7 = regs->ARM_r7; \
66 r8 = regs->ARM_r8; \
67 r9 = regs->ARM_r9; \
69 memset(regs->uregs, 0, sizeof(regs->uregs)); \
71 current->personality & FDPIC_FUNCPTRS) { \
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| /kernel/linux/linux-4.19/arch/x86/kernel/ |
| D | alternative.c | 1 #define pr_fmt(fmt) "SMP alternatives: " fmt
14 #include <asm/text-patching.h>
29 #define MAX_PATCH_LEN (255-1)
38 __setup("debug-alternative", debug_alt);
47 __setup("noreplace-smp", setup_noreplace_smp);
64 for (j = 0; j < (len) - 1; j++) \
73 * add to the array the offset that is equal to the sum of all sizes of
205 * the "k8_nops" than with the SDM-recommended NOPs. in arch_init_ideal_nops()
256 len -= noplen; in add_nops()
265 * Are we looking at a near JMP with a 1 or 4-byte displacement.
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| /kernel/linux/linux-4.19/arch/arm/mach-prima2/ |
| D | platsmp.c | 2 * plat smp support for CSR Marco dual-core SMP SoCs
10 #include <linux/smp.h>
33 pen_release = -1; in sirfsoc_secondary_init()
44 { .compatible = "sirf,atlas7-clkc" },
55 return -ENODEV; in sirfsoc_boot_secondary()
59 return -ENOMEM; in sirfsoc_boot_secondary()
63 * at offset 0x2bC, then write the magic number 0x3CAF5D62 to the in sirfsoc_boot_secondary()
64 * clkc register at offset 0x2b8, which is what boot rom code is in sirfsoc_boot_secondary()
82 * the holding pen - release it, then wait for it to flag in sirfsoc_boot_secondary()
100 if (pen_release == -1) in sirfsoc_boot_secondary()
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| /kernel/linux/linux-5.10/arch/arm/mach-prima2/ |
| D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * plat smp support for CSR Marco dual-core SMP SoCs
9 #include <linux/smp.h>
26 /* XXX prima2_pen_release is cargo culted code - DO NOT COPY XXX */
27 volatile int prima2_pen_release = -1;
35 prima2_pen_release = -1; in sirfsoc_secondary_init()
46 { .compatible = "sirf,atlas7-clkc" },
57 return -ENODEV; in sirfsoc_boot_secondary()
61 return -ENOMEM; in sirfsoc_boot_secondary()
65 * at offset 0x2bC, then write the magic number 0x3CAF5D62 to the in sirfsoc_boot_secondary()
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| /kernel/linux/linux-4.19/arch/x86/include/asm/ |
| D | alternative.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
13 * Alternative inline assembly for SMP.
18 * SMP alternatives use the same data structures as the other
20 * UP system running a SMP kernel. The existing apply_alternatives()
21 * works fine for patching a SMP kernel for UP.
23 * The SMP alternative tables can be kept after boot and contain both
24 * UP and SMP versions of the instructions to allow switching back to
25 * SMP at runtime, when hotplugging in a new CPU, which is especially
37 ".long 671f - .\n" /* offset */ \
50 s32 repl_offset; /* offset to replacement instruction */
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-xtensa.c | 1 // SPDX-License-Identifier: GPL-2.0
22 * This driver is currently incompatible with SMP. The GPIO32 extension is not
24 * different set of IO wires. A theoretical SMP aware version of this driver
72 static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset) in xtensa_impwire_get_direction() argument
77 static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset) in xtensa_impwire_get_value() argument
86 return !!(impwire & BIT(offset)); in xtensa_impwire_get_value()
89 static void xtensa_impwire_set_value(struct gpio_chip *gc, unsigned offset, in xtensa_impwire_set_value() argument
95 static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset) in xtensa_expstate_get_direction() argument
100 static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset) in xtensa_expstate_get_value() argument
109 return !!(expstate & BIT(offset)); in xtensa_expstate_get_value()
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| /kernel/linux/linux-5.10/fs/jfs/ |
| D | jfs_dtree.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) International Business Machines Corp., 2000-2004
7 * jfs_dtree.c: directory B+-tree manager
9 * B+-tree with variable length key directory:
11 * each directory page is structured as an array of 32-byte
28 * directory starts as a root/leaf page in on-disk inode
41 * case-insensitive directory file system
43 * names are stored in case-sensitive way in leaf entry.
44 * but stored, searched and compared in case-insensitive (uppercase) order
46 * (note that case-sensitive order is BROKEN in storage, e.g.,
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| /kernel/linux/linux-4.19/fs/jfs/ |
| D | jfs_dtree.c | 2 * Copyright (C) International Business Machines Corp., 2000-2004
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 * jfs_dtree.c: directory B+-tree manager
22 * B+-tree with variable length key directory:
24 * each directory page is structured as an array of 32-byte
41 * directory starts as a root/leaf page in on-disk inode
54 * case-insensitive directory file system
56 * names are stored in case-sensitive way in leaf entry.
57 * but stored, searched and compared in case-insensitive (uppercase) order
59 * (note that case-sensitive order is BROKEN in storage, e.g.,
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| /kernel/linux/linux-4.19/drivers/gpio/ |
| D | gpio-xtensa.c | 25 * This driver is currently incompatible with SMP. The GPIO32 extension is not
27 * different set of IO wires. A theoretical SMP aware version of this driver
76 static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset) in xtensa_impwire_get_direction() argument
81 static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset) in xtensa_impwire_get_value() argument
90 return !!(impwire & BIT(offset)); in xtensa_impwire_get_value()
93 static void xtensa_impwire_set_value(struct gpio_chip *gc, unsigned offset, in xtensa_impwire_set_value() argument
99 static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset) in xtensa_expstate_get_direction() argument
104 static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset) in xtensa_expstate_get_value() argument
113 return !!(expstate & BIT(offset)); in xtensa_expstate_get_value()
116 static void xtensa_expstate_set_value(struct gpio_chip *gc, unsigned offset, in xtensa_expstate_set_value() argument
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| /kernel/linux/linux-5.10/kernel/irq/ |
| D | ipi.c | 1 // SPDX-License-Identifier: GPL-2.0
15 * irq_reserve_ipi() - Setup an IPI to destination cpumask
26 unsigned int nr_irqs, offset; in irq_reserve_ipi() local
32 return -EINVAL; in irq_reserve_ipi()
37 return -EINVAL; in irq_reserve_ipi()
43 return -EINVAL; in irq_reserve_ipi()
54 offset = 0; in irq_reserve_ipi()
64 offset = cpumask_first(dest); in irq_reserve_ipi()
69 next = cpumask_next_zero(offset, dest); in irq_reserve_ipi()
74 return -EINVAL; in irq_reserve_ipi()
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| /kernel/linux/linux-4.19/kernel/irq/ |
| D | ipi.c | 1 // SPDX-License-Identifier: GPL-2.0
15 * irq_reserve_ipi() - Setup an IPI to destination cpumask
26 unsigned int nr_irqs, offset; in irq_reserve_ipi() local
32 return -EINVAL; in irq_reserve_ipi()
37 return -EINVAL; in irq_reserve_ipi()
43 return -EINVAL; in irq_reserve_ipi()
54 offset = 0; in irq_reserve_ipi()
64 offset = cpumask_first(dest); in irq_reserve_ipi()
69 next = cpumask_next_zero(offset, dest); in irq_reserve_ipi()
74 return -EINVAL; in irq_reserve_ipi()
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/hisilicon/ |
| D | hisilicon.txt | 2 ----------------------------------------------------
5 - compatible = "hisilicon,hi3660";
9 - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
13 - compatible = "hisilicon,hi3798cv200";
17 - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
21 - compatible = "hisilicon,hi3620-hi4511";
25 - compatible = "hisilicon,hi6220";
29 - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
33 - compatible = "hisilicon,hip01-ca9x2";
37 - compatible = "hisilicon,hip04-d01";
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| /kernel/linux/linux-5.10/arch/arm/mach-ux500/ |
| D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009 ST-Ericsson.
14 #include <linux/smp.h>
23 #include "db8500-regs.h"
38 np = of_find_compatible_node(NULL, NULL, "ste,dbx500-backupram"); in ux500_smp_prepare_cpus()
50 np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); in ux500_smp_prepare_cpus()
73 * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the in ux500_boot_secondary()
74 * backup ram register at offset 0x1FF0, which is what boot rom code in ux500_boot_secondary()
102 CPU_METHOD_OF_DECLARE(ux500_smp, "ste,dbx500-smp", &ux500_smp_ops);
|