Home
last modified time | relevance | path

Searched full:sor (Results 1 – 25 of 165) sorted by relevance

1234567

/kernel/linux/linux-5.10/drivers/gpu/drm/tegra/
Dsor.c31 #include "sor.h"
399 int (*probe)(struct tegra_sor *sor);
400 void (*audio_enable)(struct tegra_sor *sor);
401 void (*audio_disable)(struct tegra_sor *sor);
484 static inline u32 tegra_sor_readl(struct tegra_sor *sor, unsigned int offset) in tegra_sor_readl() argument
486 u32 value = readl(sor->regs + (offset << 2)); in tegra_sor_readl()
488 trace_sor_readl(sor->dev, offset, value); in tegra_sor_readl()
493 static inline void tegra_sor_writel(struct tegra_sor *sor, u32 value, in tegra_sor_writel() argument
496 trace_sor_writel(sor->dev, offset, value); in tegra_sor_writel()
497 writel(value, sor->regs + (offset << 2)); in tegra_sor_writel()
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/tegra/
Dsor.c29 #include "sor.h"
319 int (*probe)(struct tegra_sor *sor);
320 int (*remove)(struct tegra_sor *sor);
397 static inline u32 tegra_sor_readl(struct tegra_sor *sor, unsigned int offset) in tegra_sor_readl() argument
399 u32 value = readl(sor->regs + (offset << 2)); in tegra_sor_readl()
401 trace_sor_readl(sor->dev, offset, value); in tegra_sor_readl()
406 static inline void tegra_sor_writel(struct tegra_sor *sor, u32 value, in tegra_sor_writel() argument
409 trace_sor_writel(sor->dev, offset, value); in tegra_sor_writel()
410 writel(value, sor->regs + (offset << 2)); in tegra_sor_writel()
413 static int tegra_sor_set_parent_clock(struct tegra_sor *sor, struct clk *parent) in tegra_sor_set_parent_clock() argument
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dsorg94.c29 g94_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark) in g94_sor_dp_watermark() argument
31 struct nvkm_device *device = sor->disp->engine.subdev.device; in g94_sor_dp_watermark()
32 const u32 loff = nv50_sor_link(sor); in g94_sor_dp_watermark()
37 g94_sor_dp_activesym(struct nvkm_ior *sor, int head, in g94_sor_dp_activesym() argument
40 struct nvkm_device *device = sor->disp->engine.subdev.device; in g94_sor_dp_activesym()
41 const u32 loff = nv50_sor_link(sor); in g94_sor_dp_activesym()
49 g94_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) in g94_sor_dp_audio_sym() argument
51 struct nvkm_device *device = sor->disp->engine.subdev.device; in g94_sor_dp_audio_sym()
52 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_audio_sym()
58 g94_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) in g94_sor_dp_drive() argument
[all …]
Dsorgf119.c29 gf119_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark) in gf119_sor_dp_watermark() argument
31 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_watermark()
37 gf119_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) in gf119_sor_dp_audio_sym() argument
39 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_audio_sym()
46 gf119_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) in gf119_sor_dp_audio() argument
48 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_audio()
60 gf119_sor_dp_vcpi(struct nvkm_ior *sor, int head, in gf119_sor_dp_vcpi() argument
63 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_vcpi()
71 gf119_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) in gf119_sor_dp_drive() argument
73 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_drive()
[all …]
Dsorgm200.c27 gm200_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) in gm200_sor_dp_drive() argument
29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gm200_sor_dp_drive()
30 const u32 loff = nv50_sor_link(sor); in gm200_sor_dp_drive()
31 const u32 shift = sor->func->dp.lanes[ln] * 8; in gm200_sor_dp_drive()
53 const u32 sor = ior ? ior->id + 1 : 0; in gm200_sor_route_set() local
57 nvkm_mask(device, 0x612308 + moff, 0x0000001f, link << 4 | sor); in gm200_sor_route_set()
62 nvkm_mask(device, 0x612388 + moff, 0x0000001f, link << 4 | sor); in gm200_sor_route_set()
70 int lnk[2], sor[2], m, s; in gm200_sor_route_get() local
76 sor[s] = (data & 0x0000000f); in gm200_sor_route_get()
77 if (!sor[s]) in gm200_sor_route_get()
[all …]
Dsornv50.c29 nv50_sor_clock(struct nvkm_ior *sor) in nv50_sor_clock() argument
31 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_clock()
32 const int div = sor->asy.link == 3; in nv50_sor_clock()
33 const u32 soff = nv50_ior_base(sor); in nv50_sor_clock()
47 nv50_sor_power(struct nvkm_ior *sor, bool normal, bool pu, in nv50_sor_power() argument
50 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_power()
51 const u32 soff = nv50_ior_base(sor); in nv50_sor_power()
67 nv50_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state) in nv50_sor_state() argument
69 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_state()
70 const u32 coff = sor->id * 8 + (state == &sor->arm) * 4; in nv50_sor_state()
[all …]
Dsorgv100.c27 gv100_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark) in gv100_sor_dp_watermark() argument
29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_watermark()
35 gv100_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) in gv100_sor_dp_audio_sym() argument
37 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_audio_sym()
44 gv100_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) in gv100_sor_dp_audio() argument
46 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_audio()
58 gv100_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state) in gv100_sor_state() argument
60 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_state()
61 const u32 coff = (state == &sor->arm) * 0x8000 + sor->id * 0x20; in gv100_sor_state()
111 return nvkm_ior_new_(&gv100_sor, disp, SOR, id); in gv100_sor_new()
Dsorgm107.c27 gm107_sor_dp_pattern(struct nvkm_ior *sor, int pattern) in gm107_sor_dp_pattern() argument
29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gm107_sor_dp_pattern()
30 const u32 soff = nv50_ior_base(sor); in gm107_sor_dp_pattern()
32 if (sor->asy.link & 1) in gm107_sor_dp_pattern()
66 return nvkm_ior_new_(&gm107_sor, disp, SOR, id); in gm107_sor_new()
Drootnv50.c142 nvif_ioctl(object, "disp sor hda eld size %d\n", size); in nv50_disp_root_mthd_()
144 nvif_ioctl(object, "disp sor hda eld vers %d\n", in nv50_disp_root_mthd_()
176 nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size); in nv50_disp_root_mthd_()
178 nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d " in nv50_disp_root_mthd_()
213 nvif_ioctl(object, "disp sor lvds script size %d\n", size); in nv50_disp_root_mthd_()
215 nvif_ioctl(object, "disp sor lvds script " in nv50_disp_root_mthd_()
218 disp->sor.lvdsconf = args->v0.script; in nv50_disp_root_mthd_()
230 nvif_ioctl(object, "disp sor dp mst link size %d\n", size); in nv50_disp_root_mthd_()
232 nvif_ioctl(object, "disp sor dp mst link vers %d state %d\n", in nv50_disp_root_mthd_()
245 nvif_ioctl(object, "disp sor dp mst vcpi size %d\n", size); in nv50_disp_root_mthd_()
[all …]
Dsorgt215.c27 gt215_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) in gt215_sor_dp_audio() argument
29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gt215_sor_dp_audio()
30 const u32 soff = nv50_ior_base(sor); in gt215_sor_dp_audio()
68 return nvkm_ior_new_(&gt215_sor, disp, SOR, id); in gt215_sor_new()
Dnv50.c128 disp->sor.nr = func->sor.cnt(&disp->base, &disp->sor.mask); in nv50_disp_oneinit_()
129 nvkm_debug(subdev, " SOR(s): %d (%02lx)\n", in nv50_disp_oneinit_()
130 disp->sor.nr, disp->sor.mask); in nv50_disp_oneinit_()
131 for_each_set_bit(i, &disp->sor.mask, disp->sor.nr) { in nv50_disp_oneinit_()
132 ret = func->sor.new(&disp->base, i); in nv50_disp_oneinit_()
220 if (ior->type == SOR) { in nv50_disp_super_ied_on()
453 if (ior->type == SOR && ior->asy.proto == LVDS) { in nv50_disp_super_2_2()
454 head->asy.or.depth = (disp->sor.lvdsconf & 0x0200) ? 24 : 18; in nv50_disp_super_2_2()
455 ior->asy.link = (disp->sor.lvdsconf & 0x0100) ? 3 : 1; in nv50_disp_super_2_2()
469 if (ior->type == SOR && ior->asy.proto == DP) in nv50_disp_super_2_2()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dsorg94.c29 g94_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark) in g94_sor_dp_watermark() argument
31 struct nvkm_device *device = sor->disp->engine.subdev.device; in g94_sor_dp_watermark()
32 const u32 loff = nv50_sor_link(sor); in g94_sor_dp_watermark()
37 g94_sor_dp_activesym(struct nvkm_ior *sor, int head, in g94_sor_dp_activesym() argument
40 struct nvkm_device *device = sor->disp->engine.subdev.device; in g94_sor_dp_activesym()
41 const u32 loff = nv50_sor_link(sor); in g94_sor_dp_activesym()
49 g94_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) in g94_sor_dp_audio_sym() argument
51 struct nvkm_device *device = sor->disp->engine.subdev.device; in g94_sor_dp_audio_sym()
52 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_audio_sym()
58 g94_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) in g94_sor_dp_drive() argument
[all …]
Dsorgf119.c29 gf119_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark) in gf119_sor_dp_watermark() argument
31 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_watermark()
37 gf119_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) in gf119_sor_dp_audio_sym() argument
39 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_audio_sym()
46 gf119_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) in gf119_sor_dp_audio() argument
48 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_audio()
60 gf119_sor_dp_vcpi(struct nvkm_ior *sor, int head, in gf119_sor_dp_vcpi() argument
63 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_vcpi()
71 gf119_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) in gf119_sor_dp_drive() argument
73 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_drive()
[all …]
Dsorgm200.c27 gm200_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) in gm200_sor_dp_drive() argument
29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gm200_sor_dp_drive()
30 const u32 loff = nv50_sor_link(sor); in gm200_sor_dp_drive()
31 const u32 shift = sor->func->dp.lanes[ln] * 8; in gm200_sor_dp_drive()
53 const u32 sor = ior ? ior->id + 1 : 0; in gm200_sor_route_set() local
57 nvkm_mask(device, 0x612308 + moff, 0x0000001f, link << 4 | sor); in gm200_sor_route_set()
62 nvkm_mask(device, 0x612388 + moff, 0x0000001f, link << 4 | sor); in gm200_sor_route_set()
70 int lnk[2], sor[2], m, s; in gm200_sor_route_get() local
76 sor[s] = (data & 0x0000000f); in gm200_sor_route_get()
77 if (!sor[s]) in gm200_sor_route_get()
[all …]
Dsornv50.c29 nv50_sor_clock(struct nvkm_ior *sor) in nv50_sor_clock() argument
31 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_clock()
32 const int div = sor->asy.link == 3; in nv50_sor_clock()
33 const u32 soff = nv50_ior_base(sor); in nv50_sor_clock()
47 nv50_sor_power(struct nvkm_ior *sor, bool normal, bool pu, in nv50_sor_power() argument
50 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_power()
51 const u32 soff = nv50_ior_base(sor); in nv50_sor_power()
67 nv50_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state) in nv50_sor_state() argument
69 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_state()
70 const u32 coff = sor->id * 8 + (state == &sor->arm) * 4; in nv50_sor_state()
[all …]
Dsortu102.c27 tu102_sor_dp_vcpi(struct nvkm_ior *sor, int head, in tu102_sor_dp_vcpi() argument
30 struct nvkm_device *device = sor->disp->engine.subdev.device; in tu102_sor_dp_vcpi()
38 tu102_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux) in tu102_sor_dp_links() argument
40 struct nvkm_device *device = sor->disp->engine.subdev.device; in tu102_sor_dp_links()
41 const u32 soff = nv50_ior_base(sor); in tu102_sor_dp_links()
42 const u32 loff = nv50_sor_link(sor); in tu102_sor_dp_links()
46 clksor |= sor->dp.bw << 18; in tu102_sor_dp_links()
47 dpctrl |= ((1 << sor->dp.nr) - 1) << 16; in tu102_sor_dp_links()
48 if (sor->dp.mst) in tu102_sor_dp_links()
50 if (sor->dp.ef) in tu102_sor_dp_links()
[all …]
Dsorgv100.c27 gv100_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark) in gv100_sor_dp_watermark() argument
29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_watermark()
35 gv100_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) in gv100_sor_dp_audio_sym() argument
37 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_audio_sym()
44 gv100_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) in gv100_sor_dp_audio() argument
46 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_audio()
58 gv100_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state) in gv100_sor_state() argument
60 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_state()
61 const u32 coff = (state == &sor->arm) * 0x8000 + sor->id * 0x20; in gv100_sor_state()
145 return nvkm_ior_new_(&gv100_sor_hda, disp, SOR, id); in gv100_sor_new()
[all …]
Dsorgm107.c27 gm107_sor_dp_pattern(struct nvkm_ior *sor, int pattern) in gm107_sor_dp_pattern() argument
29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gm107_sor_dp_pattern()
30 const u32 soff = nv50_ior_base(sor); in gm107_sor_dp_pattern()
32 if (sor->asy.link & 1) in gm107_sor_dp_pattern()
67 return nvkm_ior_new_(&gm107_sor, disp, SOR, id); in gm107_sor_new()
Drootnv50.c142 nvif_ioctl(object, "disp sor hda eld size %d\n", size); in nv50_disp_root_mthd_()
144 nvif_ioctl(object, "disp sor hda eld vers %d\n", in nv50_disp_root_mthd_()
176 nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size); in nv50_disp_root_mthd_()
178 nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d " in nv50_disp_root_mthd_()
218 nvif_ioctl(object, "disp sor lvds script size %d\n", size); in nv50_disp_root_mthd_()
220 nvif_ioctl(object, "disp sor lvds script " in nv50_disp_root_mthd_()
223 disp->sor.lvdsconf = args->v0.script; in nv50_disp_root_mthd_()
235 nvif_ioctl(object, "disp sor dp mst link size %d\n", size); in nv50_disp_root_mthd_()
237 nvif_ioctl(object, "disp sor dp mst link vers %d state %d\n", in nv50_disp_root_mthd_()
250 nvif_ioctl(object, "disp sor dp mst vcpi size %d\n", size); in nv50_disp_root_mthd_()
[all …]
Dsorgt215.c27 gt215_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) in gt215_sor_dp_audio() argument
29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gt215_sor_dp_audio()
30 const u32 soff = nv50_ior_base(sor); in gt215_sor_dp_audio()
68 return nvkm_ior_new_(&gt215_sor, disp, SOR, id); in gt215_sor_new()
Dnv50.c127 disp->sor.nr = func->sor.cnt(&disp->base, &disp->sor.mask); in nv50_disp_oneinit_()
128 nvkm_debug(subdev, " SOR(s): %d (%02lx)\n", in nv50_disp_oneinit_()
129 disp->sor.nr, disp->sor.mask); in nv50_disp_oneinit_()
130 for_each_set_bit(i, &disp->sor.mask, disp->sor.nr) { in nv50_disp_oneinit_()
131 ret = func->sor.new(&disp->base, i); in nv50_disp_oneinit_()
219 if (ior->type == SOR) { in nv50_disp_super_ied_on()
452 if (ior->type == SOR && ior->asy.proto == LVDS) { in nv50_disp_super_2_2()
453 head->asy.or.depth = (disp->sor.lvdsconf & 0x0200) ? 24 : 18; in nv50_disp_super_2_2()
454 ior->asy.link = (disp->sor.lvdsconf & 0x0100) ? 3 : 1; in nv50_disp_super_2_2()
468 if (ior->type == SOR && ior->asy.proto == DP) in nv50_disp_super_2_2()
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-host1x.txt201 - sor: serial output resource
205 - "nvidia,tegra124-sor": for Tegra124 and Tegra132
206 - "nvidia,tegra132-sor": for Tegra132
207 - "nvidia,tegra210-sor": for Tegra210
209 - "nvidia,tegra186-sor": for Tegra186
216 - sor: clock input for the SOR hardware
217 - out: SOR output clock
219 - dp: reference clock for the SOR clock
220 - safe: safe reference for the SOR clock during power up
223 - pad: SOR pad output clock (on Tegra186 and later)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-host1x.txt73 - power-domains: Must include sor powergate node as csicil is in
74 SOR partition.
265 - sor: serial output resource
269 - "nvidia,tegra124-sor": for Tegra124 and Tegra132
270 - "nvidia,tegra132-sor": for Tegra132
271 - "nvidia,tegra210-sor": for Tegra210
273 - "nvidia,tegra186-sor": for Tegra186
280 - sor: clock input for the SOR hardware
281 - out: SOR output clock
283 - dp: reference clock for the SOR clock
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
Ddcb.h38 struct sor_conf sor; member
47 struct sor_conf sor; member
52 struct sor_conf sor; member
/kernel/linux/linux-4.19/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
Ddcb.h38 struct sor_conf sor; member
47 struct sor_conf sor; member
52 struct sor_conf sor; member

1234567