Searched +full:spi +full:- +full:rx +full:- +full:bus +full:- +full:width (Results 1 – 25 of 390) sorted by relevance
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/spi/ |
| D | spi-bus.txt | 1 SPI (Serial Peripheral Interface) busses
3 SPI busses can be described with a node for the SPI controller device
4 and a set of child nodes for each SPI slave on the bus. The system's SPI
5 controller may be described for use in SPI master mode or in SPI slave mode,
8 The SPI controller node requires the following properties:
9 - compatible - Name of SPI bus controller following generic names
12 In master mode, the SPI controller node requires the following additional
14 - #address-cells - number of cells required to define a chip select
15 address on the SPI bus.
16 - #size-cells - should be zero.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | snps,dw-apb-ssi.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
13 - $ref: "spi-controller.yaml#"
14 - if:
19 - mscc,ocelot-spi
20 - mscc,jaguar2-spi
25 - if:
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| D | allwinner,sun6i-a31-spi.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 SPI Controller Device Tree Bindings
10 - $ref: "spi-controller.yaml"
13 - Chen-Yu Tsai <wens@csie.org>
14 - Maxime Ripard <mripard@kernel.org>
17 "#address-cells": true
18 "#size-cells": true
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| D | allwinner,sun4i-a10-spi.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/allwinner,sun4i-a10-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 SPI Controller Device Tree Bindings
10 - $ref: "spi-controller.yaml"
13 - Chen-Yu Tsai <wens@csie.org>
14 - Maxime Ripard <mripard@kernel.org>
17 "#address-cells": true
18 "#size-cells": true
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| D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Generic Binding
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-[0-9a-f])*$"
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| D | spi-mxic.txt | 1 Macronix SPI controller Device Tree Bindings
2 --------------------------------------------
5 - compatible: should be "mxicy,mx25f0a-spi"
6 - #address-cells: should be 1
7 - #size-cells: should be 0
8 - reg: should contain 2 entries, one for the registers and one for the direct
10 - reg-names: should contain "regs" and "dirmap"
11 - interrupts: interrupt line connected to the SPI controller
12 - clock-names: should contain "ps_clk", "send_clk" and "send_dly_clk"
13 - clocks: should contain 3 entries for the "ps_clk", "send_clk" and
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1088a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
21 bus-num = <0>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-nor";
29 spi-max-frequency = <1000000>;
33 #address-cells = <1>;
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| D | fsl-ls1088a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
23 i2c-switch@77 {
26 #address-cells = <1>;
27 #size-cells = <0>;
30 #address-cells = <1>;
31 #size-cells = <0>;
37 shunt-resistor = <1000>;
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| D | fsl-ls208xa-qds.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
13 mmc-hs200-1_8v;
19 #address-cells = <2>;
20 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <1>;
28 compatible = "cfi-flash";
30 bank-width = <2>;
31 device-width = <1>;
35 compatible = "fsl,ifc-nand";
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| D | fsl-lx2160a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
21 stdout-path = "serial0:115200n8";
24 sb_3v3: regulator-sb3v3 {
25 compatible = "regulator-fixed";
26 regulator-name = "MC34717-3.3VSB";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
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| D | fsl-ls1046a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
10 /dts-v1/;
12 #include "fsl-ls1046a.dtsi"
16 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
26 stdout-path = "serial0:115200n8";
39 mmc-hs200-1_8v;
40 sd-uhs-sdr104;
41 sd-uhs-sdr50;
42 sd-uhs-sdr25;
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| D | fsl-ls1012a-frwy.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /dts-v1/;
12 #include "fsl-ls1012a.dtsi"
16 compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
31 compatible = "jedec,spi-nor";
32 #address-cells = <1>;
33 #size-cells = <1>;
34 m25p,fast-read;
35 spi-max-frequency = <50000000>;
37 spi-rx-bus-width = <2>;
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| D | fsl-ls1012a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "fsl-ls1012a.dtsi"
14 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
22 sd-uhs-sdr104;
23 sd-uhs-sdr50;
24 sd-uhs-sdr25;
25 sd-uhs-sdr12;
30 mmc-hs200-1_8v;
42 compatible = "jedec,spi-nor";
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mtd/ |
| D | nxp-spifi.txt | 1 * NXP SPI Flash Interface (SPIFI)
3 NXP SPIFI is a specialized SPI interface for serial Flash devices.
4 It supports one Flash device with 1-, 2- and 4-bits width in SPI
10 - compatible : Should be "nxp,lpc1773-spifi"
11 - reg : the first contains the register location and length,
13 - reg-names: Should contain the reg names "spifi" and "flash"
14 - interrupts : Should contain the interrupt for the device
15 - clocks : The clocks needed by the SPIFI controller
16 - clock-names : Should contain the clock names "spifi" and "reg"
19 - resets : phandle + reset specifier
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| D | stm32-quadspi.txt | 4 - compatible: should be "st,stm32f469-qspi"
5 - reg: the first contains the register location and length.
7 - reg-names: should contain the reg names "qspi" "qspi_mm"
8 - interrupts: should contain the interrupt for the device
9 - clocks: the phandle of the clock needed by the QSPI controller
10 - A pinctrl must be defined to set pins in mode of operation for QSPI transfer
13 - resets: must contain the phandle to the reset controller.
15 A spi flash must be a child of the nor_flash node and could have some
16 properties. Also see jedec,spi-nor.txt.
19 - reg: chip-Select number (QSPI controller may connect 2 nor flashes)
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | nxp-spifi.txt | 1 * NXP SPI Flash Interface (SPIFI)
3 NXP SPIFI is a specialized SPI interface for serial Flash devices.
4 It supports one Flash device with 1-, 2- and 4-bits width in SPI
10 - compatible : Should be "nxp,lpc1773-spifi"
11 - reg : the first contains the register location and length,
13 - reg-names: Should contain the reg names "spifi" and "flash"
14 - interrupts : Should contain the interrupt for the device
15 - clocks : The clocks needed by the SPIFI controller
16 - clock-names : Should contain the clock names "spifi" and "reg"
19 - resets : phandle + reset specifier
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx6sx-sdb.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 #include "imx6sx-sdb.dtsi"
12 clock-frequency = <100000>;
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_i2c1>;
23 regulator-min-microvolt = <300000>;
24 regulator-max-microvolt = <1875000>;
25 regulator-boot-on;
26 regulator-always-on;
27 regulator-ramp-delay = <6250>;
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| D | imx6sx-sdb-reva.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 #include "imx6sx-sdb.dtsi"
9 compatible = "fsl,imx6sx-sdb-reva", "fsl,imx6sx";
13 clock-frequency = <100000>;
14 pinctrl-names = "default";
15 pinctrl-0 = <&pinctrl_i2c1>;
24 regulator-min-microvolt = <300000>;
25 regulator-max-microvolt = <1875000>;
26 regulator-boot-on;
27 regulator-always-on;
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| D | r8a7743-iwg20m.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZG1M-20M Qseven SOM
9 #include <dt-bindings/gpio/gpio.h>
25 compatible = "regulator-fixed";
26 regulator-name = "3P3V";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
29 regulator-always-on;
30 regulator-boot-on;
35 clock-frequency = <20000000>;
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| D | r8a7744-iwg20m.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/gpio/gpio.h>
20 compatible = "regulator-fixed";
21 regulator-name = "3P3V";
22 regulator-min-microvolt = <3300000>;
23 regulator-max-microvolt = <3300000>;
24 regulator-always-on;
25 regulator-boot-on;
30 clock-frequency = <20000000>;
47 power-source = <3300>;
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| D | imx6ull-kontron-n6411-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include "imx6ul-kontron-n6x1x-som-common.dtsi"
12 compatible = "kontron,imx6ull-n6311-som", "fsl,imx6ull";
21 spi-flash@0 {
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "spi-nand";
25 spi-max-frequency = <104000000>;
26 spi-tx-bus-width = <4>;
27 spi-rx-bus-width = <4>;
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| D | imx6ul-kontron-n6311-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include "imx6ul-kontron-n6x1x-som-common.dtsi"
12 compatible = "kontron,imx6ul-n6311-som", "fsl,imx6ul";
21 spi-flash@0 {
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "spi-nand";
25 spi-max-frequency = <104000000>;
26 spi-tx-bus-width = <4>;
27 spi-rx-bus-width = <4>;
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| D | imx6ul-kontron-n6310-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 #include "imx6ul-kontron-n6x1x-som-common.dtsi"
13 compatible = "kontron,imx6ul-n6310-som", "fsl,imx6ul";
22 spi-flash@0 {
23 #address-cells = <1>;
24 #size-cells = <1>;
25 compatible = "spi-nand";
26 spi-max-frequency = <108000000>;
27 spi-tx-bus-width = <4>;
28 spi-rx-bus-width = <4>;
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| D | r8a7745-iwg22m.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZG1E-G22M SODIMM SOM
9 #include <dt-bindings/gpio/gpio.h>
20 compatible = "regulator-fixed";
21 regulator-name = "3P3V";
22 regulator-min-microvolt = <3300000>;
23 regulator-max-microvolt = <3300000>;
24 regulator-always-on;
25 regulator-boot-on;
34 clock-frequency = <20000000>;
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | r8a7743-iwg20m.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZG1M-20M Qseven SOM
9 #include <dt-bindings/gpio/gpio.h>
25 compatible = "regulator-fixed";
26 regulator-name = "3P3V";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
29 regulator-always-on;
30 regulator-boot-on;
39 clock-frequency = <20000000>;
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