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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/runtime/pipeline/src/
Dpipeline.c49 static void pipeline_stage_destroy(struct ia_css_pipeline_stage *stage);
261 /* @brief Add a stage to pipeline.
264 * @param[in] stage_desc The description of the stage
265 * @param[out] stage The successor of the stage.
268 * Add a new stage to a non-NULL pipeline.
269 * The stage consists of an ISP binary or firmware and input and
275 struct ia_css_pipeline_stage **stage) in ia_css_pipeline_create_and_add_stage() argument
295 /* Find the last stage */ in ia_css_pipeline_create_and_add_stage()
300 * stage, if no previous stage, it's an error. in ia_css_pipeline_create_and_add_stage()
314 /* Create the new stage */ in ia_css_pipeline_create_and_add_stage()
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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/css_2401_system/hive/
Dia_css_isp_params.c72 const struct ia_css_pipeline_stage *stage, in ia_css_process_aa() argument
76 stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; in ia_css_process_aa()
78 stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; in ia_css_process_aa()
82 … &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; in ia_css_process_aa()
92 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr() argument
99 stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; in ia_css_process_anr()
102 stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; in ia_css_process_anr()
109 &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], in ia_css_process_anr()
113 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_anr()
127 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr2() argument
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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/css_2400_system/hive/
Dia_css_isp_params.c71 const struct ia_css_pipeline_stage *stage, in ia_css_process_aa() argument
75 stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; in ia_css_process_aa()
77 stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; in ia_css_process_aa()
81 … &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; in ia_css_process_aa()
85 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_aa()
94 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr() argument
101 stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; in ia_css_process_anr()
104 stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; in ia_css_process_anr()
111 &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], in ia_css_process_anr()
115 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_anr()
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/kernel/linux/linux-4.19/drivers/thermal/
Dqcom-spmi-temp-alarm.c52 #define TEMP_STAGE_STEP 20000 /* Stage step: 20.000 C */
60 /* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
69 unsigned int stage; member
75 /* This array maps from GEN2 alarm state to GEN1 alarm stage */
97 * qpnp_tm_get_temp_stage() - return over-temperature stage
100 * Return: stage (GEN1) or state (GEN2) on success, or errno on failure.
121 * current thermal stage and threshold as well as the previous stage
125 unsigned int stage, stage_new, stage_old; in qpnp_tm_update_temp_no_adc() local
131 stage = ret; in qpnp_tm_update_temp_no_adc()
134 stage_new = stage; in qpnp_tm_update_temp_no_adc()
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/kernel/linux/linux-5.10/drivers/thermal/qcom/
Dqcom-spmi-temp-alarm.c48 #define TEMP_STAGE_STEP 20000 /* Stage step: 20.000 C */
57 /* Stage 2 Threshold Min: 125 C */
59 /* Stage 2 Threshold Max: 140 C */
62 /* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
72 unsigned int stage; member
75 /* protects .thresh, .stage and chip registers */
82 /* This array maps from GEN2 alarm state to GEN1 alarm stage */
104 * qpnp_tm_get_temp_stage() - return over-temperature stage
107 * Return: stage (GEN1) or state (GEN2) on success, or errno on failure.
128 * current thermal stage and threshold as well as the previous stage
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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/
Dia_css_pipeline.h25 /* Pipeline stage to be executed on SP/ISP */
31 /* SP function for SP stage */
42 /* Pipeline of n stages to be executed on SP/ISP per stage */
71 /* Stage descriptor used to create a new stage in the pipeline */
151 /* @brief Add a stage to pipeline.
154 * @param[in] stage_desc The description of the stage
155 * @param[out] stage The successor of the stage.
158 * Add a new stage to a non-NULL pipeline.
159 * The stage consists of an ISP binary or firmware and input and output
165 struct ia_css_pipeline_stage **stage);
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/kernel/linux/linux-5.10/tools/testing/selftests/kvm/x86_64/
Dvmx_preemption_timer_test.c164 int stage; in main() local
187 for (stage = 1;; stage++) { in main()
190 "Stage %d: unexpected exit reason: %u (%s),\n", in main()
191 stage, run->exit_reason, in main()
209 uc.args[1] == stage, "Stage %d: Unexpected register values vmexit, got %lx", in main()
210 stage, (ulong)uc.args[1]); in main()
212 * If this stage 2 then we should verify the vmx pt expiry in main()
219 if (stage == 2) { in main()
221 pr_info("Stage %d: L1 PT expiry TSC (%lu) , L1 TSC deadline (%lu)\n", in main()
222 stage, uc.args[2], uc.args[3]); in main()
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Dsmm_test.c42 * SMI handler always report back fixed stage SMRAM_STAGE.
100 int stage, stage_reported; in main() local
132 for (stage = 1;; stage++) { in main()
135 "Stage %d: unexpected exit reason: %u (%s),\n", in main()
136 stage, run->exit_reason, in main()
147 TEST_ASSERT(stage_reported == stage || in main()
149 "Unexpected stage: #%x, got %x", in main()
150 stage, stage_reported); in main()
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_lm.c16 /* These register are offset to mixer base + stage base */
50 * for the stage to be setup
52 * @stage: stage index to setup
54 static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum dpu_stage stage) in _stage_offset() argument
57 if (stage != DPU_STAGE_BASE && stage <= sblk->maxblendstages) in _stage_offset()
58 return sblk->blendstage_base[stage - DPU_STAGE_0]; in _stage_offset()
100 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config_sdm845() argument
106 if (stage == DPU_STAGE_BASE) in dpu_hw_lm_setup_blend_config_sdm845()
109 stage_off = _stage_offset(ctx, stage); in dpu_hw_lm_setup_blend_config_sdm845()
119 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config() argument
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/kernel/linux/linux-5.10/drivers/watchdog/
Dkempld_wdt.c10 * First the pretimeout stage runs out before the timeout stage gets
77 struct kempld_wdt_stage stage[KEMPLD_WDT_MAX_STAGES]; member
105 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_action() argument
111 if (!stage || !stage->mask) in kempld_wdt_set_stage_action()
115 stage_cfg = kempld_read8(pld, KEMPLD_WDT_STAGE_CFG(stage->id)); in kempld_wdt_set_stage_action()
124 kempld_write8(pld, KEMPLD_WDT_STAGE_CFG(stage->id), stage_cfg); in kempld_wdt_set_stage_action()
131 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_timeout() argument
143 if (!stage) in kempld_wdt_set_stage_timeout()
151 if (stage_timeout64 > stage->mask) in kempld_wdt_set_stage_timeout()
154 stage_timeout = stage_timeout64 & stage->mask; in kempld_wdt_set_stage_timeout()
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Dsbsa_gwdt.c11 * ARM SBSA Generic Watchdog has two stage timeouts:
17 * This driver can operate ARM SBSA Generic Watchdog as a single stage watchdog
19 * In the single stage mode, when the timeout is reached, your system
24 * second stage (as long as the first stage) will be reached, system will be
33 * if action is 0 (the single stage mode):
37 * Note: Since this watchdog timer has two stages, and each stage is determined
38 * by WOR, in the single stage mode, the timeout is (WOR * 2); in the two
40 * is half of that in the single stage mode.
130 * In the single stage mode, The first signal (WS0) is ignored, in sbsa_gwdt_set_timeout()
146 * In the single stage mode, if WS0 is deasserted in sbsa_gwdt_get_timeleft()
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/kernel/linux/linux-4.19/drivers/watchdog/
Dkempld_wdt.c18 * First the pretimeout stage runs out before the timeout stage gets
85 struct kempld_wdt_stage stage[KEMPLD_WDT_MAX_STAGES]; member
113 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_action() argument
119 if (!stage || !stage->mask) in kempld_wdt_set_stage_action()
123 stage_cfg = kempld_read8(pld, KEMPLD_WDT_STAGE_CFG(stage->id)); in kempld_wdt_set_stage_action()
132 kempld_write8(pld, KEMPLD_WDT_STAGE_CFG(stage->id), stage_cfg); in kempld_wdt_set_stage_action()
139 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_timeout() argument
151 if (!stage) in kempld_wdt_set_stage_timeout()
159 if (stage_timeout64 > stage->mask) in kempld_wdt_set_stage_timeout()
162 stage_timeout = stage_timeout64 & stage->mask; in kempld_wdt_set_stage_timeout()
[all …]
Dsbsa_gwdt.c19 * ARM SBSA Generic Watchdog has two stage timeouts:
25 * This driver can operate ARM SBSA Generic Watchdog as a single stage watchdog
27 * In the single stage mode, when the timeout is reached, your system
32 * second stage (as long as the first stage) will be reached, system will be
41 * if action is 0 (the single stage mode):
45 * Note: Since this watchdog timer has two stages, and each stage is determined
46 * by WOR, in the single stage mode, the timeout is (WOR * 2); in the two
48 * is half of that in the single stage mode.
139 * In the single stage mode, The first signal (WS0) is ignored, in sbsa_gwdt_set_timeout()
155 * In the single stage mode, if WS0 is deasserted in sbsa_gwdt_get_timeleft()
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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/ampere/emag/
Dcache.json156 "PublicDescription": "Level 1 stage 2 TLB refill",
159 "BriefDescription": "L1 stage 2 TLB refill"
162 "PublicDescription": "Page walk cache level-0 stage-1 hit",
165 "BriefDescription": "Page walk, L0 stage-1 hit"
168 "PublicDescription": "Page walk cache level-1 stage-1 hit",
171 "BriefDescription": "Page walk, L1 stage-1 hit"
174 "PublicDescription": "Page walk cache level-2 stage-1 hit",
177 "BriefDescription": "Page walk, L2 stage-1 hit"
180 "PublicDescription": "Page walk cache level-1 stage-2 hit",
183 "BriefDescription": "Page walk, L1 stage-2 hit"
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/kernel/linux/linux-5.10/Documentation/leds/
Dleds-sc27xx.rst16 for the high stage. To be compatible with the hardware pattern
17 format, we should set brightness as 0 for rise stage, fall
18 stage and low stage.
20 - Min stage duration: 125 ms
21 - Max stage duration: 31875 ms
23 Since the stage duration step is 125 ms, the duration should be
/kernel/linux/linux-4.19/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_lm.c26 /* These register are offset to mixer base + stage base */
63 * for the stage to be setup
65 * @stage: stage index to setup
67 static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum dpu_stage stage) in _stage_offset() argument
72 if (stage == DPU_STAGE_BASE) in _stage_offset()
74 else if (stage <= sblk->maxblendstages) in _stage_offset()
75 rc = sblk->blendstage_base[stage - DPU_STAGE_0]; in _stage_offset()
119 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config_sdm845() argument
125 if (stage == DPU_STAGE_BASE) in dpu_hw_lm_setup_blend_config_sdm845()
128 stage_off = _stage_offset(ctx, stage); in dpu_hw_lm_setup_blend_config_sdm845()
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/kernel/linux/linux-5.10/tools/testing/selftests/tc-testing/
DTdcPlugin.py43 def adjust_command(self, stage, command): argument
46 print(' -- {}.adjust_command {}'.format(self.sub_class, stage))
48 # if stage == 'pre':
50 # elif stage == 'setup':
52 # elif stage == 'execute':
54 # elif stage == 'verify':
56 # elif stage == 'teardown':
58 # elif stage == 'post':
/kernel/linux/linux-4.19/tools/testing/selftests/tc-testing/
DTdcPlugin.py43 def adjust_command(self, stage, command): argument
46 print(' -- {}.adjust_command {}'.format(self.sub_class, stage))
48 # if stage == 'pre':
50 # elif stage == 'setup':
52 # elif stage == 'execute':
54 # elif stage == 'verify':
56 # elif stage == 'teardown':
58 # elif stage == 'post':
Dtdc.py29 def __init__(self, stage, output, message): argument
30 self.stage = stage
95 def call_adjust_command(self, stage, command): argument
97 command = pgn_inst.adjust_command(stage, command)
116 def exec_cmd(args, pm, stage, command): argument
126 command = pm.call_adjust_command(stage, command)
146 def prepare_env(args, pm, stage, prefix, cmdlist, output = None): argument
164 (proc, foutput) = exec_cmd(args, pm, stage, cmd)
178 stage, output,
194 prepare_env(args, pm, 'setup', "-----> prepare stage", tidx["setup"])
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/kernel/linux/linux-4.19/tools/testing/selftests/tc-testing/plugin-lib/
DnsPlugin.py41 def adjust_command(self, stage, command): argument
42 super().adjust_command(stage, command)
57 if stage == 'setup' or stage == 'execute' or stage == 'verify' or stage == 'teardown':
59 …print('adjust_command: stage is {}; inserting netns stuff in command [{}] list [{}]'.format(stage
107 def _exec_cmd(self, stage, command): argument
115 self.adjust_command(stage, command)
/kernel/linux/linux-5.10/tools/testing/selftests/tc-testing/plugin-lib/
DnsPlugin.py45 def adjust_command(self, stage, command): argument
46 super().adjust_command(stage, command)
61 if stage == 'setup' or stage == 'execute' or stage == 'verify' or stage == 'teardown':
63 …print('adjust_command: stage is {}; inserting netns stuff in command [{}] list [{}]'.format(stage
121 def _exec_cmd(self, stage, command): argument
129 self.adjust_command(stage, command)
/kernel/linux/linux-4.19/Documentation/ABI/testing/
Dsysfs-bus-iio-health-afe440x7 specific stage number corresponding to datasheet stage names
15 calculated difference in the value of stage 1 - 2 and 3 - 4.
33 Transimpedance Amplifier during the associated stage.
41 this stage. Y is the specific stage number.
/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dsysfs-bus-iio-health-afe440x7 specific stage number corresponding to datasheet stage names
19 calculated difference in the value of stage 1 - 2 and 3 - 4.
37 Transimpedance Amplifier during the associated stage.
45 this stage. Y is the specific stage number.
/kernel/linux/linux-5.10/sound/soc/sprd/
Dsprd-pcm-compress.c28 /* Stage 0 IRAM buffer size definition */
36 /* Stage 1 DDR buffer size definition */
52 * The Spreadtrum Audio compress offload mode will use 2-stage DMA transfer to
58 * For 2-stage DMA transfer, we can allocate 2 buffers: IRAM buffer (always
77 /* Stage 0 IRAM buffer */
79 /* Stage 1 DDR buffer */
91 /* Stage 0 IRAM buffer received data size */
93 /* Stage 1 DDR buffer received data size */
95 /* Stage 1 DDR buffer pointer */
275 * Configure the DMA engine 2-stage transfer mode. Channel 1 set as the in sprd_platform_compr_set_params()
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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/
Dsh_css_sp.c123 unsigned int stage) in store_sp_stage_data() argument
131 sh_css_store_isp_stage_to_ddr(pipe_num, stage); in store_sp_stage_data()
132 sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = in store_sp_stage_data()
133 sh_css_store_sp_stage_to_ddr(pipe_num, stage); in store_sp_stage_data()
808 is_sp_stage(struct ia_css_pipeline_stage *stage) in is_sp_stage() argument
810 assert(stage); in is_sp_stage()
811 return stage->sp_func != IA_CSS_PIPELINE_NO_FUNC; in is_sp_stage()
895 unsigned int stage, in sh_css_sp_init_stage() argument
933 sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = mmgr_NULL; in sh_css_sp_init_stage()
941 sh_css_sp_stage.deinterleaved = ((stage == 0) && continuous); in sh_css_sp_init_stage()
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