| /kernel/linux/linux-4.19/arch/mips/bcm63xx/ |
| D | clk.c | 28 static DEFINE_MUTEX(clocks_mutex);
31 static void clk_enable_unlocked(struct clk *clk) in clk_enable_unlocked()
33 if (clk->set && (clk->usage++) == 0) in clk_enable_unlocked()
34 clk->set(clk, 1); in clk_enable_unlocked()
37 static void clk_disable_unlocked(struct clk *clk) in clk_disable_unlocked()
39 if (clk->set && (--clk->usage) == 0) in clk_disable_unlocked()
40 clk->set(clk, 0); in clk_disable_unlocked()
43 static void bcm_hwclock_set(u32 mask, int enable) in bcm_hwclock_set() argument
48 if (enable) in bcm_hwclock_set()
58 static void enet_misc_set(struct clk *clk, int enable) in enet_misc_set() argument
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| /kernel/linux/linux-5.10/arch/mips/bcm63xx/ |
| D | clk.c | 28 static DEFINE_MUTEX(clocks_mutex);
31 static void clk_enable_unlocked(struct clk *clk) in clk_enable_unlocked()
33 if (clk->set && (clk->usage++) == 0) in clk_enable_unlocked()
34 clk->set(clk, 1); in clk_enable_unlocked()
37 static void clk_disable_unlocked(struct clk *clk) in clk_disable_unlocked()
39 if (clk->set && (--clk->usage) == 0) in clk_disable_unlocked()
40 clk->set(clk, 0); in clk_disable_unlocked()
43 static void bcm_hwclock_set(u32 mask, int enable) in bcm_hwclock_set() argument
48 if (enable) in bcm_hwclock_set()
58 static void enet_misc_set(struct clk *clk, int enable) in enet_misc_set() argument
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| /kernel/linux/linux-5.10/arch/mips/alchemy/common/ |
| D | usb.c | 1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <asm/mach-au1x00/au1000.h>
28 #define USBHEN_RD (1 << 4) /* OHCI reset-done indicator */
29 #define USBHEN_CE (1 << 3) /* OHCI block clock enable */
30 #define USBHEN_E (1 << 2) /* OHCI block enable */
32 #define USBHEN_BE (1 << 0) /* OHCI Big-Endian */
35 #define USBCFG_PFEN (1 << 31) /* prefetch enable (undoc) */
40 #define USBCFG_UCE (1 << 18) /* UDC clock enable */
41 #define USBCFG_ECE (1 << 17) /* EHCI clock enable */
42 #define USBCFG_OCE (1 << 16) /* OHCI clock enable */
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| /kernel/linux/linux-4.19/arch/mips/alchemy/common/ |
| D | usb.c | 19 #include <asm/mach-au1x00/au1000.h>
27 #define USBHEN_RD (1 << 4) /* OHCI reset-done indicator */
28 #define USBHEN_CE (1 << 3) /* OHCI block clock enable */
29 #define USBHEN_E (1 << 2) /* OHCI block enable */
31 #define USBHEN_BE (1 << 0) /* OHCI Big-Endian */
34 #define USBCFG_PFEN (1 << 31) /* prefetch enable (undoc) */
39 #define USBCFG_UCE (1 << 18) /* UDC clock enable */
40 #define USBCFG_ECE (1 << 17) /* EHCI clock enable */
41 #define USBCFG_OCE (1 << 16) /* OHCI clock enable */
45 #define USBCFG_DBE (1 << 5) /* UDC busmaster enable */
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| /kernel/linux/linux-4.19/arch/powerpc/kernel/ |
| D | security.c | 1 // SPDX-License-Identifier: GPL-2.0+
12 #include <asm/asm-prototypes.h>
13 #include <asm/code-patching.h>
26 static enum count_cache_flush_type count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
27 static bool link_stack_flush_enabled;
30 static bool no_nospec;
31 static bool btb_flush_enabled;
33 static bool no_spectrev2;
36 static void enable_barrier_nospec(bool enable) in enable_barrier_nospec() argument
38 barrier_nospec_enabled = enable; in enable_barrier_nospec()
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| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | security.c | 1 // SPDX-License-Identifier: GPL-2.0+
14 #include <asm/asm-prototypes.h>
15 #include <asm/code-patching.h>
29 static enum branch_cache_flush_type count_cache_flush_type = BRANCH_CACHE_FLUSH_NONE;
30 static enum branch_cache_flush_type link_stack_flush_type = BRANCH_CACHE_FLUSH_NONE;
33 static bool no_nospec;
34 static bool btb_flush_enabled;
36 static bool no_spectrev2;
39 static void enable_barrier_nospec(bool enable) in enable_barrier_nospec() argument
41 barrier_nospec_enabled = enable; in enable_barrier_nospec()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/bcm/ |
| D | clk-sr.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/bcm-sr.h>
12 #include "clk-iproc.h"
34 static const struct iproc_pll_ctrl sr_genpll0 = {
47 static const struct iproc_clk_ctrl sr_genpll0_clk[] = {
51 .enable = ENABLE_VAL(0x4, 6, 0, 12),
57 .enable = ENABLE_VAL(0x4, 7, 1, 13),
63 .enable = ENABLE_VAL(0x4, 8, 2, 14),
69 .enable = ENABLE_VAL(0x4, 9, 3, 15),
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| D | clk-ns2.c | 16 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/bcm-ns2.h>
22 #include "clk-iproc.h"
41 static const struct iproc_pll_ctrl genpll_scr = {
53 static const struct iproc_clk_ctrl genpll_scr_clk[] = {
61 .enable = ENABLE_VAL(0x0, 18, 12, 0),
67 .enable = ENABLE_VAL(0x0, 19, 13, 0),
73 .enable = ENABLE_VAL(0x0, 20, 14, 0),
79 .enable = ENABLE_VAL(0x0, 21, 15, 0),
85 .enable = ENABLE_VAL(0x0, 22, 16, 0),
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| D | clk-cygnus.c | 16 #include <linux/clk-provider.h>
23 #include <dt-bindings/clock/bcm-cygnus.h>
24 #include "clk-iproc.h"
51 static void __init cygnus_armpll_init(struct device_node *node) in cygnus_armpll_init()
55 CLK_OF_DECLARE(cygnus_armpll, "brcm,cygnus-armpll", cygnus_armpll_init);
57 static const struct iproc_pll_ctrl genpll = {
71 static const struct iproc_clk_ctrl genpll_clk[] = {
75 .enable = ENABLE_VAL(0x4, 6, 0, 12),
81 .enable = ENABLE_VAL(0x4, 7, 1, 13),
87 .enable = ENABLE_VAL(0x4, 8, 2, 14),
[all …]
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| /kernel/linux/linux-4.19/drivers/clk/bcm/ |
| D | clk-sr.c | 18 #include <linux/clk-provider.h>
22 #include <dt-bindings/clock/bcm-sr.h>
23 #include "clk-iproc.h"
45 static const struct iproc_pll_ctrl sr_genpll0 = {
58 static const struct iproc_clk_ctrl sr_genpll0_clk[] = {
62 .enable = ENABLE_VAL(0x4, 6, 0, 12),
68 .enable = ENABLE_VAL(0x4, 7, 1, 13),
74 .enable = ENABLE_VAL(0x4, 8, 2, 14),
80 .enable = ENABLE_VAL(0x4, 9, 3, 15),
86 .enable = ENABLE_VAL(0x4, 10, 4, 16),
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| D | clk-ns2.c | 16 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/bcm-ns2.h>
22 #include "clk-iproc.h"
41 static const struct iproc_pll_ctrl genpll_scr = {
53 static const struct iproc_clk_ctrl genpll_scr_clk[] = {
61 .enable = ENABLE_VAL(0x0, 18, 12, 0),
67 .enable = ENABLE_VAL(0x0, 19, 13, 0),
73 .enable = ENABLE_VAL(0x0, 20, 14, 0),
79 .enable = ENABLE_VAL(0x0, 21, 15, 0),
85 .enable = ENABLE_VAL(0x0, 22, 16, 0),
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| D | clk-cygnus.c | 16 #include <linux/clk-provider.h>
23 #include <dt-bindings/clock/bcm-cygnus.h>
24 #include "clk-iproc.h"
51 static void __init cygnus_armpll_init(struct device_node *node) in cygnus_armpll_init()
55 CLK_OF_DECLARE(cygnus_armpll, "brcm,cygnus-armpll", cygnus_armpll_init);
57 static const struct iproc_pll_ctrl genpll = {
71 static const struct iproc_clk_ctrl genpll_clk[] = {
75 .enable = ENABLE_VAL(0x4, 6, 0, 12),
81 .enable = ENABLE_VAL(0x4, 7, 1, 13),
87 .enable = ENABLE_VAL(0x4, 8, 2, 14),
[all …]
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| /kernel/linux/linux-4.19/drivers/net/ethernet/ti/ |
| D | cpts.h | 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
42 u32 ts_load_en; /* Time stamp load enable */
46 u32 int_enable; /* Time sync interrupt enable */
64 #define HW4_TS_PUSH_EN (1<<11) /* Hardware push 4 enable */
65 #define HW3_TS_PUSH_EN (1<<10) /* Hardware push 3 enable */
66 #define HW2_TS_PUSH_EN (1<<9) /* Hardware push 2 enable */
67 #define HW1_TS_PUSH_EN (1<<8) /* Hardware push 1 enable */
69 #define CPTS_EN (1<<0) /* Time Sync Enable */
77 #define TS_PEND_RAW (1<<0) /* int read (before enable) */
78 #define TS_PEND (1<<0) /* masked interrupt read (after enable) */
[all …]
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| /kernel/linux/linux-4.19/drivers/fpga/ |
| D | altera-hps2fpga.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
8 * fpga: altera-hps2fpga: fix HPS2FPGA bridge visibility to L3 masters
9 * Signed-off-by: Anatolij Gustschin <agust@denx.de>
19 * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
23 #include <linux/fpga/fpga-bridge.h>
49 static int alt_hps2fpga_enable_show(struct fpga_bridge *bridge) in alt_hps2fpga_enable_show()
51 struct altera_hps2fpga_data *priv = bridge->priv; in alt_hps2fpga_enable_show()
53 return reset_control_status(priv->bridge_reset); in alt_hps2fpga_enable_show()
57 static unsigned int l3_remap_shadow;
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| D | altera-fpga2sdram.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
23 * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
26 #include <linux/fpga/fpga-bridge.h>
56 static int alt_fpga2sdram_enable_show(struct fpga_bridge *bridge) in alt_fpga2sdram_enable_show()
58 struct alt_fpga2sdram_data *priv = bridge->priv; in alt_fpga2sdram_enable_show()
61 regmap_read(priv->sdrctl, ALT_SDR_CTL_FPGAPORTRST_OFST, &value); in alt_fpga2sdram_enable_show()
63 return (value & priv->mask) == priv->mask; in alt_fpga2sdram_enable_show()
66 static inline int _alt_fpga2sdram_enable_set(struct alt_fpga2sdram_data *priv, in _alt_fpga2sdram_enable_set()
67 bool enable) in _alt_fpga2sdram_enable_set() argument
[all …]
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| /kernel/linux/linux-5.10/drivers/fpga/ |
| D | altera-hps2fpga.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
8 * fpga: altera-hps2fpga: fix HPS2FPGA bridge visibility to L3 masters
9 * Signed-off-by: Anatolij Gustschin <agust@denx.de>
19 * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
23 #include <linux/fpga/fpga-bridge.h>
49 static int alt_hps2fpga_enable_show(struct fpga_bridge *bridge) in alt_hps2fpga_enable_show()
51 struct altera_hps2fpga_data *priv = bridge->priv; in alt_hps2fpga_enable_show()
53 return reset_control_status(priv->bridge_reset); in alt_hps2fpga_enable_show()
57 static unsigned int l3_remap_shadow;
[all …]
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| D | altera-fpga2sdram.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
23 * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
26 #include <linux/fpga/fpga-bridge.h>
56 static int alt_fpga2sdram_enable_show(struct fpga_bridge *bridge) in alt_fpga2sdram_enable_show()
58 struct alt_fpga2sdram_data *priv = bridge->priv; in alt_fpga2sdram_enable_show()
61 regmap_read(priv->sdrctl, ALT_SDR_CTL_FPGAPORTRST_OFST, &value); in alt_fpga2sdram_enable_show()
63 return (value & priv->mask) == priv->mask; in alt_fpga2sdram_enable_show()
66 static inline int _alt_fpga2sdram_enable_set(struct alt_fpga2sdram_data *priv, in _alt_fpga2sdram_enable_set()
67 bool enable) in _alt_fpga2sdram_enable_set() argument
[all …]
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | ab8500-codec.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2012
8 * for ST-Ericsson.
14 * for ST-Ericsson.
31 #include <linux/mfd/abx500/ab8500-sysctrl.h>
32 #include <linux/mfd/abx500/ab8500-codec.h>
41 #include <sound/soc-dapm.h>
44 #include "ab8500-codec.h"
58 /* Nr of FIR/IIR-coeff banks in ANC-block */
79 static const char * const enum_sid_state[] = {
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| /kernel/linux/linux-4.19/sound/soc/codecs/ |
| D | ab8500-codec.c | 2 * Copyright (C) ST-Ericsson SA 2012
7 * for ST-Ericsson.
13 * for ST-Ericsson.
34 #include <linux/mfd/abx500/ab8500-sysctrl.h>
35 #include <linux/mfd/abx500/ab8500-codec.h>
44 #include <sound/soc-dapm.h>
47 #include "ab8500-codec.h"
61 /* Nr of FIR/IIR-coeff banks in ANC-block */
82 static const char * const enum_sid_state[] = {
93 static const char * const enum_anc_state[] = {
[all …]
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| /kernel/linux/linux-5.10/drivers/media/platform/davinci/ |
| D | vpif.h | 4 * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
137 static inline void vpif_set_bit(u32 reg, u32 bit) in vpif_set_bit()
142 static inline void vpif_clr_bit(u32 reg, u32 bit) in vpif_clr_bit()
153 ((((0xFFFFFFFF) << (32 - bits)) >> (32 - bits)) << pos)
191 /* bit position of clock and channel enable in vpif_chn_ctrl register */
270 /* inline function to enable/disable channel0 */
271 static inline void enable_channel0(int enable) in enable_channel0() argument
273 if (enable) in enable_channel0()
279 /* inline function to enable/disable channel1 */
280 static inline void enable_channel1(int enable) in enable_channel1() argument
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| /kernel/linux/linux-4.19/drivers/media/platform/davinci/ |
| D | vpif.h | 4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
137 static inline void vpif_set_bit(u32 reg, u32 bit) in vpif_set_bit()
142 static inline void vpif_clr_bit(u32 reg, u32 bit) in vpif_clr_bit()
153 ((((0xFFFFFFFF) << (32 - bits)) >> (32 - bits)) << pos)
191 /* bit position of clock and channel enable in vpif_chn_ctrl register */
270 /* inline function to enable/disable channel0 */
271 static inline void enable_channel0(int enable) in enable_channel0() argument
273 if (enable) in enable_channel0()
279 /* inline function to enable/disable channel1 */
280 static inline void enable_channel1(int enable) in enable_channel1() argument
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| D | intel_fifo_underrun.c | 54 static bool ivb_can_enable_err_int(struct drm_device *dev) in ivb_can_enable_err_int()
60 lockdep_assert_held(&dev_priv->irq_lock); in ivb_can_enable_err_int()
65 if (crtc->cpu_fifo_underrun_disabled) in ivb_can_enable_err_int()
72 static bool cpt_can_enable_serr_int(struct drm_device *dev) in cpt_can_enable_serr_int()
78 lockdep_assert_held(&dev_priv->irq_lock); in cpt_can_enable_serr_int()
83 if (crtc->pch_fifo_underrun_disabled) in cpt_can_enable_serr_int()
90 static void i9xx_check_fifo_underruns(struct intel_crtc *crtc) in i9xx_check_fifo_underruns()
92 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_check_fifo_underruns()
93 i915_reg_t reg = PIPESTAT(crtc->pipe); in i9xx_check_fifo_underruns()
96 lockdep_assert_held(&dev_priv->irq_lock); in i9xx_check_fifo_underruns()
[all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/i915/ |
| D | intel_fifo_underrun.c | 51 static bool ivb_can_enable_err_int(struct drm_device *dev) in ivb_can_enable_err_int()
57 lockdep_assert_held(&dev_priv->irq_lock); in ivb_can_enable_err_int()
62 if (crtc->cpu_fifo_underrun_disabled) in ivb_can_enable_err_int()
69 static bool cpt_can_enable_serr_int(struct drm_device *dev) in cpt_can_enable_serr_int()
75 lockdep_assert_held(&dev_priv->irq_lock); in cpt_can_enable_serr_int()
80 if (crtc->pch_fifo_underrun_disabled) in cpt_can_enable_serr_int()
87 static void i9xx_check_fifo_underruns(struct intel_crtc *crtc) in i9xx_check_fifo_underruns()
89 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_check_fifo_underruns()
90 i915_reg_t reg = PIPESTAT(crtc->pipe); in i9xx_check_fifo_underruns()
93 lockdep_assert_held(&dev_priv->irq_lock); in i9xx_check_fifo_underruns()
[all …]
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| /kernel/linux/linux-5.10/drivers/media/rc/ |
| D | rc-loopback.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Loopback driver for rc-core,
8 * which is useful for (scripted) debugging of rc-core without
16 #include <media/rc-core.h>
18 #define DRIVER_NAME "rc-loopback"
23 static bool debug;
37 static struct loopback_dev loopdev;
39 static int loop_set_tx_mask(struct rc_dev *dev, u32 mask) in loop_set_tx_mask()
41 struct loopback_dev *lodev = dev->priv; in loop_set_tx_mask()
49 lodev->txmask = mask; in loop_set_tx_mask()
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| /kernel/linux/linux-5.10/drivers/acpi/ |
| D | osi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * osi.c - _OSI implementation
27 bool enable; member
30 static struct acpi_osi_config {
40 static struct acpi_osi_config osi_config;
41 static struct acpi_osi_entry
48 * Linux-Dell-Video is used by BIOS to disable RTD3 for NVidia graphics
55 {"Linux-Dell-Video", true},
57 * Linux-Lenovo-NV-HDMI-Audio is used by BIOS to power on NVidia's HDMI
58 * audio device which is turned off for power-saving in Windows OS.
[all …]
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