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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/
Dst,stm32-ltdc.txt1 * STMicroelectronics STM32 lcd-tft display controller
3 - ltdc: lcd-tft display controller host
5 - compatible: "st,stm32-ltdc"
6 - reg: Physical base address of the IP registers and length of memory mapped region.
7 - clocks: A list of phandle + clock-specifier pairs, one for each
8 entry in 'clock-names'.
9 - clock-names: A list of clock names. For ltdc it should contain:
10 - "lcd" for the clock feeding the output pixel clock & IP clock.
11 - resets: reset to be used by the device (defined by use of RCC macro).
13 - Video port for DPI RGB output: ltdc has one video port with up to 2
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/
Dst,stm32-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DSI host controller
10 - Philippe Cornu <philippe.cornu@st.com>
11 - Yannick Fertre <yannick.fertre@st.com>
14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
17 - $ref: dsi-controller.yaml#
21 const: st,stm32-dsi
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Dst,stm32-ltdc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32-ltdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 lcd-tft display controller
10 - Philippe Cornu <philippe.cornu@st.com>
11 - Yannick Fertre <yannick.fertre@st.com>
15 const: st,stm32-ltdc
22 - description: events interrupt line.
23 - description: errors interrupt line.
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32f469.dtsi1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright (C) STMicroelectronics 2017 - All Rights Reserved */
8 dsi: dsi@40016c00 { label
9 compatible = "st,stm32-dsi";
11 resets = <&rcc STM32F4_APB2_RESET(DSI)>;
12 reset-names = "apb";
14 clock-names = "pclk", "ref";
Dstm32mp157.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
16 clock-names = "bus" ,"core";
20 dsi: dsi@5a000000 { label
21 compatible = "st,stm32-dsi";
24 clock-names = "pclk", "ref", "px_clk";
26 reset-names = "apb";
27 #address-cells = <1>;
28 #size-cells = <0>;
32 #address-cells = <1>;
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Dstm32f469-disco.dts2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f469-pinctrl.dtsi"
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
55 model = "STMicroelectronics STM32F469i-DISCO board";
56 compatible = "st,stm32f469i-disco", "st,stm32f469";
60 stdout-path = "serial0:115200n8";
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/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dstm32f469.dtsi1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright (C) STMicroelectronics 2017 - All Rights Reserved */
8 dsi: dsi@40016c00 { label
9 compatible = "st,stm32-dsi";
12 resets = <&rcc STM32F4_APB2_RESET(DSI)>;
13 reset-names = "apb";
15 clock-names = "pclk", "ref";
Dstm32mp157c.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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Dstm32f469-disco.dts2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f469-pinctrl.dtsi"
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
55 model = "STMicroelectronics STM32F469i-DISCO board";
56 compatible = "st,stm32f469i-disco", "st,stm32f469";
60 stdout-path = "serial0:115200n8";
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/kernel/linux/linux-4.19/drivers/gpu/drm/stm/
Ddw_mipi_dsi-stm.c1 // SPDX-License-Identifier: GPL-2.0
20 /* DSI digital registers & bit definitions */
24 /* DSI wrapper registers & bit definitions */
27 #define WCFGR_DSIM BIT(0) /* DSI Mode */
31 #define WCR_DSIEN BIT(3) /* DSI ENable */
55 /* dsi color format coding according to the datasheet */
75 struct dw_mipi_dsi *dsi; member
81 static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val) in dsi_write() argument
83 writel(val, dsi->base + reg); in dsi_write()
86 static inline u32 dsi_read(struct dw_mipi_dsi_stm *dsi, u32 reg) in dsi_read() argument
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DKconfig12 Enable support for the on-chip display controller on
13 STMicroelectronics STM32 MCUs.
15 will be called stm-drm.
18 tristate "STMicroelectronics specific extensions for Synopsys MIPI DSI"
22 Choose this option for MIPI DSI support on STMicroelectronics SoC.
/kernel/linux/linux-5.10/drivers/gpu/drm/stm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 Enable support for the on-chip display controller on
14 STMicroelectronics STM32 MCUs.
16 will be called stm-drm.
19 tristate "STMicroelectronics specific extensions for Synopsys MIPI DSI"
23 Choose this option for MIPI DSI support on STMicroelectronics SoC.
Ddw_mipi_dsi-stm.c1 // SPDX-License-Identifier: GPL-2.0
25 /* DSI digital registers & bit definitions */
29 /* DSI wrapper registers & bit definitions */
32 #define WCFGR_DSIM BIT(0) /* DSI Mode */
36 #define WCR_DSIEN BIT(3) /* DSI ENable */
60 /* dsi color format coding according to the datasheet */
80 struct dw_mipi_dsi *dsi; member
87 static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val) in dsi_write() argument
89 writel(val, dsi->base + reg); in dsi_write()
92 static inline u32 dsi_read(struct dw_mipi_dsi_stm *dsi, u32 reg) in dsi_read() argument
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/kernel/linux/linux-4.19/Documentation/arm/stm32/
Dstm32f769-overview.rst5 ------------
7 The STM32F769 is a Cortex-M7 MCU aimed at various applications.
10 - Cortex-M7 core running up to @216MHz
11 - 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM)
12 - FMC controller to connect SDRAM, NOR and NAND memories
13 - Dual mode QSPI
14 - SD/MMC/SDIO support*2
15 - Ethernet controller
16 - USB OTFG FS & HS controllers
17 - I2C*4, SPI*6, CAN*3 busses support
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/kernel/linux/linux-5.10/Documentation/arm/stm32/
Dstm32f769-overview.rst6 ------------
8 The STM32F769 is a Cortex-M7 MCU aimed at various applications.
11 - Cortex-M7 core running up to @216MHz
12 - 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM)
13 - FMC controller to connect SDRAM, NOR and NAND memories
14 - Dual mode QSPI
15 - SD/MMC/SDIO support*2
16 - Ethernet controller
17 - USB OTFG FS & HS controllers
18 - I2C*4, SPI*6, CAN*3 busses support
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/kernel/linux/linux-4.19/drivers/clk/
Dclk-stm32mp1.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/clk-provider.h>
18 #include <dt-bindings/clock/stm32mp1-clks.h>
160 "ck_hse", "pll4_r", "clk-hse-div2"
372 /* STM32 Composite clock */
385 struct gate_cfg *gate_cfg = cfg->cfg; in _clk_hw_register_gate()
388 cfg->name, in _clk_hw_register_gate()
389 cfg->parent_name, in _clk_hw_register_gate()
390 cfg->flags, in _clk_hw_register_gate()
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/kernel/linux/linux-5.10/drivers/clk/
Dclk-stm32mp1.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/clk-provider.h>
18 #include <dt-bindings/clock/stm32mp1-clks.h>
160 "ck_hse", "pll4_r", "clk-hse-div2"
372 /* STM32 Composite clock */
385 struct gate_cfg *gate_cfg = cfg->cfg; in _clk_hw_register_gate()
388 cfg->name, in _clk_hw_register_gate()
389 cfg->parent_name, in _clk_hw_register_gate()
390 cfg->flags, in _clk_hw_register_gate()
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/kernel/linux/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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/kernel/linux/patches/linux-4.19/hi3516dv300_patch/
Dhi3516dv300.patch1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
3 --- a/arch/arm/Kconfig
5 @@ -330,7 +330,7 @@ config ARCH_MULTIPLATFORM
9 - select AUTO_ZRELADDR
14 @@ -751,6 +751,8 @@ source "arch/arm/mach-highbank/Kconfig"
16 source "arch/arm/mach-hisi/Kconfig"
18 +source "arch/arm/mach-hibvt/Kconfig"
20 source "arch/arm/mach-imx/Kconfig"
22 source "arch/arm/mach-integrator/Kconfig"
23 diff --git a/arch/arm/Makefile b/arch/arm/Makefile
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