Searched +full:stm32 +full:- +full:rng (Results 1 – 18 of 18) sorted by relevance
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/rng/ |
| D | st,stm32-rng.txt | 1 STMicroelectronics STM32 HW RNG 4 The STM32 hardware random number generator is a simple fixed purpose IP and 9 - compatible : Should be "st,stm32-rng" 10 - reg : Should be register base and length as documented in the datasheet 11 - interrupts : The designated IRQ line for the RNG 12 - clocks : The clock needed to enable the RNG 15 - resets : The reset to properly start RNG 16 - clock-error-detect : Enable the clock detection management 20 rng: rng@50060800 { 21 compatible = "st,stm32-rng";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/rng/ |
| D | st,stm32-rng.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/rng/st,stm32-rng.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 RNG bindings 10 The STM32 hardware random number generator is a simple fixed purpose 14 - Lionel Debieve <lionel.debieve@st.com> 18 const: st,stm32-rng 29 clock-error-detect: 33 - compatible [all …]
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| /kernel/linux/linux-5.10/drivers/char/hw_random/ |
| D | stm32-rng.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 31 struct hwrng rng; member 38 static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait) in stm32_rng_read() argument 41 container_of(rng, struct stm32_rng_private, rng); in stm32_rng_read() 45 pm_runtime_get_sync((struct device *) priv->rng.priv); in stm32_rng_read() 48 sr = readl_relaxed(priv->base + RNG_SR); in stm32_rng_read() 50 /* care of initial delay time when enabling rng */ in stm32_rng_read() 52 retval = readl_relaxed_poll_timeout_atomic(priv->base in stm32_rng_read() 57 dev_err((struct device *)priv->rng.priv, in stm32_rng_read() 64 "bad RNG status - %x\n", sr)) in stm32_rng_read() [all …]
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # Hardware Random Number Generator (RNG) configuration 13 module will be called rng-core. This provides a device 28 This driver provides kernel-side support for a generic Random 31 the default FPGA bitstream on the TS-7800 has such functionality. 34 module will be called timeriomem-rng. 43 This driver provides kernel-side support for the Random Number 44 Generator hardware found on Intel i8xx-based motherboards. 47 module will be called intel-rng. 56 This driver provides kernel-side support for the Random Number [all …]
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 # Makefile for HW Random Number Generator (RNG) device drivers. 6 obj-$(CONFIG_HW_RANDOM) += rng-core.o 7 rng-core-y := core.o 8 obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o 9 obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o 10 obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o 11 obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o 12 obj-$(CONFIG_HW_RANDOM_BA431) += ba431-rng.o 13 obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o [all …]
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| /kernel/linux/linux-4.19/drivers/char/hw_random/ |
| D | stm32-rng.c | 40 struct hwrng rng; member 47 static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait) in stm32_rng_read() argument 50 container_of(rng, struct stm32_rng_private, rng); in stm32_rng_read() 54 pm_runtime_get_sync((struct device *) priv->rng.priv); in stm32_rng_read() 57 sr = readl_relaxed(priv->base + RNG_SR); in stm32_rng_read() 59 /* care of initial delay time when enabling rng */ in stm32_rng_read() 61 retval = readl_relaxed_poll_timeout_atomic(priv->base in stm32_rng_read() 66 dev_err((struct device *)priv->rng.priv, in stm32_rng_read() 73 "bad RNG status - %x\n", sr)) in stm32_rng_read() 74 writel_relaxed(0, priv->base + RNG_SR); in stm32_rng_read() [all …]
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| D | Kconfig | 2 # Hardware Random Number Generator (RNG) configuration 8 ---help--- 12 module will be called rng-core. This provides a device 26 ---help--- 27 This driver provides kernel-side support for a generic Random 30 the default FPGA bitstream on the TS-7800 has such functionality. 33 module will be called timeriomem-rng. 41 ---help--- 42 This driver provides kernel-side support for the Random Number 43 Generator hardware found on Intel i8xx-based motherboards. [all …]
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 # Makefile for HW Random Number Generator (RNG) device drivers. 6 obj-$(CONFIG_HW_RANDOM) += rng-core.o 7 rng-core-y := core.o 8 obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o 9 obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o 10 obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o 11 obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o 12 obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o 13 obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o [all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | stm32f429.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 49 #include "armv7-m.dtsi" 50 #include <dt-bindings/clock/stm32fx-clock.h> 51 #include <dt-bindings/mfd/stm32f4-rcc.h> 55 clk_hse: clk-hse { 56 #clock-cells = <0>; 57 compatible = "fixed-clock"; 58 clock-frequency = <0>; [all …]
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| D | stm32mp157c.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | stm32f429.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 48 #include "armv7-m.dtsi" 49 #include <dt-bindings/clock/stm32fx-clock.h> 50 #include <dt-bindings/mfd/stm32f4-rcc.h> 53 #address-cells = <1>; 54 #size-cells = <1>; 57 clk_hse: clk-hse { 58 #clock-cells = <0>; [all …]
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| D | stm32mp151.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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| /kernel/linux/linux-4.19/drivers/crypto/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_CRYPTO_DEV_ATMEL_AES) += atmel-aes.o 3 obj-$(CONFIG_CRYPTO_DEV_ATMEL_SHA) += atmel-sha.o 4 obj-$(CONFIG_CRYPTO_DEV_ATMEL_TDES) += atmel-tdes.o 5 obj-$(CONFIG_CRYPTO_DEV_ATMEL_ECC) += atmel-ecc.o 6 obj-$(CONFIG_CRYPTO_DEV_CAVIUM_ZIP) += cavium/ 7 obj-$(CONFIG_CRYPTO_DEV_CCP) += ccp/ 8 obj-$(CONFIG_CRYPTO_DEV_CCREE) += ccree/ 9 obj-$(CONFIG_CRYPTO_DEV_CHELSIO) += chelsio/ 10 obj-$(CONFIG_CRYPTO_DEV_CPT) += cavium/cpt/ [all …]
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| D | Kconfig | 5 ---help--- 36 called padlock-aes. 50 called padlock-sha. 58 Say 'Y' here to use the AMD Geode LX processor on-board AES 62 will be called geode-aes. 71 + PCI-X Cryptographic Coprocessor (PCIXCC) 112 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). 122 SHA256 secure hash standard (DFIPS 180-2). 144 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). 156 AES cipher algorithms (FIPS-197). [all …]
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| /kernel/linux/linux-5.10/drivers/crypto/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_CRYPTO_DEV_ALLWINNER) += allwinner/ 3 obj-$(CONFIG_CRYPTO_DEV_ATMEL_AES) += atmel-aes.o 4 obj-$(CONFIG_CRYPTO_DEV_ATMEL_SHA) += atmel-sha.o 5 obj-$(CONFIG_CRYPTO_DEV_ATMEL_TDES) += atmel-tdes.o 6 obj-$(CONFIG_CRYPTO_DEV_ATMEL_I2C) += atmel-i2c.o 7 obj-$(CONFIG_CRYPTO_DEV_ATMEL_ECC) += atmel-ecc.o 8 obj-$(CONFIG_CRYPTO_DEV_ATMEL_SHA204A) += atmel-sha204a.o 9 obj-$(CONFIG_CRYPTO_DEV_CAVIUM_ZIP) += cavium/ 10 obj-$(CONFIG_CRYPTO_DEV_CCP) += ccp/ [all …]
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 39 called padlock-aes. 53 called padlock-sha. 61 Say 'Y' here to use the AMD Geode LX processor on-board AES 65 will be called geode-aes. 142 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). 152 SHA256 secure hash standard (DFIPS 180-2). 194 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). 206 AES cipher algorithms (FIPS-197). 223 and uses triple-DES to generate secure random numbers like the [all …]
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| /kernel/linux/linux-4.19/ |
| D | MAINTAINERS | 28 'diff -u' to make the patch easy to merge. Be prepared to get your 38 See Documentation/process/coding-style.rst for guidance here. 44 See Documentation/process/submitting-patches.rst for details. 55 include a Signed-off-by: line. The current version of this 57 Documentation/process/submitting-patches.rst. 68 that the bug would present a short-term risk to other users if it 84 W: Web-page with status/info 85 B: URI for where to file bugs. A web-page with detailed bug 109 N: [^a-z]tegra all files whose path contains the word tegra 137 ----------------------------------- [all …]
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| /kernel/linux/linux-5.10/ |
| D | MAINTAINERS | 9 ------------------------- 30 ``diff -u`` to make the patch easy to merge. Be prepared to get your 40 See Documentation/process/coding-style.rst for guidance here. 46 See Documentation/process/submitting-patches.rst for details. 57 include a Signed-off-by: line. The current version of this 59 Documentation/process/submitting-patches.rst. 70 that the bug would present a short-term risk to other users if it 76 Documentation/admin-guide/security-bugs.rst for details. 81 --------------------------------------------------- 97 W: *Web-page* with status/info [all …]
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