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Searched +full:sun4i +full:- +full:a10 +full:- +full:ve +full:- +full:clk (Results 1 – 19 of 19) sorted by relevance

/kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/
Dsunxi.txt1 Device Tree Clock bindings for arch-sunxi
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 - compatible : shall be one of the following:
9 "allwinner,sun4i-a10-osc-clk" - for a gatable oscillator
10 "allwinner,sun4i-a10-pll1-clk" - for the main PLL clock and PLL4
11 "allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31
12 "allwinner,sun8i-a23-pll1-clk" - for the main PLL clock on A23
13 "allwinner,sun4i-a10-pll3-clk" - for the video PLL clock on A10
14 "allwinner,sun9i-a80-pll4-clk" - for the peripheral PLLs on A80
15 "allwinner,sun4i-a10-pll5-clk" - for the PLL5 clock
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-ve-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ve-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Video Engine Clock Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
19 "#reset-cells":
23 const: allwinner,sun4i-a10-ve-clk
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/kernel/linux/linux-4.19/drivers/clk/sunxi/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for sunxi specific clk
6 obj-y += clk-sunxi.o clk-factors.o
7 obj-y += clk-a10-codec.o
8 obj-y += clk-a10-hosc.o
9 obj-y += clk-a10-mod1.o
10 obj-y += clk-a10-pll2.o
11 obj-y += clk-a10-ve.o
12 obj-y += clk-a20-gmac.o
13 obj-y += clk-mod0.o
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Dclk-a10-ve.c2 * Copyright 2015 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
17 #include <linux/clk-provider.h>
20 #include <linux/reset-controller.h>
32 * sunxi_ve_reset... - reset bit in ve clk registers handling
50 spin_lock_irqsave(data->lock, flags); in sunxi_ve_reset_assert()
52 reg = readl(data->reg); in sunxi_ve_reset_assert()
53 writel(reg & ~BIT(SUN4I_VE_RESET), data->reg); in sunxi_ve_reset_assert()
55 spin_unlock_irqrestore(data->lock, flags); in sunxi_ve_reset_assert()
69 spin_lock_irqsave(data->lock, flags); in sunxi_ve_reset_deassert()
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/kernel/linux/linux-5.10/drivers/clk/sunxi/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for sunxi specific clk
6 obj-$(CONFIG_CLK_SUNXI) += clk-factors.o
8 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sunxi.o
9 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a10-codec.o
10 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a10-hosc.o
11 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a10-mod1.o
12 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a10-pll2.o
13 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a10-ve.o
14 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a20-gmac.o
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Dclk-a10-ve.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2015 Chen-Yu Tsai
5 * Chen-Yu Tsai <wens@csie.org>
8 #include <linux/clk-provider.h>
12 #include <linux/reset-controller.h>
24 * sunxi_ve_reset... - reset bit in ve clk registers handling
42 spin_lock_irqsave(data->lock, flags); in sunxi_ve_reset_assert()
44 reg = readl(data->reg); in sunxi_ve_reset_assert()
45 writel(reg & ~BIT(SUN4I_VE_RESET), data->reg); in sunxi_ve_reset_assert()
47 spin_unlock_irqrestore(data->lock, flags); in sunxi_ve_reset_assert()
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsun5i.dtsi2 * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun5i-ccu.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
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Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
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Dsun7i-a20.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
47 #include <dt-bindings/dma/sun4i-a10.h>
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
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/kernel/linux/linux-4.19/drivers/clk/sunxi-ng/
Dccu-sun4i-a10.c16 #include <linux/clk-provider.h>
33 #include "ccu-sun4i-a10.h"
43 .hw.init = CLK_HW_INIT("pll-core",
55 * With sigma-delta modulation for fractional-N on the audio PLL,
78 .hw.init = CLK_HW_INIT("pll-audio-base",
96 .hw.init = CLK_HW_INIT("pll-video0",
111 .hw.init = CLK_HW_INIT("pll-ve",
124 .hw.init = CLK_HW_INIT("pll-ve",
137 .hw.init = CLK_HW_INIT("pll-ddr-base",
144 static SUNXI_CCU_M(pll_ddr_clk, "pll-ddr", "pll-ddr-base", 0x020, 0, 2,
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/kernel/linux/linux-5.10/drivers/clk/sunxi-ng/
Dccu-sun4i-a10.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
26 #include "ccu-sun4i-a10.h"
36 .hw.init = CLK_HW_INIT("pll-core",
48 * With sigma-delta modulation for fractional-N on the audio PLL,
71 .hw.init = CLK_HW_INIT("pll-audio-base",
89 .hw.init = CLK_HW_INIT("pll-video0",
104 .hw.init = CLK_HW_INIT("pll-ve",
117 .hw.init = CLK_HW_INIT("pll-ve",
130 .hw.init = CLK_HW_INIT("pll-ddr-base",
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/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
Dsun4i_tcon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
47 drm_connector_list_iter_begin(encoder->dev, &iter); in sun4i_tcon_get_connector()
49 if (connector->encoder == encoder) { in sun4i_tcon_get_connector()
65 return -EINVAL; in sun4i_tcon_get_pixel_depth()
67 info = &connector->display_info; in sun4i_tcon_get_pixel_depth()
68 if (info->num_bus_formats != 1) in sun4i_tcon_get_pixel_depth()
69 return -EINVAL; in sun4i_tcon_get_pixel_depth()
71 switch (info->bus_formats[0]) { in sun4i_tcon_get_pixel_depth()
80 return -EINVAL; in sun4i_tcon_get_pixel_depth()
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/kernel/linux/linux-4.19/drivers/gpu/drm/sun4i/
Dsun4i_tcon.c5 * Maxime Ripard <maxime.ripard@free-electrons.com>
45 drm_connector_list_iter_begin(encoder->dev, &iter); in sun4i_tcon_get_connector()
47 if (connector->encoder == encoder) { in sun4i_tcon_get_connector()
63 return -EINVAL; in sun4i_tcon_get_pixel_depth()
65 info = &connector->display_info; in sun4i_tcon_get_pixel_depth()
66 if (info->num_bus_formats != 1) in sun4i_tcon_get_pixel_depth()
67 return -EINVAL; in sun4i_tcon_get_pixel_depth()
69 switch (info->bus_formats[0]) { in sun4i_tcon_get_pixel_depth()
78 return -EINVAL; in sun4i_tcon_get_pixel_depth()
84 struct clk *clk; in sun4i_tcon_channel_set_status() local
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/kernel/linux/linux-5.10/drivers/phy/allwinner/
Dphy-sun4i-usb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Allwinner sun4i USB phy driver
5 * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com>
15 #include <linux/clk.h>
18 #include <linux/extcon-provider.h>
30 #include <linux/phy/phy-sun4i-usb.h>
135 struct clk *clk; member
136 struct clk *clk2;
157 container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
165 iscr = readl(data->base + REG_ISCR); in sun4i_usb_phy0_update_iscr()
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/kernel/linux/linux-4.19/drivers/phy/allwinner/
Dphy-sun4i-usb.c2 * Allwinner sun4i USB phy driver
4 * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com>
24 #include <linux/clk.h>
27 #include <linux/extcon-provider.h>
38 #include <linux/phy/phy-sun4i-usb.h>
142 struct clk *clk; member
143 struct clk *clk2;
164 container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
172 iscr = readl(data->base + REG_ISCR); in sun4i_usb_phy0_update_iscr()
175 writel(iscr, data->base + REG_ISCR); in sun4i_usb_phy0_update_iscr()
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/kernel/linux/linux-5.10/drivers/dma/
Dsun4i-dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk.h>
19 #include "virt-dma.h"
74 #define SUN4I_DDMA_PARA_DST_DATA_BLK_SIZE(n) (((n) - 1) << 24)
75 #define SUN4I_DDMA_PARA_DST_WAIT_CYCLES(n) (((n) - 1) << 16)
76 #define SUN4I_DDMA_PARA_SRC_DATA_BLK_SIZE(n) (((n) - 1) << 8)
77 #define SUN4I_DDMA_PARA_SRC_WAIT_CYCLES(n) (((n) - 1) << 0)
112 #define SUN4I_NDMA_NR_MAX_VCHANS (29 * 2 - 1)
167 struct clk *clk; member
189 return &chan->dev->device; in chan2dev()
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/kernel/linux/linux-4.19/drivers/dma/
Dsun4i-dma.c13 #include <linux/clk.h>
23 #include "virt-dma.h"
78 #define SUN4I_DDMA_PARA_DST_DATA_BLK_SIZE(n) (((n) - 1) << 24)
79 #define SUN4I_DDMA_PARA_DST_WAIT_CYCLES(n) (((n) - 1) << 16)
80 #define SUN4I_DDMA_PARA_SRC_DATA_BLK_SIZE(n) (((n) - 1) << 8)
81 #define SUN4I_DDMA_PARA_SRC_WAIT_CYCLES(n) (((n) - 1) << 0)
116 #define SUN4I_NDMA_NR_MAX_VCHANS (29 * 2 - 1)
171 struct clk *clk; member
193 return &chan->dev->device; in chan2dev()
199 return -EINVAL; in convert_burst()
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/kernel/linux/linux-5.10/drivers/mmc/host/
Dsunxi-mmc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * (C) Copyright 2007-2011 Reuuimlla Technology Co., Ltd.
5 * (C) Copyright 2007-2011 Aaron Maoye <leafy.myeh@reuuimllatech.com>
6 * (C) Copyright 2013-2014 O2S GmbH <www.o2s.ch>
7 * (C) Copyright 2013-2014 David Lanzendörfer <david.lanzendoerfer@o2s.ch>
8 * (C) Copyright 2013-2014 Hans de Goede <hdegoede@redhat.com>
12 #include <linux/clk.h>
13 #include <linux/clk/sunxi-ng.h>
16 #include <linux/dma-mapping.h>
27 #include <linux/mmc/slot-gpio.h>
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/kernel/linux/linux-4.19/drivers/mmc/host/
Dsunxi-mmc.c3 * (C) Copyright 2007-2011 Reuuimlla Technology Co., Ltd.
4 * (C) Copyright 2007-2011 Aaron Maoye <leafy.myeh@reuuimllatech.com>
5 * (C) Copyright 2013-2014 O2S GmbH <www.o2s.ch>
6 * (C) Copyright 2013-2014 David Lanzendörfer <david.lanzendoerfer@o2s.ch>
7 * (C) Copyright 2013-2014 Hans de Goede <hdegoede@redhat.com>
16 #include <linux/clk.h>
17 #include <linux/clk/sunxi-ng.h>
20 #include <linux/dma-mapping.h>
32 #include <linux/mmc/slot-gpio.h>
83 readl((host)->reg_base + SDXC_##reg)
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