| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | tda7419.c | 1 // SPDX-License-Identifier: GPL-2.0-only
136 if (tvc->reg == tvc->rreg) in tda7419_vol_is_stereo()
146 (struct tda7419_vol_control *)kcontrol->private_value; in tda7419_vol_info()
148 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in tda7419_vol_info()
149 uinfo->count = tda7419_vol_is_stereo(tvc) ? 2 : 1; in tda7419_vol_info()
150 uinfo->value.integer.min = tvc->min; in tda7419_vol_info()
151 uinfo->value.integer.max = tvc->max; in tda7419_vol_info()
163 val = 0 - val; in tda7419_vol_get_value()
166 val = val - thresh; in tda7419_vol_get_value()
168 val = thresh - val; in tda7419_vol_get_value()
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/opp/ |
| D | opp.txt | 2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
21 freq: clock frequency in kHz
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
30 operating-points = <
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| /kernel/linux/linux-4.19/sound/soc/codecs/ |
| D | tda7419.c | 144 if (tvc->reg == tvc->rreg) in tda7419_vol_is_stereo()
154 (struct tda7419_vol_control *)kcontrol->private_value; in tda7419_vol_info()
156 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in tda7419_vol_info()
157 uinfo->count = tda7419_vol_is_stereo(tvc) ? 2 : 1; in tda7419_vol_info()
158 uinfo->value.integer.min = tvc->min; in tda7419_vol_info()
159 uinfo->value.integer.max = tvc->max; in tda7419_vol_info()
171 val = 0 - val; in tda7419_vol_get_value()
174 val = val - thresh; in tda7419_vol_get_value()
176 val = thresh - val; in tda7419_vol_get_value()
190 (struct tda7419_vol_control *)kcontrol->private_value; in tda7419_vol_get()
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| /kernel/linux/linux-4.19/include/linux/soundwire/ |
| D | sdw.h | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-17 Intel Corporation.
45 * enum sdw_slave_status - Slave status
59 * enum sdw_command_response - Command response as defined by SDW spec
111 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
122 * enum sdw_dpn_type - Data port types
137 * enum sdw_clk_stop_mode - Clock Stop modes
140 * @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
149 * struct sdw_dp0_prop - DP0 properties
159 * @device_interrupts: If implementation-defined interrupts are supported
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/opp/ |
| D | opp.txt | 2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
21 freq: clock frequency in kHz
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
30 operating-points = <
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| /kernel/linux/linux-4.19/init/ |
| D | calibrate.c | 1 // SPDX-License-Identifier: GPL-2.0
29 * Also, this code tries to handle non-maskable asynchronous events
32 #define DELAY_CALIBRATION_TICKS ((HZ < 100) ? 1 : (HZ/100))
44 int max = -1; /* index of measured_times with max/min values or not set */ in calibrate_delay_direct()
45 int min = -1; in calibrate_delay_direct()
55 * will not do. As we don't really know whether jiffy switch in calibrate_delay_direct()
60 * 1. pre_start <- When we are sure that jiffy switch hasn't happened in calibrate_delay_direct()
61 * 2. check jiffy switch in calibrate_delay_direct()
62 * 3. start <- timer value before or after jiffy switch in calibrate_delay_direct()
63 * 4. post_start <- When we are sure that jiffy switch has happened in calibrate_delay_direct()
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| /kernel/linux/linux-5.10/init/ |
| D | calibrate.c | 1 // SPDX-License-Identifier: GPL-2.0
29 * Also, this code tries to handle non-maskable asynchronous events
32 #define DELAY_CALIBRATION_TICKS ((HZ < 100) ? 1 : (HZ/100))
44 int max = -1; /* index of measured_times with max/min values or not set */ in calibrate_delay_direct()
45 int min = -1; in calibrate_delay_direct()
55 * will not do. As we don't really know whether jiffy switch in calibrate_delay_direct()
60 * 1. pre_start <- When we are sure that jiffy switch hasn't happened in calibrate_delay_direct()
61 * 2. check jiffy switch in calibrate_delay_direct()
62 * 3. start <- timer value before or after jiffy switch in calibrate_delay_direct()
63 * 4. post_start <- When we are sure that jiffy switch has happened in calibrate_delay_direct()
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| /kernel/linux/linux-5.10/drivers/clk/analogbits/ |
| D | wrpll-cln28hpc.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018-2019 SiFive, Inc.
16 * pre-determined set of performance points.
19 * - Analog Bits "Wide Range PLL Datasheet", version 2015.10.01
20 * - SiFive FU540-C000 Manual v1p0, Chapter 7 "Clocking and Reset"
21 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf
28 #include <linux/clk/analogbits-wrpll-cln28hpc.h>
30 /* MIN_INPUT_FREQ: minimum input clock frequency, in Hz (Fref_min) */
33 /* MAX_INPUT_FREQ: maximum input clock frequency, in Hz (Fref_max) */
36 /* MIN_POST_DIVIDE_REF_FREQ: minimum post-divider reference frequency, in Hz */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | qcom-rpm.txt | 8 - compatible:
12 "qcom,rpm-apq8064"
13 "qcom,rpm-msm8660"
14 "qcom,rpm-msm8960"
15 "qcom,rpm-ipq8064"
16 "qcom,rpm-mdm9615"
18 - reg:
20 Value type: <prop-encoded-array>
23 - interrupts:
25 Value type: <prop-encoded-array>
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mfd/ |
| D | qcom-rpm.txt | 8 - compatible:
12 "qcom,rpm-apq8064"
13 "qcom,rpm-msm8660"
14 "qcom,rpm-msm8960"
15 "qcom,rpm-ipq8064"
16 "qcom,rpm-mdm9615"
18 - reg:
20 Value type: <prop-encoded-array>
23 - interrupts:
25 Value type: <prop-encoded-array>
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| /kernel/linux/linux-5.10/include/linux/ |
| D | timex.h | 28 * Added defines for hybrid phase/frequency-lock loop.
32 * defines for PPS phase-lock loop.
46 * 1995-08-13 Torsten Duwe
47 * kernel PLL updated to 1994-12-13 specs (rfc-1589)
48 * 1997-08-30 Ulrich Windl
50 * 2004-08-12 Christoph Lameter
58 #define ADJ_ADJTIME 0x8000 /* switch between adjtime/adjtimex modes */
59 #define ADJ_OFFSET_SINGLESHOT 0x0001 /* old-fashioned adjtime */
60 #define ADJ_OFFSET_READONLY 0x2000 /* read-only adjtime */
71 * when an interrupt takes places versus a high speed, fine-grained
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| /kernel/linux/linux-4.19/include/linux/ |
| D | timex.h | 28 * Added defines for hybrid phase/frequency-lock loop.
32 * defines for PPS phase-lock loop.
46 * 1995-08-13 Torsten Duwe
47 * kernel PLL updated to 1994-12-13 specs (rfc-1589)
48 * 1997-08-30 Ulrich Windl
50 * 2004-08-12 Christoph Lameter
58 #define ADJ_ADJTIME 0x8000 /* switch between adjtime/adjtimex modes */
59 #define ADJ_OFFSET_SINGLESHOT 0x0001 /* old-fashioned adjtime */
60 #define ADJ_OFFSET_READONLY 0x2000 /* read-only adjtime */
71 * when an interrupt takes places versus a high speed, fine-grained
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| /kernel/linux/linux-5.10/include/linux/soundwire/ |
| D | sdw.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
71 * enum sdw_slave_status - Slave status
89 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
90 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
100 * enum sdw_command_response - Command response as defined by SDW spec
180 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
191 * enum sdw_dpn_type - Data port types
206 * enum sdw_clk_stop_mode - Clock Stop modes
209 * @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
[all …]
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| /kernel/linux/linux-5.10/drivers/iio/pressure/ |
| D | zpa2326.c | 1 // SPDX-License-Identifier: GPL-2.0-only
34 * - get device out of low power mode,
35 * - setup hardware sampling period,
36 * - at end of period, upon data ready interrupt: pop pressure samples out of
38 * - when no longer needed, stop sampling process by putting device into
44 * Note that hardware sampling frequency is taken into account only when
70 /* 200 ms should be enough for the longest conversion time in one-shot mode. */
71 #define ZPA2326_CONVERSION_JIFFIES (HZ / 5)
78 * struct zpa2326_frequency - Hardware sampling frequency descriptor
79 * @hz : Frequency in Hertz.
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| /kernel/linux/linux-4.19/drivers/iio/pressure/ |
| D | zpa2326.c | 42 * - get device out of low power mode,
43 * - setup hardware sampling period,
44 * - at end of period, upon data ready interrupt: pop pressure samples out of
46 * - when no longer needed, stop sampling process by putting device into
52 * Note that hardware sampling frequency is taken into account only when
77 /* 200 ms should be enough for the longest conversion time in one-shot mode. */
78 #define ZPA2326_CONVERSION_JIFFIES (HZ / 5)
85 * struct zpa2326_frequency - Hardware sampling frequency descriptor
86 * @hz : Frequency in Hertz.
90 int hz; member
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| /kernel/linux/linux-5.10/drivers/clk/hisilicon/ |
| D | clk-hi6220-stub.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
33 /* CPU dynamic frequency scaling */
71 regmap_read(stub_clk->dfs_map, ACPU_DFS_CUR_FREQ, &freq); in hi6220_acpu_get_freq()
80 /* set the frequency in sram */ in hi6220_acpu_set_freq()
81 regmap_write(stub_clk->dfs_map, ACPU_DFS_FREQ_REQ, freq); in hi6220_acpu_set_freq()
89 mbox_send_message(stub_clk->mbox, &data); in hi6220_acpu_set_freq()
99 /* check the constrained frequency */ in hi6220_acpu_round_freq()
100 regmap_read(stub_clk->dfs_map, ACPU_DFS_FLAG, &limit_flag); in hi6220_acpu_round_freq()
102 regmap_read(stub_clk->dfs_map, ACPU_DFS_FREQ_LMT, &limit_freq); in hi6220_acpu_round_freq()
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/i2c/ |
| D | i2c-sunxi-p2wi.txt | 6 - reg : Offset and length of the register set for the device.
7 - compatible : Should one of the following:
8 - "allwinner,sun6i-a31-p2wi"
9 - interrupts : The interrupt line connected to the P2WI peripheral.
10 - clocks : The gate clk connected to the P2WI peripheral.
11 - resets : The reset line connected to the P2WI peripheral.
15 - clock-frequency : Desired P2WI bus clock frequency in Hz. If not set the
16 default frequency is 100kHz
22 - reg : the I2C slave address used during the initialization
23 process to switch from I2C to P2WI mode
[all …]
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| /kernel/linux/linux-5.10/drivers/iio/accel/ |
| D | bma400_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 * - Support for power management
9 * - Support events and interrupts
10 * - Create channel for step count
11 * - Create channel for sensor time
27 * The G-range selection may be one of 2g, 4g, 8, or 16g. The scale may
50 int hz; member
68 switch (reg) { in bma400_is_writable_reg()
101 switch (reg) { in bma400_is_volatile_reg()
147 return &data->orientation; in bma400_accel_get_mount_matrix()
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| /kernel/linux/linux-5.10/sound/pci/hda/ |
| D | hda_beep.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Digital Beep Input Interface for HD-audio codec
18 DIGBEEP_HZ_STEP = 46875, /* 46.875 Hz */
19 DIGBEEP_HZ_MIN = 93750, /* 93.750 Hz */
26 struct hda_codec *codec = beep->codec; in generate_tone()
28 if (tone && !beep->playing) { in generate_tone()
30 if (beep->power_hook) in generate_tone()
31 beep->power_hook(beep, true); in generate_tone()
32 beep->playing = 1; in generate_tone()
34 snd_hda_codec_write(codec, beep->nid, 0, in generate_tone()
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| /kernel/linux/linux-4.19/sound/pci/hda/ |
| D | hda_beep.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Digital Beep Input Interface for HD-audio codec
18 DIGBEEP_HZ_STEP = 46875, /* 46.875 Hz */
19 DIGBEEP_HZ_MIN = 93750, /* 93.750 Hz */
26 struct hda_codec *codec = beep->codec; in generate_tone()
28 if (tone && !beep->playing) { in generate_tone()
30 if (beep->power_hook) in generate_tone()
31 beep->power_hook(beep, true); in generate_tone()
32 beep->playing = 1; in generate_tone()
34 snd_hda_codec_write(codec, beep->nid, 0, in generate_tone()
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| /kernel/linux/linux-4.19/drivers/clk/hisilicon/ |
| D | clk-hi6220-stub.c | 15 #include <linux/clk-provider.h>
37 /* CPU dynamic frequency scaling */
75 regmap_read(stub_clk->dfs_map, ACPU_DFS_CUR_FREQ, &freq); in hi6220_acpu_get_freq()
84 /* set the frequency in sram */ in hi6220_acpu_set_freq()
85 regmap_write(stub_clk->dfs_map, ACPU_DFS_FREQ_REQ, freq); in hi6220_acpu_set_freq()
93 mbox_send_message(stub_clk->mbox, &data); in hi6220_acpu_set_freq()
103 /* check the constrained frequency */ in hi6220_acpu_round_freq()
104 regmap_read(stub_clk->dfs_map, ACPU_DFS_FLAG, &limit_flag); in hi6220_acpu_round_freq()
106 regmap_read(stub_clk->dfs_map, ACPU_DFS_FREQ_LMT, &limit_freq); in hi6220_acpu_round_freq()
108 /* check the supported maximum frequency */ in hi6220_acpu_round_freq()
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| /kernel/linux/linux-5.10/include/media/ |
| D | tuner-types.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
10 * enum param_type - type of the tuner pameters
27 * struct tuner_range - define the frequencies supported by the tuner
29 * @limit: Max frequency supported by that range, in 62.5 kHz
30 * (TV) or 62.5 Hz (Radio), as defined by
32 * @config: Value of the band switch byte (BB) to setup this mode.
43 * #) band switch byte (BB)
54 * struct tuner_params - Parameters to be used to setup the tuner. Those
55 * are used by drivers/media/tuners/tuner-types.c in
57 * the parameters are for tuners based on tda9887 IF-PLL
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| /kernel/linux/linux-4.19/include/media/ |
| D | tuner-types.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
10 * enum param_type - type of the tuner pameters
27 * struct tuner_range - define the frequencies supported by the tuner
29 * @limit: Max frequency supported by that range, in 62.5 kHz
30 * (TV) or 62.5 Hz (Radio), as defined by
32 * @config: Value of the band switch byte (BB) to setup this mode.
43 * #) band switch byte (BB)
54 * struct tuner_params - Parameters to be used to setup the tuner. Those
55 * are used by drivers/media/tuners/tuner-types.c in
57 * the parameters are for tuners based on tda9887 IF-PLL
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/ |
| D | nuvoton,npcm7xx-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 both master and slave mode. Each controller can switch between master and slave
16 - Tali Perry <tali.perry1@gmail.com>
20 const: nuvoton,npcm7xx-i2c
32 clock-frequency:
33 description: Desired I2C bus clock frequency in Hz. If not specified,
34 the default 100 kHz frequency will be used.
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| /kernel/linux/linux-5.10/Documentation/admin-guide/media/ |
| D | vivid.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 Each input can be a webcam, TV capture device, S-Video capture device or an HDMI
14 capture device. Each output can be an S-Video output device or an HDMI output
23 - Support for read()/write(), MMAP, USERPTR and DMABUF streaming I/O.
24 - A large list of test patterns and variations thereof
25 - Working brightness, contrast, saturation and hue controls
26 - Support for the alpha color component
27 - Full colorspace support, including limited/full RGB range
28 - All possible control types are present
29 - Support for various pixel aspect ratios and video aspect ratios
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