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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/mfd/
Dqcom,tcsr.txt5 registers via syscon.
8 - compatible: Should contain:
9 "qcom,tcsr-ipq8064", "syscon" for IPQ8064
10 "qcom,tcsr-apq8064", "syscon" for APQ8064
11 "qcom,tcsr-msm8660", "syscon" for MSM8660
12 "qcom,tcsr-msm8960", "syscon" for MSM8960
13 "qcom,tcsr-msm8974", "syscon" for MSM8974
14 "qcom,tcsr-apq8084", "syscon" for APQ8084
15 "qcom,tcsr-msm8916", "syscon" for MSM8916
16 - reg: Address range for TCSR registers
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dqcom,tcsr.txt5 registers via syscon.
8 - compatible: Should contain:
9 "qcom,tcsr-ipq8064", "syscon" for IPQ8064
10 "qcom,tcsr-apq8064", "syscon" for APQ8064
11 "qcom,tcsr-msm8660", "syscon" for MSM8660
12 "qcom,tcsr-msm8960", "syscon" for MSM8960
13 "qcom,tcsr-msm8974", "syscon" for MSM8974
14 "qcom,tcsr-apq8084", "syscon" for APQ8084
15 "qcom,tcsr-msm8916", "syscon" for MSM8916
16 - reg: Address range for TCSR registers
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/qcom/
Dqcom,gsbi.txt4 representing a serial sub-node device that is mux'd as part of the GSBI
9 - compatible: Should contain "qcom,gsbi-v1.0.0"
10 - cell-index: Should contain the GSBI index
11 - reg: Address range for GSBI registers
12 - clocks: required clock
13 - clock-names: must contain "iface" entry
14 - qcom,mode : indicates MUX value for configuration of the serial interface.
15 Please reference dt-bindings/soc/qcom,gsbi.h for valid mux values.
18 - qcom,crci : indicates CRCI MUX value for QUP CRCI ports. Please reference
19 dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values.
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/soc/qcom/
Dqcom,gsbi.txt4 representing a serial sub-node device that is mux'd as part of the GSBI
9 - compatible: Should contain "qcom,gsbi-v1.0.0"
10 - cell-index: Should contain the GSBI index
11 - reg: Address range for GSBI registers
12 - clocks: required clock
13 - clock-names: must contain "iface" entry
14 - qcom,mode : indicates MUX value for configuration of the serial interface.
15 Please reference dt-bindings/soc/qcom,gsbi.h for valid mux values.
18 - qcom,crci : indicates CRCI MUX value for QUP CRCI ports. Please reference
19 dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values.
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
6 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 enable-method = "qcom,kpss-acc-v1";
[all …]
Dqcom-msm8660.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 enable-method = "qcom,gcc-msm8660";
[all …]
Dqcom-msm8960.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
8 #include <dt-bindings/mfd/qcom-rpm.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <0>;
23 enable-method = "qcom,kpss-acc-v1";
[all …]
Dqcom-mdm9615.dtsi7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
50 #include <dt-bindings/interrupt-controller/arm-gic.h>
51 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
52 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
53 #include <dt-bindings/mfd/qcom-rpm.h>
54 #include <dt-bindings/soc/qcom,gsbi.h>
59 interrupt-parent = <&intc>;
62 #address-cells = <1>;
63 #size-cells = <0>;
[all …]
Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 interrupt-parent = <&intc>;
[all …]
/kernel/linux/linux-5.10/drivers/soc/qcom/
Dqcom_gsbi.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/mfd/syscon.h>
15 #include <dt-bindings/soc/qcom,gsbi.h>
83 { /* ADM 0 - B */
88 { /* ADM 0 - B */
93 { /* ADM 1 - A */
98 { /* ADM 1 - B */
114 struct regmap *tcsr; member
118 { .compatible = "qcom,tcsr-ipq8064", .data = &config_ipq8064},
119 { .compatible = "qcom,tcsr-apq8064", .data = &config_apq8064},
[all …]
/kernel/linux/linux-4.19/drivers/soc/qcom/
Dqcom_gsbi.c22 #include <linux/mfd/syscon.h>
23 #include <dt-bindings/soc/qcom,gsbi.h>
91 { /* ADM 0 - B */
96 { /* ADM 0 - B */
101 { /* ADM 1 - A */
106 { /* ADM 1 - B */
122 struct regmap *tcsr; member
126 { .compatible = "qcom,tcsr-ipq8064", .data = &config_ipq8064},
127 { .compatible = "qcom,tcsr-apq8064", .data = &config_apq8064},
128 { .compatible = "qcom,tcsr-msm8960", .data = &config_msm8960},
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/hwlock/
Dqcom-hwspinlock.txt6 - compatible:
10 "qcom,sfpb-mutex",
11 "qcom,tcsr-mutex"
13 - syscon:
15 Value type: <prop-encoded-array>
17 syscon phandle
18 offset of the hwmutex block within the syscon
21 - #hwlock-cells:
29 tcsr_mutex_block: syscon@fd484000 {
30 compatible = "syscon";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dqcom-msm8660.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
[all …]
Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
6 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <1>;
[all …]
Dqcom-msm8960.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/mfd/qcom-rpm.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
[all …]
Dqcom-mdm9615.dtsi7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
50 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
51 #include <dt-bindings/mfd/qcom-rpm.h>
52 #include <dt-bindings/soc/qcom,gsbi.h>
55 #address-cells = <1>;
56 #size-cells = <1>;
59 interrupt-parent = <&intc>;
[all …]
Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
6 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/soc/qcom,gsbi.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <1>;
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/phy/
Dqcom-qusb2-phy.txt7 - compatible: compatible list, contains
8 "qcom,msm8996-qusb2-phy" for 14nm PHY on msm8996,
9 "qcom,sdm845-qusb2-phy" for 10nm PHY on sdm845.
11 - reg: offset and length of the PHY register set.
12 - #phy-cells: must be 0.
14 - clocks: a list of phandles and clock-specifier pairs,
15 one for each entry in clock-names.
16 - clock-names: must be "cfg_ahb" for phy config clock,
20 - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
21 - vdda-phy-dpdm-supply: Phandle to 3.1V regulator supply to Dp/Dm port signals.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
19 - items:
20 - enum:
21 - qcom,ipq8074-qusb2-phy
22 - qcom,msm8996-qusb2-phy
23 - qcom,msm8998-qusb2-phy
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/
Dqcom,q6v5.txt6 - compatible:
10 "qcom,q6v5-pil",
11 "qcom,ipq8074-wcss-pil"
12 "qcom,msm8916-mss-pil",
13 "qcom,msm8974-mss-pil"
14 "qcom,msm8996-mss-pil"
15 "qcom,msm8998-mss-pil"
16 "qcom,sc7180-mss-pil"
17 "qcom,sdm845-mss-pil"
19 - reg:
[all …]
/kernel/linux/linux-4.19/drivers/phy/qualcomm/
Dphy-qcom-qusb2.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/mfd/syscon.h>
13 #include <linux/nvmem-consumer.h>
23 #include <dt-bindings/phy/phy-qcom-qusb2.h>
93 * if yes, then offset gives index in the reg-layout
111 /* set of registers with offsets different per-PHY */
194 /* offset to PHY_CLK_SCHEME register in TCSR map */
238 "vdda-pll", "vdda-phy-dpdm",
244 * struct qusb2_phy - structure holding qusb2 phy attributes
255 * @tcsr: TCSR syscon register map
[all …]
/kernel/linux/linux-4.19/drivers/hwspinlock/
Dqcom_hwspinlock.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/mfd/syscon.h>
25 struct regmap_field *field = lock->priv; in qcom_hwspinlock_trylock()
42 struct regmap_field *field = lock->priv; in qcom_hwspinlock_unlock()
68 { .compatible = "qcom,sfpb-mutex" },
69 { .compatible = "qcom,tcsr-mutex" },
77 struct device_node *syscon; in qcom_hwspinlock_probe() local
86 syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0); in qcom_hwspinlock_probe()
87 if (!syscon) { in qcom_hwspinlock_probe()
88 dev_err(&pdev->dev, "no syscon property\n"); in qcom_hwspinlock_probe()
[all …]
/kernel/linux/linux-5.10/drivers/phy/qualcomm/
Dphy-qcom-qusb2.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/mfd/syscon.h>
13 #include <linux/nvmem-consumer.h>
23 #include <dt-bindings/phy/phy-qcom-qusb2.h>
105 * if yes, then offset gives index in the reg-layout
123 /* set of registers with offsets different per-PHY */
231 /* offset to PHY_CLK_SCHEME register in TCSR map */
287 "vdda-pll", "vdda-phy-dpdm",
292 /* struct override_param - structure holding qusb2 v2 phy overriding param
301 /*struct override_params - structure holding qusb2 v2 phy overriding params
[all …]
/kernel/linux/linux-5.10/drivers/hwspinlock/
Dqcom_hwspinlock.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/mfd/syscon.h>
24 struct regmap_field *field = lock->priv; in qcom_hwspinlock_trylock()
41 struct regmap_field *field = lock->priv; in qcom_hwspinlock_unlock()
67 { .compatible = "qcom,sfpb-mutex" },
68 { .compatible = "qcom,tcsr-mutex" },
76 struct device_node *syscon; in qcom_hwspinlock_probe_syscon() local
80 syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0); in qcom_hwspinlock_probe_syscon()
81 if (!syscon) in qcom_hwspinlock_probe_syscon()
82 return ERR_PTR(-ENODEV); in qcom_hwspinlock_probe_syscon()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/avs/
Dqcom,cpr.txt10 - compatible:
13 Definition: should be "qcom,qcs404-cpr", "qcom,cpr" for qcs404
15 - reg:
17 Value type: <prop-encoded-array>
20 - interrupts:
22 Value type: <prop-encoded-array>
25 - clocks:
27 Value type: <prop-encoded-array>
30 - clock-names:
35 - vdd-apc-supply:
[all …]

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