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/kernel/linux/linux-5.10/drivers/staging/rtl8192e/
Ddot11d.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
11 u8 channel[32]; member
42 dot11d_info->enabled = false; in dot11d_init()
44 dot11d_info->state = DOT11D_STATE_NONE; in dot11d_init()
45 dot11d_info->country_len = 0; in dot11d_init()
46 memset(dot11d_info->channel_map, 0, MAX_CHANNEL_NUMBER + 1); in dot11d_init()
47 memset(dot11d_info->max_tx_power_list, 0xFF, MAX_CHANNEL_NUMBER + 1); in dot11d_init()
56 ieee->global_domain = false; in dot11d_channel_map()
59 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, in dot11d_channel_map()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mux/
Dadi,adg792a.txt1 Bindings for Analog Devices ADG792A/G Triple 4:1 Multiplexers
4 - compatible : "adi,adg792a" or "adi,adg792g"
5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
8 * Standard mux-controller bindings as described in mux-controller.txt
11 - gpio-controller : if present, #gpio-cells below is required.
12 - #gpio-cells : should be <2>
13 - First cell is the GPO line number, i.e. 0 or 1
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, array of states that the mux controllers will have
32 mux: mux-controller@50 {
[all …]
Dmux-controller.txt11 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
12 0-7 for an 8-way multiplexer, etc.
16 ---------
19 want to use with a property containing a 'mux-ctrl-list':
21 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
22 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
23 mux-ctrl-phandle : phandle to mux controller node
24 mux-ctrl-specifier : array of #mux-control-cells specifying the
27 Mux controller properties should be named "mux-controls". The exact meaning of
29 each consumer. An optional property "mux-control-names" may contain a list of
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/mux/
Dadi,adg792a.txt1 Bindings for Analog Devices ADG792A/G Triple 4:1 Multiplexers
4 - compatible : "adi,adg792a" or "adi,adg792g"
5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
8 * Standard mux-controller bindings as described in mux-controller.txt
11 - gpio-controller : if present, #gpio-cells below is required.
12 - #gpio-cells : should be <2>
13 - First cell is the GPO line number, i.e. 0 or 1
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, array of states that the mux controllers will have
32 mux: mux-controller@50 {
[all …]
Dmux-controller.txt11 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
12 0-7 for an 8-way multiplexer, etc.
16 ---------
19 want to use with a property containing a 'mux-ctrl-list':
21 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
22 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
23 mux-ctrl-phandle : phandle to mux controller node
24 mux-ctrl-specifier : array of #mux-control-cells specifying the
27 Mux controller properties should be named "mux-controls". The exact meaning of
29 each consumer. An optional property "mux-control-names" may contain a list of
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/timer/
Dcadence,ttc-timer.txt1 Cadence TTC - Triple Timer Counter
4 - compatible : Should be "cdns,ttc".
5 - reg : Specifies base physical address and size of the registers.
6 - interrupts : A list of 3 interrupts; one per timer channel.
7 - clocks: phandle to the source clock
10 - timer-width: Bit width of the timer, necessary if not 16.
15 interrupt-parent = <&intc>;
20 timer-width = <32>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/hwmon/
Dti,tmp513.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Eric Tremblay <etremblay@distech-controls.com>
14 The TMP512 (dual-channel) and TMP513 (triple-channel) are system monitors
15 that include remote sensors, a local temperature sensor, and a high-side
17 remote temperatures, on-chip temperatures, and system voltage/power/current
28 - ti,tmp512
29 - ti,tmp513
34 shunt-resistor-micro-ohms:
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/kernel/linux/linux-5.10/drivers/media/rc/keymaps/
Drc-powercolor-real-angel.c1 // SPDX-License-Identifier: GPL-2.0+
2 // powercolor-real-angel.h - Keytable for powercolor_real_angel Remote Controller
4 // keymap imported from ir-keymaps.c
8 #include <media/rc-map.h>
29 { 0x0a, KEY_DIGITS }, /* single, double, triple digit */
30 { 0x29, KEY_PREVIOUS }, /* previous channel */
35 { 0x20, KEY_CHANNELUP }, /* channel up */
36 { 0x21, KEY_CHANNELDOWN }, /* channel down */
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/
Dcdns,ttc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence TTC - Triple Timer Counter
10 - Michal Simek <michal.simek@xilinx.com>
23 A list of 3 interrupts; one per timer channel.
28 timer-width:
34 - compatible
35 - reg
36 - interrupts
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/kernel/linux/linux-5.10/Documentation/hwmon/
Dtmp513.rst1 .. SPDX-License-Identifier: GPL-2.0
22 Eric Tremblay <etremblay@distech-controls.com>
25 -----------
28 The TMP512 (dual-channel) and TMP513 (triple-channel) are system monitors
29 that include remote sensors, a local temperature sensor, and a high-side current
31 temperatures, on-chip temperatures, and system voltage/power/current
35 -40 to + 125 degrees with a resolution of 0.0625 degree C.
37 For hysteresis value, only the first channel is writable. Writing to it
44 **temp[1-4]_input**
46 **temp[1-4]_crit**
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/kernel/linux/linux-5.10/Documentation/userspace-api/media/rc/
Drc-tables.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
30 .. flat-table:: IR default keymapping
31 :header-rows: 0
32 :stub-columns: 0
36 - .. row 1
38 - Key code
40 - Meaning
42 - Key examples on IR
44 - .. row 2
46 - **Numeric keys**
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/kernel/linux/linux-4.19/Documentation/media/uapi/rc/
Drc-tables.rst1 .. -*- coding: utf-8; mode: rst -*-
30 .. flat-table:: IR default keymapping
31 :header-rows: 0
32 :stub-columns: 0
36 - .. row 1
38 - Key code
40 - Meaning
42 - Key examples on IR
44 - .. row 2
46 - **Numeric keys**
[all …]
/kernel/linux/linux-4.19/drivers/net/wireless/intel/iwlwifi/fw/api/
Drs.h8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
68 * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags
78 * enum iwl_tlc_mng_cfg_cw - channel width options
79 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel
80 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel
81 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel
82 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel
94 * enum iwl_tlc_mng_cfg_chains - possible chains
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/fw/api/
Drs.h8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
10 * Copyright(c) 2018 - 2020 Intel Corporation
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2018 - 2020 Intel Corporation
68 * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags
90 * enum iwl_tlc_mng_cfg_cw - channel width options
91 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel
92 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel
93 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel
[all …]
/kernel/linux/linux-4.19/drivers/hwmon/
Dina3221.c2 * INA3221 Triple Current/Voltage Monitor
4 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
18 #include <linux/hwmon-sysfs.h>
90 * struct ina3221_data - device specific information
93 * @shunt_resistors: Array of resistor values per channel
107 ret = regmap_read(ina->regmap, reg, &regval); in ina3221_read_value()
122 unsigned int reg = sd_attr->index; in ina3221_show_bus_voltage()
140 unsigned int reg = sd_attr->index; in ina3221_show_shunt_voltage()
156 unsigned int reg = sd_attr->index; in ina3221_show_current()
157 unsigned int channel = register_channel[reg]; in ina3221_show_current() local
[all …]
/kernel/linux/linux-4.19/drivers/ata/
Dpata_ns87415.c2 * pata_ns87415.c - NS87415 (non PARISC) PATA
39 * ns87415_set_mode - Initialize host controller mode timings
44 * Program the mode registers for this controller, channel and
54 struct pci_dev *dev = to_pci_dev(ap->host->dev); in ns87415_set_mode()
55 int unit = 2 * ap->port_no + adev->devno; in ns87415_set_mode()
63 /* Timing register format is 17 - low nybble read timing with in ns87415_set_mode()
64 the high nybble being 16 - x for recovery time in PCI clocks */ in ns87415_set_mode()
66 ata_timing_compute(adev, adev->pio_mode, &t, T, 0); in ns87415_set_mode()
68 clocking = 17 - clamp_val(t.active, 2, 17); in ns87415_set_mode()
69 clocking |= (16 - clamp_val(t.recover, 1, 16)) << 4; in ns87415_set_mode()
[all …]
/kernel/linux/linux-5.10/drivers/ata/
Dpata_ns87415.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_ns87415.c - NS87415 (and PARISC SUPERIO 87560) PATA
39 * ns87415_set_mode - Initialize host controller mode timings
44 * Program the mode registers for this controller, channel and
54 struct pci_dev *dev = to_pci_dev(ap->host->dev); in ns87415_set_mode()
55 int unit = 2 * ap->port_no + adev->devno; in ns87415_set_mode()
63 /* Timing register format is 17 - low nybble read timing with in ns87415_set_mode()
64 the high nybble being 16 - x for recovery time in PCI clocks */ in ns87415_set_mode()
66 ata_timing_compute(adev, adev->pio_mode, &t, T, 0); in ns87415_set_mode()
68 clocking = 17 - clamp_val(t.active, 2, 17); in ns87415_set_mode()
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/aty/
Dmach64_accel.c1 // SPDX-License-Identifier: GPL-2.0
54 par->fifo_space = 0; in aty_reset_engine()
73 pitch_value = info->fix.line_length / (info->var.bits_per_pixel / 8); in aty_init_engine()
74 vxres = info->var.xres_virtual; in aty_init_engine()
76 if (info->var.bits_per_pixel == 24) { in aty_init_engine()
77 /* In 24 bpp, the engine is in 8 bpp - this requires that all */ in aty_init_engine()
89 /* Ensure that vga page pointers are set to zero - the upper */ in aty_init_engine()
95 /* ---- Setup standard engine context ---- */ in aty_init_engine()
97 /* All GUI registers here are FIFOed - therefore, wait for */ in aty_init_engine()
142 aty_st_le32(SC_BOTTOM, par->crtc.vyres - 1, par); in aty_init_engine()
[all …]
/kernel/linux/linux-4.19/drivers/video/fbdev/aty/
Dmach64_accel.c1 // SPDX-License-Identifier: GPL-2.0
71 pitch_value = info->fix.line_length / (info->var.bits_per_pixel / 8); in aty_init_engine()
72 vxres = info->var.xres_virtual; in aty_init_engine()
74 if (info->var.bits_per_pixel == 24) { in aty_init_engine()
75 /* In 24 bpp, the engine is in 8 bpp - this requires that all */ in aty_init_engine()
87 /* Ensure that vga page pointers are set to zero - the upper */ in aty_init_engine()
93 /* ---- Setup standard engine context ---- */ in aty_init_engine()
95 /* All GUI registers here are FIFOed - therefore, wait for */ in aty_init_engine()
140 aty_st_le32(SC_BOTTOM, par->crtc.vyres - 1, par); in aty_init_engine()
141 aty_st_le32(SC_RIGHT, vxres - 1, par); in aty_init_engine()
[all …]
/kernel/linux/linux-5.10/include/linux/can/dev/
Dpeak_canfd.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * CAN driver for PEAK System micro-CAN based adapters
5 * Copyright (C) 2003-2011 PEAK System-Technik GmbH
6 * Copyright (C) 2011-2013 Stephane Grosjean <s.grosjean@peak-system.com>
11 /* uCAN commands opcodes list (low-order 10 bits) */
48 return le16_to_cpu(c->opcode_channel) & 0x3ff; in pucan_cmd_get_opcode()
56 #define PUCAN_TSLOW_BRP_MASK ((1 << PUCAN_TSLOW_BRP_BITS) - 1)
57 #define PUCAN_TSLOW_TSEG1_MASK ((1 << PUCAN_TSLOW_TSGEG1_BITS) - 1)
58 #define PUCAN_TSLOW_TSEG2_MASK ((1 << PUCAN_TSLOW_TSGEG2_BITS) - 1)
59 #define PUCAN_TSLOW_SJW_MASK ((1 << PUCAN_TSLOW_SJW_BITS) - 1)
[all …]
/kernel/linux/linux-4.19/include/linux/can/dev/
Dpeak_canfd.h2 * CAN driver for PEAK System micro-CAN based adapters
4 * Copyright (C) 2003-2011 PEAK System-Technik GmbH
5 * Copyright (C) 2011-2013 Stephane Grosjean <s.grosjean@peak-system.com>
19 /* uCAN commands opcodes list (low-order 10 bits) */
56 return le16_to_cpu(c->opcode_channel) & 0x3ff; in pucan_cmd_get_opcode()
64 #define PUCAN_TSLOW_BRP_MASK ((1 << PUCAN_TSLOW_BRP_BITS) - 1)
65 #define PUCAN_TSLOW_TSEG1_MASK ((1 << PUCAN_TSLOW_TSGEG1_BITS) - 1)
66 #define PUCAN_TSLOW_TSEG2_MASK ((1 << PUCAN_TSLOW_TSGEG2_BITS) - 1)
67 #define PUCAN_TSLOW_SJW_MASK ((1 << PUCAN_TSLOW_SJW_BITS) - 1)
80 u8 sjw_t; /* Sync Jump Width + Triple sampling */
[all …]
/kernel/linux/linux-5.10/drivers/hwmon/
Dtmp513.c1 // SPDX-License-Identifier: GPL-2.0
6 * Thermal/Power Management with Triple Remote and
15 * Copyright (C) 2019 Eric Tremblay <etremblay@distech-controls.com>
110 // Max possible value is -256 to +256 but datasheet indicated -40 to 125.
112 #define MIN_TEMP_LIMIT -40000
179 return 5 - ffs(data->pga_gain); in tmp51x_get_pga_shift()
198 *val = sign_extend32(regval, 17 - tmp51x_get_pga_shift(data)); in tmp51x_get_value()
199 *val = DIV_ROUND_CLOSEST(*val * 10000, data->shunt_uohms); in tmp51x_get_value()
210 *val = regval * data->pwr_lsb_uw; in tmp51x_get_value()
214 *val = sign_extend32(regval, 16) * data->curr_lsb_ua; in tmp51x_get_value()
[all …]
Dina3221.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * INA3221 Triple Current/Voltage Monitor
5 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
10 #include <linux/hwmon-sysfs.h>
53 #define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x))
70 /* Alert Flags: SF is the summation-alert flag */
98 * struct ina3221_input - channel input source specific information
99 * @label: label of channel input source
100 * @shunt_resistor: shunt resistor value of channel input source
101 * @disconnected: connection status of channel input source
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/
DKconfig18 Kernel-level support for the Direct Rendering Infrastructure (DRI)
36 channel.
111 triple buffering 300.
118 In order to keep user-space compatibility, we want in certain
119 use-cases to keep leaking the fbdev physical address to the
120 user-space program handling the fbdev buffer.
138 /lib/firmware directory or one of the provided built-in
146 bool "Enable DisplayPort CEC-Tunneling-over-AUX HDMI support"
150 DisplayPort/USB-C to HDMI adapters.
252 Virtual Kernel Mode-Setting (VKMS) is used for testing or for
[all …]
/kernel/linux/linux-5.10/drivers/staging/wlan-ng/
Dp80211types.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MPL-1.1) */
8 * --------------------------------------------------------------------
10 * linux-wlan
33 * --------------------------------------------------------------------
35 * Inquiries regarding the linux-wlan Open Source project can be
39 * info@linux-wlan.com
40 * http://www.linux-wlan.com
42 * --------------------------------------------------------------------
47 * --------------------------------------------------------------------
50 * parts of the linux-wlan system.
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