| /kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-sunxi.c | 23 struct clk *tx_clk; member
48 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_GMII_RGMII_RATE); in sun7i_gmac_init()
49 clk_prepare_enable(gmac->tx_clk); in sun7i_gmac_init()
52 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_MII_RATE); in sun7i_gmac_init()
53 ret = clk_prepare(gmac->tx_clk); in sun7i_gmac_init()
66 clk_disable(gmac->tx_clk); in sun7i_gmac_exit()
69 clk_unprepare(gmac->tx_clk); in sun7i_gmac_exit()
84 clk_disable(gmac->tx_clk); in sun7i_fix_speed()
87 clk_unprepare(gmac->tx_clk); in sun7i_fix_speed()
90 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_GMII_RGMII_RATE); in sun7i_fix_speed()
[all …]
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| D | dwmac-intel-plat.c | 20 struct clk *tx_clk; member
37 rate = clk_get_rate(dwmac->tx_clk); in kmb_eth_fix_mac_speed()
57 ret = clk_set_rate(dwmac->tx_clk, rate); in kmb_eth_fix_mac_speed()
104 dwmac->tx_clk = NULL; in intel_eth_plat_probe()
115 dwmac->tx_clk = devm_clk_get(&pdev->dev, "tx_clk"); in intel_eth_plat_probe()
116 if (IS_ERR(dwmac->tx_clk)) { in intel_eth_plat_probe()
117 ret = PTR_ERR(dwmac->tx_clk); in intel_eth_plat_probe()
121 clk_prepare_enable(dwmac->tx_clk); in intel_eth_plat_probe()
124 rate = clk_get_rate(dwmac->tx_clk); in intel_eth_plat_probe()
128 ret = clk_set_rate(dwmac->tx_clk, rate); in intel_eth_plat_probe()
[all …]
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| D | dwmac-sun8i.c | 60 * @tx_clk: reference to MAC TX clock
71 struct clk *tx_clk; member
560 ret = clk_prepare_enable(gmac->tx_clk); in sun8i_dwmac_init()
575 clk_disable_unprepare(gmac->tx_clk); in sun8i_dwmac_init()
1027 clk_disable_unprepare(gmac->tx_clk); in sun8i_dwmac_exit()
1151 gmac->tx_clk = devm_clk_get(dev, "stmmaceth"); in sun8i_dwmac_probe()
1152 if (IS_ERR(gmac->tx_clk)) { in sun8i_dwmac_probe()
1154 return PTR_ERR(gmac->tx_clk); in sun8i_dwmac_probe()
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| /kernel/linux/linux-4.19/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-sunxi.c | 32 struct clk *tx_clk; member
57 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_GMII_RGMII_RATE); in sun7i_gmac_init()
58 clk_prepare_enable(gmac->tx_clk); in sun7i_gmac_init()
61 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_MII_RATE); in sun7i_gmac_init()
62 ret = clk_prepare(gmac->tx_clk); in sun7i_gmac_init()
75 clk_disable(gmac->tx_clk); in sun7i_gmac_exit()
78 clk_unprepare(gmac->tx_clk); in sun7i_gmac_exit()
93 clk_disable(gmac->tx_clk); in sun7i_fix_speed()
96 clk_unprepare(gmac->tx_clk); in sun7i_fix_speed()
99 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_GMII_RGMII_RATE); in sun7i_fix_speed()
[all …]
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| D | dwmac-sun8i.c | 69 * @tx_clk: reference to MAC TX clock
79 struct clk *tx_clk; member
534 ret = clk_prepare_enable(gmac->tx_clk); in sun8i_dwmac_init()
991 clk_disable_unprepare(gmac->tx_clk); in sun8i_dwmac_exit()
1110 gmac->tx_clk = devm_clk_get(dev, "stmmaceth"); in sun8i_dwmac_probe()
1111 if (IS_ERR(gmac->tx_clk)) { in sun8i_dwmac_probe()
1113 return PTR_ERR(gmac->tx_clk); in sun8i_dwmac_probe()
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp-clk-ccf.dtsi | 123 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
130 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
137 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
144 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
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| D | zynqmp.dtsi | 447 clock-names = "pclk", "hclk", "tx_clk";
459 clock-names = "pclk", "hclk", "tx_clk";
471 clock-names = "pclk", "hclk", "tx_clk";
483 clock-names = "pclk", "hclk", "tx_clk";
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/net/ |
| D | macb.txt | 24 Optional elements: 'tx_clk'
43 clock-names = "pclk", "hclk", "tx_clk";
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| D | qcom-emac.txt | 44 "mdio_clk", "tx_clk", "rx_clk", "sys_clk";
93 "mdio_clk", "tx_clk", "rx_clk", "sys_clk";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | macb.txt | 27 Optional elements: 'tx_clk'
49 clock-names = "pclk", "hclk", "tx_clk";
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| D | qcom-emac.txt | 44 "mdio_clk", "tx_clk", "rx_clk", "sys_clk";
93 "mdio_clk", "tx_clk", "rx_clk", "sys_clk";
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| D | intel,dwmac-plat.yaml | 42 - const: tx_clk
110 clock-names = "stmmaceth", "ptp_ref", "tx_clk";
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| /kernel/linux/linux-4.19/drivers/dma/xilinx/ |
| D | xilinx_dma.c | 406 struct clk **tx_clk, struct clk **txs_clk,
423 * @tx_clk: DMA mm2s clock
442 struct clk *tx_clk; member
2182 struct clk **tx_clk, struct clk **rx_clk, in axidma_clk_init() argument
2196 *tx_clk = devm_clk_get(&pdev->dev, "m_axi_mm2s_aclk"); in axidma_clk_init()
2197 if (IS_ERR(*tx_clk)) in axidma_clk_init()
2198 *tx_clk = NULL; in axidma_clk_init()
2214 err = clk_prepare_enable(*tx_clk); in axidma_clk_init()
2216 dev_err(&pdev->dev, "failed to enable tx_clk (%d)\n", err); in axidma_clk_init()
2237 clk_disable_unprepare(*tx_clk); in axidma_clk_init()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/phy/ |
| D | micrel.c | 534 /* set tx to -0.42ns and tx_clk to +0.96ns to get 1.38ns delay */
538 /* set tx and tx_clk to "No delay adjustment" to keep 0ns
620 u16 rx, tx, rx_clk, tx_clk; in ksz9031_config_rgmii_delay() local
626 tx_clk = TX_CLK_ND; in ksz9031_config_rgmii_delay()
632 tx_clk = TX_CLK_ID; in ksz9031_config_rgmii_delay()
638 tx_clk = TX_CLK_ND; in ksz9031_config_rgmii_delay()
644 tx_clk = TX_CLK_ID; in ksz9031_config_rgmii_delay()
675 FIELD_PREP(MII_KSZ9031RN_GTX_CLK, tx_clk) | in ksz9031_config_rgmii_delay()
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| /kernel/linux/linux-5.10/drivers/dma/xilinx/ |
| D | xilinx_dma.c | 472 struct clk **tx_clk, struct clk **txs_clk,
489 * @tx_clk: DMA mm2s clock
507 struct clk *tx_clk; member
2562 struct clk **tx_clk, struct clk **rx_clk, in axidma_clk_init() argument
2573 *tx_clk = devm_clk_get(&pdev->dev, "m_axi_mm2s_aclk"); in axidma_clk_init()
2574 if (IS_ERR(*tx_clk)) in axidma_clk_init()
2575 *tx_clk = NULL; in axidma_clk_init()
2591 err = clk_prepare_enable(*tx_clk); in axidma_clk_init()
2593 dev_err(&pdev->dev, "failed to enable tx_clk (%d)\n", err); in axidma_clk_init()
2614 clk_disable_unprepare(*tx_clk); in axidma_clk_init()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/cadence/ |
| D | macb_main.c | 499 netdev_err(dev, "adjusting tx_clk failed.\n"); in macb_set_tx_clk()
652 macb_set_tx_clk(bp->tx_clk, speed, ndev); in macb_mac_link_up()
3579 struct clk **hclk, struct clk **tx_clk, in macb_clk_init() argument
3612 *tx_clk = devm_clk_get_optional(&pdev->dev, "tx_clk"); in macb_clk_init()
3613 if (IS_ERR(*tx_clk)) in macb_clk_init()
3614 return PTR_ERR(*tx_clk); in macb_clk_init()
3636 err = clk_prepare_enable(*tx_clk); in macb_clk_init()
3638 dev_err(&pdev->dev, "failed to enable tx_clk (%d)\n", err); in macb_clk_init()
3660 clk_disable_unprepare(*tx_clk); in macb_clk_init()
4188 struct clk **hclk, struct clk **tx_clk, in at91ether_clk_init() argument
[all …]
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp.dtsi | 364 clock-names = "pclk", "hclk", "tx_clk";
375 clock-names = "pclk", "hclk", "tx_clk";
386 clock-names = "pclk", "hclk", "tx_clk";
397 clock-names = "pclk", "hclk", "tx_clk";
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| /kernel/linux/linux-5.10/drivers/net/dsa/sja1105/ |
| D | sja1105_clocking.c | 280 /* Per MII spec, the PHY (which is us) drives the TX_CLK pin */ in sja1105_mii_clocking_setup()
382 pad_mii_tx.clk_os = 3; /* TX_CLK output stage */ in sja1105_rgmii_cfg_pad_tx_config()
383 pad_mii_tx.clk_ih = 0; /* TX_CLK input hysteresis (default) */ in sja1105_rgmii_cfg_pad_tx_config()
384 pad_mii_tx.clk_ipud = 2; /* TX_CLK input stage (default) */ in sja1105_rgmii_cfg_pad_tx_config()
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| /kernel/linux/linux-4.19/drivers/net/ethernet/cadence/ |
| D | macb_main.c | 405 netdev_err(dev, "adjusting tx_clk failed.\n"); in macb_set_tx_clk()
460 macb_set_tx_clk(bp->tx_clk, phydev->speed, dev); in macb_handle_link_change()
3315 struct clk **hclk, struct clk **tx_clk, in macb_clk_init() argument
3348 *tx_clk = devm_clk_get(&pdev->dev, "tx_clk"); in macb_clk_init()
3349 if (IS_ERR(*tx_clk)) in macb_clk_init()
3350 *tx_clk = NULL; in macb_clk_init()
3368 err = clk_prepare_enable(*tx_clk); in macb_clk_init()
3370 dev_err(&pdev->dev, "failed to enable tx_clk (%d)\n", err); in macb_clk_init()
3383 clk_disable_unprepare(*tx_clk); in macb_clk_init()
3831 struct clk **hclk, struct clk **tx_clk, in at91ether_clk_init() argument
[all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | zynq-7000.dtsi | 206 clock-names = "pclk", "hclk", "tx_clk";
217 clock-names = "pclk", "hclk", "tx_clk";
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| D | socfpga_arria10_socdk.dtsi | 80 * for TX_CLK on Arria 10.
|
| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | mpc832x_rdb.dts | 180 3 23 2 0 1 0 /* TX_CLK (CLK3) */
200 3 24 2 0 1 0 /* TX_CLK (CLK10) */
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| /kernel/linux/linux-4.19/arch/powerpc/boot/dts/ |
| D | mpc832x_rdb.dts | 184 3 23 2 0 1 0 /* TX_CLK (CLK3) */
204 3 24 2 0 1 0 /* TX_CLK (CLK10) */
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | socfpga_arria10_socdk.dtsi | 75 * for TX_CLK on Arria 10.
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| /kernel/linux/linux-4.19/drivers/mmc/host/ |
| D | meson-gx-mmc.c | 167 struct clk *tx_clk; member
608 host->tx_clk = devm_clk_register(host->dev, &tx->hw); in meson_mmc_clk_init()
609 if (WARN_ON(PTR_ERR_OR_ZERO(host->tx_clk))) in meson_mmc_clk_init()
610 return PTR_ERR(host->tx_clk); in meson_mmc_clk_init()
648 clk_set_phase(host->tx_clk, 270); in meson_mmc_clk_init()
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