| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | dra7-ipu-dsp-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
11 mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
18 mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
25 ti,timers = <&timer3>;
26 ti,watchdog-timers = <&timer4>, <&timer9>;
31 ti,timers = <&timer11>;
32 ti,watchdog-timers = <&timer7>, <&timer8>;
37 ti,timers = <&timer5>;
38 ti,watchdog-timers = <&timer10>;
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| D | dra74-ipu-dsp-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
6 #include "dra7-ipu-dsp-common.dtsi"
9 mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
16 ti,timers = <&timer6>;
17 ti,watchdog-timers = <&timer13>;
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| D | omap5-uevm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
7 #include "omap5-board-common.dtsi"
11 compatible = "ti,omap5-uevm", "ti,omap5";
18 reserved-memory {
19 #address-cells = <2>;
20 #size-cells = <2>;
23 dsp_memory_region: dsp-memory@95000000 {
24 compatible = "shared-dma-pool";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
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| /kernel/linux/linux-5.10/drivers/remoteproc/ |
| D | omap_remoteproc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2020 Texas Instruments Incorporated - http://www.ti.com/
8 * Ohad Ben-Cohen <ohad@wizery.com>
12 * Suman Anna <s-anna@ti.com>
13 * Hari Kanigeri <h-kanigeri2@ti.com>
26 #include <linux/dma-mapping.h>
30 #include <linux/omap-iommu.h>
31 #include <linux/omap-mailbox.h>
35 #include <clocksource/timer-ti-dm.h>
37 #include <linux/platform_data/dmtimer-omap.h>
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | ti,davinci-timer.txt | 3 This document provides bindings for the 64-bit timer in the DaVinci
4 architecture devices. The timer can be configured as a general-purpose 64-bit
5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
6 timers, each half can operate in conjunction (chain mode) or independently
9 The timer is a free running up-counter and can generate interrupts when the
12 Also see ../watchdog/davinci-wdt.txt for timers that are configurable as
13 watchdog timers.
17 - compatible : should be "ti,da830-timer".
18 - reg : specifies base physical address and count of the registers.
19 - interrupts : interrupts generated by the timer.
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/timer/ |
| D | ti,davinci-timer.txt | 3 This document provides bindings for the 64-bit timer in the DaVinci
4 architecture devices. The timer can be configured as a general-purpose 64-bit
5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
6 timers, each half can operate in conjunction (chain mode) or independently
9 The timer is a free running up-counter and can generate interrupts when the
12 Also see ../watchdog/davinci-wdt.txt for timers that are configurable as
13 watchdog timers.
17 - compatible : should be "ti,da830-timer".
18 - reg : specifies base physical address and count of the registers.
19 - interrupts : interrupts generated by the timer.
[all …]
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| /kernel/linux/linux-4.19/drivers/watchdog/ |
| D | i6300esb.c | 2 * i6300esb: Watchdog timer driver for Intel 6300ESB chipset
12 * based on i810-tco.c which is in turn based on softdog.c
16 * 6300ESB chip : document number 300641-004
25 * Change driver to use the watchdog subsystem
39 #include <linux/watchdog.h>
53 #define ESB_TIMER1_REG(w) ((w)->base + 0x00)/* Timer1 value after each reset */
54 #define ESB_TIMER2_REG(w) ((w)->base + 0x04)/* Timer2 value after each reset */
55 #define ESB_GINTSR_REG(w) ((w)->base + 0x08)/* General Interrupt Status Reg */
56 #define ESB_RELOAD_REG(w) ((w)->base + 0x0c)/* Reload register */
59 #define ESB_WDT_FUNC (0x01 << 2) /* Watchdog functionality */
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| D | sp805_wdt.c | 2 * drivers/char/watchdog/sp805-wdt.c
4 * Watchdog driver for ARM SP805 watchdog module
31 #include <linux/watchdog.h>
36 #define MODULE_NAME "sp805-wdt"
38 /* watchdog register offsets and masks */
79 "Set to 1 to keep watchdog running after device release");
85 u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL); in wdt_is_running()
96 rate = wdt->rate; in wdt_setload()
104 load = div_u64(rate, 2) * timeout - 1; in wdt_setload()
109 spin_lock(&wdt->lock); in wdt_setload()
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| /kernel/linux/linux-5.10/drivers/watchdog/ |
| D | i6300esb.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * i6300esb: Watchdog timer driver for Intel 6300ESB chipset
8 * based on i810-tco.c which is in turn based on softdog.c
12 * 6300ESB chip : document number 300641-004
21 * Change driver to use the watchdog subsystem
35 #include <linux/watchdog.h>
49 #define ESB_TIMER1_REG(w) ((w)->base + 0x00)/* Timer1 value after each reset */
50 #define ESB_TIMER2_REG(w) ((w)->base + 0x04)/* Timer2 value after each reset */
51 #define ESB_GINTSR_REG(w) ((w)->base + 0x08)/* General Interrupt Status Reg */
52 #define ESB_RELOAD_REG(w) ((w)->base + 0x0c)/* Reload register */
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| /kernel/linux/linux-5.10/Documentation/mips/ |
| D | ingenic-tcu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
9 counters, timers, or PWM.
11 - JZ4725B, JZ4750, JZ4755 only have six TCU channels. The other SoCs all
14 - JZ4725B introduced a separate channel, called Operating System Timer
15 (OST). It is a 32-bit programmable timer. On JZ4760B and above, it is
16 64-bit.
18 - Each one of the TCU channels has its own clock, which can be reparented to three
21 - The watchdog and OST hardware blocks also feature a TCSR register with the same
23 - The TCU registers used to gate/ungate can also gate/ungate the watchdog and
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/watchdog/ |
| D | atmel-wdt.txt | 1 * Atmel Watchdog Timers
3 ** at91sam9-wdt
6 - compatible: must be "atmel,at91sam9260-wdt".
7 - reg: physical base address of the controller and length of memory mapped
9 - clocks: phandle to input clock.
12 - timeout-sec: contains the watchdog timeout in seconds.
13 - interrupts : Should contain WDT interrupt.
14 - atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in
17 - atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in
18 seconds. This value must be smaller than the max-heartbeat-sec value.
[all …]
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| D | mt7621-wdt.txt | 1 Ralink Watchdog Timers
4 - compatible: must be "mediatek,mt7621-wdt"
5 - reg: physical base address of the controller and length of the register range
9 watchdog@100 {
10 compatible = "mediatek,mt7621-wdt";
|
| D | rt2880-wdt.txt | 1 Ralink Watchdog Timers
4 - compatible: must be "ralink,rt2880-wdt"
5 - reg: physical base address of the controller and length of the register range
8 - interrupts: Specify the INTC interrupt number
12 watchdog@120 {
13 compatible = "ralink,rt2880-wdt";
16 interrupt-parent = <&intc>;
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/watchdog/ |
| D | atmel-wdt.txt | 1 * Atmel Watchdog Timers
3 ** at91sam9-wdt
6 - compatible: must be "atmel,at91sam9260-wdt".
7 - reg: physical base address of the controller and length of memory mapped
9 - clocks: phandle to input clock.
12 - timeout-sec: contains the watchdog timeout in seconds.
13 - interrupts : Should contain WDT interrupt.
14 - atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in
17 - atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in
18 seconds. This value must be smaller than the max-heartbeat-sec value.
[all …]
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| D | mt7621-wdt.txt | 1 Ralink Watchdog Timers
4 - compatible: must be "mediatek,mt7621-wdt"
5 - reg: physical base address of the controller and length of the register range
9 watchdog@100 {
10 compatible = "mediatek,mt7621-wdt";
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| D | rt2880-wdt.txt | 1 Ralink Watchdog Timers
4 - compatible: must be "ralink,rt2880-wdt"
5 - reg: physical base address of the controller and length of the register range
8 - interrupts: Specify the INTC interrupt number
12 watchdog@120 {
13 compatible = "ralink,rt2880-wdt";
16 interrupt-parent = <&intc>;
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| /kernel/linux/linux-5.10/arch/sparc/include/uapi/asm/ |
| D | watchdog.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * watchdog - Driver interface for the hardware watchdog timers
14 #include <linux/watchdog.h>
16 /* Solaris compatibility ioctls--
17 * Ref. <linux/watchdog.h> for standard linux watchdog ioctls
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| /kernel/linux/linux-4.19/arch/sparc/include/uapi/asm/ |
| D | watchdog.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * watchdog - Driver interface for the hardware watchdog timers
14 #include <linux/watchdog.h>
16 /* Solaris compatibility ioctls--
17 * Ref. <linux/watchdog.h> for standard linux watchdog ioctls
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| /kernel/linux/linux-5.10/drivers/acpi/arm64/ |
| D | gtdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only
23 * struct acpi_gtdt_descriptor - Store the key info of GTDT for all functions
43 platform_timer += gh->length; in next_platform_timer()
58 return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK; in is_timer_block()
66 if (gh->type != ACPI_GTDT_TYPE_WATCHDOG) in is_non_secure_watchdog()
69 return !(wd->timer_flags & ACPI_GTDT_WATCHDOG_SECURE); in is_non_secure_watchdog()
86 * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
90 * So we only handle the non-secure timer PPIs,
101 return map_gt_gsi(gtdt->non_secure_el1_interrupt, in acpi_gtdt_map_ppi()
102 gtdt->non_secure_el1_flags); in acpi_gtdt_map_ppi()
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| /kernel/linux/linux-4.19/drivers/acpi/arm64/ |
| D | gtdt.c | 26 * struct acpi_gtdt_descriptor - Store the key info of GTDT for all functions
46 platform_timer += gh->length; in next_platform_timer()
61 return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK; in is_timer_block()
69 if (gh->type != ACPI_GTDT_TYPE_WATCHDOG) in is_non_secure_watchdog()
72 return !(wd->timer_flags & ACPI_GTDT_WATCHDOG_SECURE); in is_non_secure_watchdog()
89 * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
93 * So we only handle the non-secure timer PPIs,
104 return map_gt_gsi(gtdt->non_secure_el1_interrupt, in acpi_gtdt_map_ppi()
105 gtdt->non_secure_el1_flags); in acpi_gtdt_map_ppi()
107 return map_gt_gsi(gtdt->virtual_timer_interrupt, in acpi_gtdt_map_ppi()
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| /kernel/linux/linux-4.19/Documentation/watchdog/ |
| D | wdt.txt | 3 WDT Watchdog Timer Interfaces For The Linux Operating System
6 ICS WDT501-P
7 ICS WDT501-P (no fan tachometer)
8 ICS WDT500-P
10 All the interfaces provide /dev/watchdog, which when open must be written
12 time another timeout. In the case of the software watchdog the ability to
14 boards physically pull the machine down off their own onboard timers and
23 The ICS ISA-bus wdt card cannot be safely probed for. Instead you need to
28 heartbeat Watchdog heartbeat in seconds (default 60)
29 nowayout Watchdog cannot be stopped once started (kernel
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| /kernel/linux/linux-5.10/arch/mips/include/asm/netlogic/xlp-hal/ |
| D | pic.h | 2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
46 #define PIC_CTRL_WWR1 8 /* watchdog 1 wraparound count for reset */
47 #define PIC_CTRL_WWR0 6 /* watchdog 0 wraparound count for reset */
48 #define PIC_CTRL_WWN1 4 /* watchdog 1 wraparound count for NMI */
49 #define PIC_CTRL_WWN0 2 /* watchdog 0 wraparound count for NMI */
50 #define PIC_CTRL_WTE 0 /* watchdog timer enable */
56 #define PIC_WNS_STATUS 2 /* NMI status for watchdog timers */
57 #define PIC_WIS_STATUS 0 /* Interrupt status for watchdog timers */
352 /* Ack the Status register for Watchdog & System timers */ in nlm_pic_ack()
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| /kernel/linux/linux-4.19/arch/mips/include/asm/netlogic/xlp-hal/ |
| D | pic.h | 2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
46 #define PIC_CTRL_WWR1 8 /* watchdog 1 wraparound count for reset */
47 #define PIC_CTRL_WWR0 6 /* watchdog 0 wraparound count for reset */
48 #define PIC_CTRL_WWN1 4 /* watchdog 1 wraparound count for NMI */
49 #define PIC_CTRL_WWN0 2 /* watchdog 0 wraparound count for NMI */
50 #define PIC_CTRL_WTE 0 /* watchdog timer enable */
56 #define PIC_WNS_STATUS 2 /* NMI status for watchdog timers */
57 #define PIC_WIS_STATUS 0 /* Interrupt status for watchdog timers */
352 /* Ack the Status register for Watchdog & System timers */ in nlm_pic_ack()
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| /kernel/linux/linux-5.10/Documentation/watchdog/ |
| D | wdt.rst | 2 WDT Watchdog Timer Interfaces For The Linux Operating System
9 - ICS WDT501-P
10 - ICS WDT501-P (no fan tachometer)
11 - ICS WDT500-P
13 All the interfaces provide /dev/watchdog, which when open must be written
15 time another timeout. In the case of the software watchdog the ability to
17 boards physically pull the machine down off their own onboard timers and
26 The ICS ISA-bus wdt card cannot be safely probed for. Instead you need to
34 heartbeat Watchdog heartbeat in seconds (default 60)
35 nowayout Watchdog cannot be stopped once started (kernel
[all …]
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