| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mmc/ |
| D | mmc.txt | 6 - reg: Registers location and length.
7 - interrupts: Interrupts used by the MMC controller.
12 - broken-cd: There is no card detection available; polling must be used.
13 - cd-gpios: Specify GPIOs for card detection, see gpio binding
14 - non-removable: non-removable slot (like eMMC); assume always present.
17 - bus-width: Number of data lines, can be <1>, <4>, or <8>. The default
19 - wp-gpios: Specify GPIOs for write protection, see gpio binding
20 - cd-inverted: when present, polarity on the CD line is inverted. See the note
22 - cd-debounce-delay-ms: Set delay time before detecting card after card insert interrupt.
23 It's only valid when cd-gpios is present.
[all …]
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| D | fsl-imx-esdhc.txt | 1 * Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
3 The Enhanced Secure Digital Host Controller on Freescale i.MX family
7 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
10 - compatible : Should be "fsl,<chip>-esdhc", the supported chips include
11 "fsl,imx25-esdhc"
12 "fsl,imx35-esdhc"
13 "fsl,imx51-esdhc"
14 "fsl,imx53-esdhc"
15 "fsl,imx6q-usdhc"
16 "fsl,imx6sl-usdhc"
[all …]
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| D | synopsys-dw-mshc.txt | 1 * Synopsys Designware Mobile Storage Host Controller
3 The Synopsys designware mobile storage host controller is used to interface
6 properties used by the Synopsys Designware Mobile Storage Host Controller.
11 - snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
12 * #address-cells: should be 1.
13 * #size-cells: should be 0.
16 child-nodes with each child-node representing a supported slot. There should
19 of the slot connected to the controller. The following are optional properties
23 property is 0 to (num-slots -1), where num-slots is the value
24 specified by the num-slots property.
[all …]
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| D | samsung,s3cmci.txt | 1 * Samsung's S3C24XX MMC/SD/SDIO controller device tree bindings
3 Samsung's S3C24XX MMC/SD/SDIO controller is used as a connectivity interface
7 mmc.txt and the properties used by the Samsung S3C24XX MMC/SD/SDIO controller
11 - compatible: should be one of the following
12 - "samsung,s3c2410-sdi": for controllers compatible with s3c2410
13 - "samsung,s3c2412-sdi": for controllers compatible with s3c2412
14 - "samsung,s3c2440-sdi": for controllers compatible with s3c2440
15 - reg: register location and length
16 - interrupts: mmc controller interrupt
17 - clocks: Should reference the controller clock
[all …]
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| D | fsl-esdhc.txt | 1 * Freescale Enhanced Secure Digital Host Controller (eSDHC)
3 The Enhanced Secure Digital Host Controller provides an interface
7 by mmc.txt and the properties used by the sdhci-esdhc driver.
10 - compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc".
12 "fsl,mpc8536-esdhc"
13 "fsl,mpc8378-esdhc"
14 "fsl,p2020-esdhc"
15 "fsl,p4080-esdhc"
16 "fsl,t1040-esdhc"
17 "fsl,t4240-esdhc"
[all …]
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| D | k3-dw-mshc.txt | 2 Storage Host Controller
4 Read synopsys-dw-mshc.txt for more details
6 The Synopsys designware mobile storage host controller is used to interface
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
10 extensions to the Synopsys Designware Mobile Storage Host Controller.
15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
16 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
17 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
20 - hisilicon,peripheral-syscon: phandle of syscon used to control peripheral.
[all …]
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| /kernel/linux/linux-4.19/sound/hda/ |
| D | hdac_controller.c | 2 * HD-audio controller helpers
17 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp()
23 dev_err(bus->dev, "CORB reset timeout#1, CORBRP = %d\n", in azx_clear_corbrp()
27 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp()
33 dev_err(bus->dev, "CORB reset timeout#2, CORBRP = %d\n", in azx_clear_corbrp()
38 * snd_hdac_bus_init_cmd_io - set up CORB/RIRB buffers
39 * @bus: HD-audio core bus
43 WARN_ON_ONCE(!bus->rb.area); in snd_hdac_bus_init_cmd_io()
45 spin_lock_irq(&bus->reg_lock); in snd_hdac_bus_init_cmd_io()
47 bus->corb.addr = bus->rb.addr; in snd_hdac_bus_init_cmd_io()
[all …]
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| /kernel/linux/linux-5.10/sound/hda/ |
| D | hdac_controller.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * HD-audio controller helpers
19 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp()
25 dev_err(bus->dev, "CORB reset timeout#1, CORBRP = %d\n", in azx_clear_corbrp()
29 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp()
35 dev_err(bus->dev, "CORB reset timeout#2, CORBRP = %d\n", in azx_clear_corbrp()
40 * snd_hdac_bus_init_cmd_io - set up CORB/RIRB buffers
41 * @bus: HD-audio core bus
45 WARN_ON_ONCE(!bus->rb.area); in snd_hdac_bus_init_cmd_io()
47 spin_lock_irq(&bus->reg_lock); in snd_hdac_bus_init_cmd_io()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MMC Controller Generic Binding
10 - Ulf Hansson <ulf.hansson@linaro.org>
17 It is possible to assign a fixed index mmcN to an MMC host controller
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
[all …]
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| D | fsl-imx-esdhc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: "mmc-controller.yaml"
16 The Enhanced Secure Digital Host Controller on Freescale i.MX family
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
25 - enum:
[all …]
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| D | samsung,s3cmci.txt | 1 * Samsung's S3C24XX MMC/SD/SDIO controller device tree bindings
3 Samsung's S3C24XX MMC/SD/SDIO controller is used as a connectivity interface
7 mmc.txt and the properties used by the Samsung S3C24XX MMC/SD/SDIO controller
11 - compatible: should be one of the following
12 - "samsung,s3c2410-sdi": for controllers compatible with s3c2410
13 - "samsung,s3c2412-sdi": for controllers compatible with s3c2412
14 - "samsung,s3c2440-sdi": for controllers compatible with s3c2440
15 - reg: register location and length
16 - interrupts: mmc controller interrupt
17 - clocks: Should reference the controller clock
[all …]
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| D | fsl-esdhc.txt | 1 * Freescale Enhanced Secure Digital Host Controller (eSDHC)
3 The Enhanced Secure Digital Host Controller provides an interface
7 by mmc.txt and the properties used by the sdhci-esdhc driver.
10 - compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc".
12 "fsl,mpc8536-esdhc"
13 "fsl,mpc8378-esdhc"
14 "fsl,p2020-esdhc"
15 "fsl,p4080-esdhc"
16 "fsl,t1040-esdhc"
17 "fsl,t4240-esdhc"
[all …]
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| D | k3-dw-mshc.txt | 2 Storage Host Controller
4 Read synopsys-dw-mshc.txt for more details
6 The Synopsys designware mobile storage host controller is used to interface
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
10 extensions to the Synopsys Designware Mobile Storage Host Controller.
15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
16 - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers
18 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
[all …]
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| D | img-dw-mshc.txt | 2 Host Controller
4 The Synopsys designware mobile storage host controller is used to interface
6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the Imagination specific
8 extensions to the Synopsys Designware Mobile Storage Host Controller.
13 - "img,pistachio-dw-mshc": for Pistachio SoCs
18 compatible = "img,pistachio-dw-mshc";
23 clock-names = "biu", "ciu";
25 fifo-depth = <0x20>;
26 bus-width = <4>;
[all …]
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| /kernel/linux/linux-5.10/include/linux/platform_data/ |
| D | mmc-esdhc-imx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
12 ESDHC_WP_NONE, /* no WP, neither controller nor gpio */
13 ESDHC_WP_CONTROLLER, /* mmc controller internal WP */
14 ESDHC_WP_GPIO, /* external gpio pin for WP */
18 ESDHC_CD_NONE, /* no CD, neither controller nor gpio */
19 ESDHC_CD_CONTROLLER, /* mmc controller internal CD */
25 * struct esdhc_platform_data - platform data for esdhc on i.MX
|
| /kernel/linux/linux-4.19/include/linux/platform_data/ |
| D | mmc-esdhc-imx.h | 16 ESDHC_WP_NONE, /* no WP, neither controller nor gpio */
17 ESDHC_WP_CONTROLLER, /* mmc controller internal WP */
18 ESDHC_WP_GPIO, /* external gpio pin for WP */
22 ESDHC_CD_NONE, /* no CD, neither controller nor gpio */
23 ESDHC_CD_CONTROLLER, /* mmc controller internal CD */
29 * struct esdhc_platform_data - platform data for esdhc on i.MX
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | nvidia-tegra20-nand.txt | 1 NVIDIA Tegra NAND Flash controller
4 - compatible: Must be one of:
5 - "nvidia,tegra20-nand"
6 - reg: MMIO address range
7 - interrupts: interrupt output of the NFC controller
8 - clocks: Must contain an entry for each entry in clock-names.
9 See ../clocks/clock-bindings.txt for details.
10 - clock-names: Must include the following entries:
11 - nand
12 - resets: Must contain an entry for each entry in reset-names.
[all …]
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| D | brcm,brcmnand.txt | 1 * Broadcom STB NAND Controller
3 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
4 flash chips. It has a memory-mapped register interface for both control
5 registers and for its data input/output buffer. On some SoCs, this controller is
9 This controller was originally designed for STB SoCs (BCM7xxx) but is now
15 - compatible : May contain an SoC-specific compatibility string (see below)
16 to account for any SoC-specific hardware bits that may be
17 added on top of the base core controller.
19 the core NAND controller, of the following form:
21 string, like "brcm,brcmnand-v7.0"
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mtd/ |
| D | ingenic,jz4780-nand.txt | 4 JZ4780. NAND devices are connected to the NEMC controller (described in
5 memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must
8 Required NAND controller device properties:
9 - compatible: Should be set to "ingenic,jz4780-nand".
10 - reg: For each bank with a NAND chip attached, should specify a bank number,
13 Optional NAND controller device properties:
14 - ingenic,bch-controller: To make use of the hardware BCH controller, this
15 property must contain a phandle for the BCH controller node. The required
20 - Individual NAND chips are children of the NAND controller node.
23 - reg: An integer ranging from 1 to 6 representing the CS line to use.
[all …]
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| D | nvidia-tegra20-nand.txt | 1 NVIDIA Tegra NAND Flash controller
4 - compatible: Must be one of:
5 - "nvidia,tegra20-nand"
6 - reg: MMIO address range
7 - interrupts: interrupt output of the NFC controller
8 - clocks: Must contain an entry for each entry in clock-names.
9 See ../clocks/clock-bindings.txt for details.
10 - clock-names: Must include the following entries:
11 - nand
12 - resets: Must contain an entry for each entry in reset-names.
[all …]
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| D | brcm,brcmnand.txt | 1 * Broadcom STB NAND Controller
3 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
4 flash chips. It has a memory-mapped register interface for both control
5 registers and for its data input/output buffer. On some SoCs, this controller is
9 This controller was originally designed for STB SoCs (BCM7xxx) but is now
15 - compatible : May contain an SoC-specific compatibility string (see below)
16 to account for any SoC-specific hardware bits that may be
17 added on top of the base core controller.
19 the core NAND controller, of the following form:
21 string, like "brcm,brcmnand-v7.0"
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,dove-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu*
23 uart1(cts), lcd-spi(cs1), pmu*
25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
35 mpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,dove-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu*
23 uart1(cts), lcd-spi(cs1), pmu*
25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
35 mpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx6qdl-rex.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 stdout-path = &uart1;
17 compatible = "simple-bus";
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "regulator-fixed";
24 regulator-name = "3P3V";
25 regulator-min-microvolt = <3300000>;
[all …]
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| D | imx50-kobo-aura.dts | 1 // SPDX-License-Identifier: GPL-2.0+
4 // The Kobo Aura e-book reader, model N514. The mainboard is marked as E606F0B.
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
15 stdout-path = "serial1:115200n8";
23 gpio-leds {
24 compatible = "gpio-leds";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_leds>;
31 panic-indicator;
[all …]
|