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1 /* ----------------------------------------------------------------------
2  * Project:      CMSIS DSP Library
3  * Title:        arm_mve_tables.h
4  * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc
5  *               used for MVE implementation only
6  *
7  * $Date:        08. January 2020
8  * $Revision:    V1.7.0
9  *
10  * Target Processor: Cortex-M cores
11  * -------------------------------------------------------------------- */
12 /*
13  * Copyright (C) 2010-2020 ARM Limited or its affiliates. All rights reserved.
14  *
15  * SPDX-License-Identifier: Apache-2.0
16  *
17  * Licensed under the Apache License, Version 2.0 (the License); you may
18  * not use this file except in compliance with the License.
19  * You may obtain a copy of the License at
20  *
21  * www.apache.org/licenses/LICENSE-2.0
22  *
23  * Unless required by applicable law or agreed to in writing, software
24  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
25  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
26  * See the License for the specific language governing permissions and
27  * limitations under the License.
28  */
29 
30  #ifndef _ARM_MVE_TABLES_H
31  #define _ARM_MVE_TABLES_H
32 
33  #include "arm_math.h"
34 
35 
36 
37 
38 
39 
40 #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
41 
42 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
43 
44 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
45 
46 extern uint32_t rearranged_twiddle_tab_stride1_arr_16_f32[2];
47 extern uint32_t rearranged_twiddle_tab_stride2_arr_16_f32[2];
48 extern uint32_t rearranged_twiddle_tab_stride3_arr_16_f32[2];
49 extern float32_t rearranged_twiddle_stride1_16_f32[8];
50 extern float32_t rearranged_twiddle_stride2_16_f32[8];
51 extern float32_t rearranged_twiddle_stride3_16_f32[8];
52 #endif
53 
54 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
55 
56 extern uint32_t rearranged_twiddle_tab_stride1_arr_64_f32[3];
57 extern uint32_t rearranged_twiddle_tab_stride2_arr_64_f32[3];
58 extern uint32_t rearranged_twiddle_tab_stride3_arr_64_f32[3];
59 extern float32_t rearranged_twiddle_stride1_64_f32[40];
60 extern float32_t rearranged_twiddle_stride2_64_f32[40];
61 extern float32_t rearranged_twiddle_stride3_64_f32[40];
62 #endif
63 
64 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
65 
66 extern uint32_t rearranged_twiddle_tab_stride1_arr_256_f32[4];
67 extern uint32_t rearranged_twiddle_tab_stride2_arr_256_f32[4];
68 extern uint32_t rearranged_twiddle_tab_stride3_arr_256_f32[4];
69 extern float32_t rearranged_twiddle_stride1_256_f32[168];
70 extern float32_t rearranged_twiddle_stride2_256_f32[168];
71 extern float32_t rearranged_twiddle_stride3_256_f32[168];
72 #endif
73 
74 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
75 
76 extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_f32[5];
77 extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_f32[5];
78 extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_f32[5];
79 extern float32_t rearranged_twiddle_stride1_1024_f32[680];
80 extern float32_t rearranged_twiddle_stride2_1024_f32[680];
81 extern float32_t rearranged_twiddle_stride3_1024_f32[680];
82 #endif
83 
84 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) || defined(ARM_TABLE_TWIDDLECOEF_F32_8192)
85 
86 extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_f32[6];
87 extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_f32[6];
88 extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_f32[6];
89 extern float32_t rearranged_twiddle_stride1_4096_f32[2728];
90 extern float32_t rearranged_twiddle_stride2_4096_f32[2728];
91 extern float32_t rearranged_twiddle_stride3_4096_f32[2728];
92 #endif
93 
94 
95 #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
96 
97 #endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
98 
99 
100 
101 #if defined(ARM_MATH_MVEI)
102 
103 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
104 
105 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
106 
107 extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q31[2];
108 extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q31[2];
109 extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q31[2];
110 extern q31_t rearranged_twiddle_stride1_16_q31[8];
111 extern q31_t rearranged_twiddle_stride2_16_q31[8];
112 extern q31_t rearranged_twiddle_stride3_16_q31[8];
113 #endif
114 
115 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
116 
117 extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q31[3];
118 extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q31[3];
119 extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q31[3];
120 extern q31_t rearranged_twiddle_stride1_64_q31[40];
121 extern q31_t rearranged_twiddle_stride2_64_q31[40];
122 extern q31_t rearranged_twiddle_stride3_64_q31[40];
123 #endif
124 
125 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
126 
127 extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q31[4];
128 extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q31[4];
129 extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q31[4];
130 extern q31_t rearranged_twiddle_stride1_256_q31[168];
131 extern q31_t rearranged_twiddle_stride2_256_q31[168];
132 extern q31_t rearranged_twiddle_stride3_256_q31[168];
133 #endif
134 
135 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
136 
137 extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q31[5];
138 extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q31[5];
139 extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q31[5];
140 extern q31_t rearranged_twiddle_stride1_1024_q31[680];
141 extern q31_t rearranged_twiddle_stride2_1024_q31[680];
142 extern q31_t rearranged_twiddle_stride3_1024_q31[680];
143 #endif
144 
145 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q31_8192)
146 
147 extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q31[6];
148 extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q31[6];
149 extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q31[6];
150 extern q31_t rearranged_twiddle_stride1_4096_q31[2728];
151 extern q31_t rearranged_twiddle_stride2_4096_q31[2728];
152 extern q31_t rearranged_twiddle_stride3_4096_q31[2728];
153 #endif
154 
155 
156 #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
157 
158 #endif /* defined(ARM_MATH_MVEI) */
159 
160 
161 
162 #if defined(ARM_MATH_MVEI)
163 
164 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
165 
166 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
167 
168 extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q15[2];
169 extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q15[2];
170 extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q15[2];
171 extern q15_t rearranged_twiddle_stride1_16_q15[8];
172 extern q15_t rearranged_twiddle_stride2_16_q15[8];
173 extern q15_t rearranged_twiddle_stride3_16_q15[8];
174 #endif
175 
176 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
177 
178 extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q15[3];
179 extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q15[3];
180 extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q15[3];
181 extern q15_t rearranged_twiddle_stride1_64_q15[40];
182 extern q15_t rearranged_twiddle_stride2_64_q15[40];
183 extern q15_t rearranged_twiddle_stride3_64_q15[40];
184 #endif
185 
186 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
187 
188 extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q15[4];
189 extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q15[4];
190 extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q15[4];
191 extern q15_t rearranged_twiddle_stride1_256_q15[168];
192 extern q15_t rearranged_twiddle_stride2_256_q15[168];
193 extern q15_t rearranged_twiddle_stride3_256_q15[168];
194 #endif
195 
196 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
197 
198 extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q15[5];
199 extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q15[5];
200 extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q15[5];
201 extern q15_t rearranged_twiddle_stride1_1024_q15[680];
202 extern q15_t rearranged_twiddle_stride2_1024_q15[680];
203 extern q15_t rearranged_twiddle_stride3_1024_q15[680];
204 #endif
205 
206 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q15_8192)
207 
208 extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q15[6];
209 extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q15[6];
210 extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q15[6];
211 extern q15_t rearranged_twiddle_stride1_4096_q15[2728];
212 extern q15_t rearranged_twiddle_stride2_4096_q15[2728];
213 extern q15_t rearranged_twiddle_stride3_4096_q15[2728];
214 #endif
215 
216 
217 #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
218 
219 #endif /* defined(ARM_MATH_MVEI) */
220 
221 
222 
223 #if defined(ARM_MATH_MVEI)
224 
225 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
226 
227 
228 #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
229 
230 #endif /* defined(ARM_MATH_MVEI) */
231 
232 
233 
234 #endif /*_ARM_MVE_TABLES_H*/
235 
236