1 /**
2 ****************************************************************************************
3 * @file app_io.c
4 * @author BLE Driver Team
5 * @brief HAL APP module driver.
6 ****************************************************************************************
7 * @attention
8 #####Copyright (c) 2019 GOODIX
9 All rights reserved.
10
11 Redistribution and use in source and binary forms, with or without
12 modification, are permitted provided that the following conditions are met:
13 * Redistributions of source code must retain the above copyright
14 notice, this list of conditions and the following disclaimer.
15 * Redistributions in binary form must reproduce the above copyright
16 notice, this list of conditions and the following disclaimer in the
17 documentation and/or other materials provided with the distribution.
18 * Neither the name of GOODIX nor the names of its contributors may be used
19 to endorse or promote products derived from this software without
20 specific prior written permission.
21
22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 POSSIBILITY OF SUCH DAMAGE.
33 ****************************************************************************************
34 */
35
36 /*
37 * INCLUDE FILES
38 *****************************************************************************************
39 */
40 #include "gr55xx_hal_gpio.h"
41 #include "gr55xx_hal_aon_gpio.h"
42 #include "gr55xx_hal_msio.h"
43 #include "app_io.h"
44
45 #ifndef GR5515_E
46 /*
47 * DEFINES
48 *****************************************************************************************
49 */
50 #define BIT_8 8
51 #define BIT_16 16
52 #define BIT_24 24
53
54 #define IO_MODE_NONE 0x00
55
56 /*
57 * LOCAL VARIABLE DEFINITIONS
58 *****************************************************************************************
59 */
60 static const uint32_t s_io_pull[APP_IO_TYPE_MAX][APP_IO_PULL_MAX] = {
61 { GPIO_NOPULL, GPIO_PULLUP, GPIO_PULLDOWN },
62 { AON_GPIO_NOPULL, AON_GPIO_PULLUP, AON_GPIO_PULLDOWN },
63 { MSIO_NOPULL, MSIO_PULLUP, MSIO_PULLDOWN },
64 };
65
66 static const uint32_t s_io_mode[APP_IO_TYPE_MAX][APP_IO_MODE_MAX] = {
67 {
68 GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_MUX, GPIO_MODE_IT_RISING,
69 GPIO_MODE_IT_FALLING, GPIO_MODE_IT_HIGH, GPIO_MODE_IT_LOW, IO_MODE_NONE
70 },
71 {
72 AON_GPIO_MODE_INPUT, AON_GPIO_MODE_OUTPUT, AON_GPIO_MODE_MUX, AON_GPIO_MODE_IT_RISING,
73 AON_GPIO_MODE_IT_FALLING, AON_GPIO_MODE_IT_HIGH, AON_GPIO_MODE_IT_LOW, IO_MODE_NONE
74 },
75 {
76 MSIO_DIRECTION_INPUT, MSIO_DIRECTION_OUTPUT, MSIO_DIRECTION_INPUT, IO_MODE_NONE,
77 IO_MODE_NONE, IO_MODE_NONE, IO_MODE_NONE, MSIO_DIRECTION_NONE
78 },
79 };
80
81 /*
82 * GLOBAL FUNCTION DEFINITIONS
83 ****************************************************************************************
84 */
app_io_init(app_io_type_t type,app_io_init_t * p_init)85 uint16_t app_io_init(app_io_type_t type, app_io_init_t *p_init)
86 {
87 gpio_init_t io_config;
88 aon_gpio_init_t aon_io_config;
89 msio_init_t msio_config;
90
91 if (p_init == NULL) {
92 return APP_DRV_ERR_POINTER_NULL;
93 } else {
94 switch (type) {
95 case APP_IO_TYPE_NORMAL:
96 if (APP_IO_MODE_ANALOG == p_init->mode) {
97 return APP_DRV_ERR_INVALID_MODE;
98 }
99
100 io_config.mode = s_io_mode[type][p_init->mode];
101 io_config.pull = s_io_pull[type][p_init->pull];
102 io_config.mux = p_init->mux;
103
104 if (APP_IO_PINS_0_15 & p_init->pin) {
105 io_config.pin = (APP_IO_PINS_0_15 & p_init->pin);
106 hal_gpio_init(GPIO0, &io_config);
107 }
108 if (APP_IO_PINS_16_31 & p_init->pin) {
109 io_config.pin = (APP_IO_PINS_16_31 & p_init->pin) >> BIT_16;
110 hal_gpio_init(GPIO1, &io_config);
111 }
112 break;
113
114 case APP_IO_TYPE_AON:
115 if (APP_IO_MODE_ANALOG == p_init->mode) {
116 return APP_DRV_ERR_INVALID_MODE;
117 }
118 aon_io_config.mode = s_io_mode[type][p_init->mode];
119 aon_io_config.pull = s_io_pull[type][p_init->pull];
120 aon_io_config.mux = p_init->mux;
121 aon_io_config.pin = (APP_AON_IO_PIN_ALL & p_init->pin);
122 hal_aon_gpio_init(&aon_io_config);
123 break;
124
125 case APP_IO_TYPE_MSIO:
126 if (p_init->mode >= APP_IO_MODE_IT_RISING && p_init->mode <= APP_IO_MODE_IT_LOW) {
127 return APP_DRV_ERR_INVALID_MODE;
128 }
129 msio_config.direction = (APP_IO_MODE_ANALOG == p_init->mode) ? \
130 MSIO_DIRECTION_INPUT : s_io_mode[type][p_init->mode];
131 msio_config.mode = (APP_IO_MODE_ANALOG == p_init->mode)? MSIO_MODE_ANALOG : MSIO_MODE_DIGITAL;
132 msio_config.pull = s_io_pull[type][p_init->pull];
133 msio_config.mux = p_init->mux;
134 msio_config.pin = (APP_MSIO_PIN_ALL & p_init->pin);
135 hal_msio_init(&msio_config);
136 break;
137
138 default:
139 return APP_DRV_ERR_INVALID_TYPE;
140 }
141 }
142
143 return APP_DRV_SUCCESS;
144 }
145
app_io_deinit(app_io_type_t type,uint32_t pin)146 uint16_t app_io_deinit(app_io_type_t type, uint32_t pin)
147 {
148 switch (type) {
149 case APP_IO_TYPE_NORMAL:
150 if (APP_IO_PINS_0_15 & pin) {
151 hal_gpio_deinit(GPIO0, (APP_IO_PINS_0_15 & pin));
152 }
153 if (APP_IO_PINS_16_31 & pin) {
154 hal_gpio_deinit(GPIO1, (APP_IO_PINS_16_31 & pin) >> BIT_16);
155 }
156 break;
157
158 case APP_IO_TYPE_AON:
159 hal_aon_gpio_deinit(APP_AON_IO_PIN_ALL & pin);
160 break;
161
162 case APP_IO_TYPE_MSIO:
163 hal_msio_deinit(APP_MSIO_PIN_ALL & pin);
164 break;
165
166 default:
167 return APP_DRV_ERR_INVALID_TYPE;
168 }
169
170 return APP_DRV_SUCCESS;
171 }
172
173
app_io_read_pin(app_io_type_t type,uint32_t pin)174 app_io_pin_state_t app_io_read_pin(app_io_type_t type, uint32_t pin)
175 {
176 app_io_pin_state_t pin_state = APP_IO_PIN_RESET;
177 gpio_pin_state_t io_pin_state = GPIO_PIN_RESET;
178 aon_gpio_pin_state_t aon_io_pin_state = AON_GPIO_PIN_RESET;
179 msio_pin_state_t msio_pin_state = MSIO_PIN_RESET;
180
181 switch (type) {
182 case APP_IO_TYPE_NORMAL:
183 if (APP_IO_PINS_0_15 & pin) {
184 io_pin_state = hal_gpio_read_pin(GPIO0, pin);
185 }
186 if (APP_IO_PINS_16_31 & pin) {
187 io_pin_state = hal_gpio_read_pin(GPIO1, pin >> BIT_16);
188 }
189 pin_state = (app_io_pin_state_t)io_pin_state;
190 break;
191
192 case APP_IO_TYPE_AON:
193 aon_io_pin_state = hal_aon_gpio_read_pin(pin);
194 pin_state = (app_io_pin_state_t)aon_io_pin_state;
195 break;
196
197 case APP_IO_TYPE_MSIO:
198 msio_pin_state = hal_msio_read_pin(pin);
199 pin_state = (app_io_pin_state_t)msio_pin_state;
200 break;
201
202 default:
203 break;
204 }
205
206 return pin_state;
207 }
208
app_io_write_pin(app_io_type_t type,uint32_t pin,app_io_pin_state_t pin_state)209 uint16_t app_io_write_pin(app_io_type_t type, uint32_t pin, app_io_pin_state_t pin_state)
210 {
211 if (pin_state != APP_IO_PIN_RESET && pin_state != APP_IO_PIN_SET) {
212 return APP_DRV_ERR_INVALID_PARAM;
213 }
214
215 switch (type) {
216 case APP_IO_TYPE_NORMAL:
217 if (APP_IO_PINS_0_15 & pin) {
218 hal_gpio_write_pin(GPIO0, (uint16_t)(APP_IO_PINS_0_15 & pin), (gpio_pin_state_t)pin_state);
219 }
220 if (APP_IO_PINS_16_31 & pin) {
221 hal_gpio_write_pin(GPIO1, (uint16_t)((APP_IO_PINS_16_31 & pin) >> BIT_16), (gpio_pin_state_t)pin_state);
222 }
223 break;
224
225 case APP_IO_TYPE_AON:
226 hal_aon_gpio_write_pin(pin, (aon_gpio_pin_state_t)pin_state);
227 break;
228
229 case APP_IO_TYPE_MSIO:
230 hal_msio_write_pin(pin, (msio_pin_state_t)pin_state);
231 break;
232
233 default:
234 return APP_DRV_ERR_INVALID_TYPE;
235 }
236
237 return APP_DRV_SUCCESS;
238 }
239
app_io_toggle_pin(app_io_type_t type,uint32_t pin)240 uint16_t app_io_toggle_pin(app_io_type_t type, uint32_t pin)
241 {
242 switch (type) {
243 case APP_IO_TYPE_NORMAL:
244 if (APP_IO_PINS_0_15 & pin) {
245 hal_gpio_toggle_pin(GPIO0, (uint16_t)(APP_IO_PINS_0_15 & pin));
246 }
247 if (APP_IO_PINS_16_31 & pin) {
248 hal_gpio_toggle_pin(GPIO1, (uint16_t)((APP_IO_PINS_16_31 & pin) >> BIT_16));
249 }
250 break;
251
252 case APP_IO_TYPE_AON:
253 hal_aon_gpio_toggle_pin(pin);
254 break;
255
256 case APP_IO_TYPE_MSIO:
257 hal_msio_toggle_pin(pin);
258 break;
259
260 default:
261 return APP_DRV_ERR_INVALID_TYPE;
262 }
263
264 return APP_DRV_SUCCESS;
265 }
266 #else
267
app_io_init(app_io_type_t type,app_io_init_t * p_init)268 uint16_t app_io_init(app_io_type_t type, app_io_init_t *p_init)
269 {
270 return app_io_init_sym(type, p_init);
271 }
272
app_io_deinit(app_io_type_t type,uint32_t pin)273 uint16_t app_io_deinit(app_io_type_t type, uint32_t pin)
274 {
275 return app_io_deinit_sym(type, pin);
276 }
277
app_io_read_pin(app_io_type_t type,uint32_t pin)278 app_io_pin_state_t app_io_read_pin(app_io_type_t type, uint32_t pin)
279 {
280 return app_io_read_pin_sym(type, pin);
281 }
282
app_io_write_pin(app_io_type_t type,uint32_t pin,app_io_pin_state_t pin_state)283 uint16_t app_io_write_pin(app_io_type_t type, uint32_t pin, app_io_pin_state_t pin_state)
284 {
285 return app_io_write_pin_sym(type, pin, pin_state);
286 }
287
app_io_toggle_pin(app_io_type_t type,uint32_t pin)288 uint16_t app_io_toggle_pin(app_io_type_t type, uint32_t pin)
289 {
290 return app_io_toggle_pin_sym(type, pin);
291 }
292 #endif
293
294