1 /*
2 * Copyright 2012 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * based on nouveau_prime.c
23 *
24 * Authors: Alex Deucher
25 */
26
27 /**
28 * DOC: PRIME Buffer Sharing
29 *
30 * The following callback implementations are used for :ref:`sharing GEM buffer
31 * objects between different devices via PRIME <prime_buffer_sharing>`.
32 */
33
34 #include <drm/drmP.h>
35
36 #include "amdgpu.h"
37 #include "amdgpu_display.h"
38 #include <drm/amdgpu_drm.h>
39 #include <linux/dma-buf.h>
40 #include <linux/dma-fence-array.h>
41
42 static const struct dma_buf_ops amdgpu_dmabuf_ops;
43
44 /**
45 * amdgpu_gem_prime_get_sg_table - &drm_driver.gem_prime_get_sg_table
46 * implementation
47 * @obj: GEM buffer object
48 *
49 * Returns:
50 * A scatter/gather table for the pinned pages of the buffer object's memory.
51 */
amdgpu_gem_prime_get_sg_table(struct drm_gem_object * obj)52 struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj)
53 {
54 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
55 int npages = bo->tbo.num_pages;
56
57 return drm_prime_pages_to_sg(bo->tbo.ttm->pages, npages);
58 }
59
60 /**
61 * amdgpu_gem_prime_vmap - &dma_buf_ops.vmap implementation
62 * @obj: GEM buffer object
63 *
64 * Sets up an in-kernel virtual mapping of the buffer object's memory.
65 *
66 * Returns:
67 * The virtual address of the mapping or an error pointer.
68 */
amdgpu_gem_prime_vmap(struct drm_gem_object * obj)69 void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj)
70 {
71 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
72 int ret;
73
74 ret = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages,
75 &bo->dma_buf_vmap);
76 if (ret)
77 return ERR_PTR(ret);
78
79 return bo->dma_buf_vmap.virtual;
80 }
81
82 /**
83 * amdgpu_gem_prime_vunmap - &dma_buf_ops.vunmap implementation
84 * @obj: GEM buffer object
85 * @vaddr: virtual address (unused)
86 *
87 * Tears down the in-kernel virtual mapping of the buffer object's memory.
88 */
amdgpu_gem_prime_vunmap(struct drm_gem_object * obj,void * vaddr)89 void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
90 {
91 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
92
93 ttm_bo_kunmap(&bo->dma_buf_vmap);
94 }
95
96 /**
97 * amdgpu_gem_prime_mmap - &drm_driver.gem_prime_mmap implementation
98 * @obj: GEM buffer object
99 * @vma: virtual memory area
100 *
101 * Sets up a userspace mapping of the buffer object's memory in the given
102 * virtual memory area.
103 *
104 * Returns:
105 * 0 on success or negative error code.
106 */
amdgpu_gem_prime_mmap(struct drm_gem_object * obj,struct vm_area_struct * vma)107 int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma)
108 {
109 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
110 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
111 unsigned asize = amdgpu_bo_size(bo);
112 int ret;
113
114 if (!vma->vm_file)
115 return -ENODEV;
116
117 if (adev == NULL)
118 return -ENODEV;
119
120 /* Check for valid size. */
121 if (asize < vma->vm_end - vma->vm_start)
122 return -EINVAL;
123
124 if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
125 (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
126 return -EPERM;
127 }
128 vma->vm_pgoff += amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
129
130 /* prime mmap does not need to check access, so allow here */
131 ret = drm_vma_node_allow(&obj->vma_node, vma->vm_file->private_data);
132 if (ret)
133 return ret;
134
135 ret = ttm_bo_mmap(vma->vm_file, vma, &adev->mman.bdev);
136 drm_vma_node_revoke(&obj->vma_node, vma->vm_file->private_data);
137
138 return ret;
139 }
140
141 /**
142 * amdgpu_gem_prime_import_sg_table - &drm_driver.gem_prime_import_sg_table
143 * implementation
144 * @dev: DRM device
145 * @attach: DMA-buf attachment
146 * @sg: Scatter/gather table
147 *
148 * Import shared DMA buffer memory exported by another device.
149 *
150 * Returns:
151 * A new GEM buffer object of the given DRM device, representing the memory
152 * described by the given DMA-buf attachment and scatter/gather table.
153 */
154 struct drm_gem_object *
amdgpu_gem_prime_import_sg_table(struct drm_device * dev,struct dma_buf_attachment * attach,struct sg_table * sg)155 amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
156 struct dma_buf_attachment *attach,
157 struct sg_table *sg)
158 {
159 struct reservation_object *resv = attach->dmabuf->resv;
160 struct amdgpu_device *adev = dev->dev_private;
161 struct amdgpu_bo *bo;
162 struct amdgpu_bo_param bp;
163 int ret;
164
165 memset(&bp, 0, sizeof(bp));
166 bp.size = attach->dmabuf->size;
167 bp.byte_align = PAGE_SIZE;
168 bp.domain = AMDGPU_GEM_DOMAIN_CPU;
169 bp.flags = 0;
170 bp.type = ttm_bo_type_sg;
171 bp.resv = resv;
172 ww_mutex_lock(&resv->lock, NULL);
173 ret = amdgpu_bo_create(adev, &bp, &bo);
174 if (ret)
175 goto error;
176
177 bo->tbo.sg = sg;
178 bo->tbo.ttm->sg = sg;
179 bo->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
180 bo->preferred_domains = AMDGPU_GEM_DOMAIN_GTT;
181 if (attach->dmabuf->ops != &amdgpu_dmabuf_ops)
182 bo->prime_shared_count = 1;
183
184 ww_mutex_unlock(&resv->lock);
185 return &bo->gem_base;
186
187 error:
188 ww_mutex_unlock(&resv->lock);
189 return ERR_PTR(ret);
190 }
191
192 static int
__reservation_object_make_exclusive(struct reservation_object * obj)193 __reservation_object_make_exclusive(struct reservation_object *obj)
194 {
195 struct dma_fence **fences;
196 unsigned int count;
197 int r;
198
199 if (!reservation_object_get_list(obj)) /* no shared fences to convert */
200 return 0;
201
202 r = reservation_object_get_fences_rcu(obj, NULL, &count, &fences);
203 if (r)
204 return r;
205
206 if (count == 0) {
207 /* Now that was unexpected. */
208 } else if (count == 1) {
209 reservation_object_add_excl_fence(obj, fences[0]);
210 dma_fence_put(fences[0]);
211 kfree(fences);
212 } else {
213 struct dma_fence_array *array;
214
215 array = dma_fence_array_create(count, fences,
216 dma_fence_context_alloc(1), 0,
217 false);
218 if (!array)
219 goto err_fences_put;
220
221 reservation_object_add_excl_fence(obj, &array->base);
222 dma_fence_put(&array->base);
223 }
224
225 return 0;
226
227 err_fences_put:
228 while (count--)
229 dma_fence_put(fences[count]);
230 kfree(fences);
231 return -ENOMEM;
232 }
233
234 /**
235 * amdgpu_gem_map_attach - &dma_buf_ops.attach implementation
236 * @dma_buf: shared DMA buffer
237 * @attach: DMA-buf attachment
238 *
239 * Makes sure that the shared DMA buffer can be accessed by the target device.
240 * For now, simply pins it to the GTT domain, where it should be accessible by
241 * all DMA devices.
242 *
243 * Returns:
244 * 0 on success or negative error code.
245 */
amdgpu_gem_map_attach(struct dma_buf * dma_buf,struct dma_buf_attachment * attach)246 static int amdgpu_gem_map_attach(struct dma_buf *dma_buf,
247 struct dma_buf_attachment *attach)
248 {
249 struct drm_gem_object *obj = dma_buf->priv;
250 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
251 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
252 long r;
253
254 r = drm_gem_map_attach(dma_buf, attach);
255 if (r)
256 return r;
257
258 r = amdgpu_bo_reserve(bo, false);
259 if (unlikely(r != 0))
260 goto error_detach;
261
262
263 if (attach->dev->driver != adev->dev->driver) {
264 /*
265 * We only create shared fences for internal use, but importers
266 * of the dmabuf rely on exclusive fences for implicitly
267 * tracking write hazards. As any of the current fences may
268 * correspond to a write, we need to convert all existing
269 * fences on the reservation object into a single exclusive
270 * fence.
271 */
272 r = __reservation_object_make_exclusive(bo->tbo.resv);
273 if (r)
274 goto error_unreserve;
275 }
276
277 /* pin buffer into GTT */
278 r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);
279 if (r)
280 goto error_unreserve;
281
282 if (attach->dev->driver != adev->dev->driver)
283 bo->prime_shared_count++;
284
285 error_unreserve:
286 amdgpu_bo_unreserve(bo);
287
288 error_detach:
289 if (r)
290 drm_gem_map_detach(dma_buf, attach);
291 return r;
292 }
293
294 /**
295 * amdgpu_gem_map_detach - &dma_buf_ops.detach implementation
296 * @dma_buf: shared DMA buffer
297 * @attach: DMA-buf attachment
298 *
299 * This is called when a shared DMA buffer no longer needs to be accessible by
300 * the other device. For now, simply unpins the buffer from GTT.
301 */
amdgpu_gem_map_detach(struct dma_buf * dma_buf,struct dma_buf_attachment * attach)302 static void amdgpu_gem_map_detach(struct dma_buf *dma_buf,
303 struct dma_buf_attachment *attach)
304 {
305 struct drm_gem_object *obj = dma_buf->priv;
306 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
307 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
308 int ret = 0;
309
310 ret = amdgpu_bo_reserve(bo, true);
311 if (unlikely(ret != 0))
312 goto error;
313
314 amdgpu_bo_unpin(bo);
315 if (attach->dev->driver != adev->dev->driver && bo->prime_shared_count)
316 bo->prime_shared_count--;
317 amdgpu_bo_unreserve(bo);
318
319 error:
320 drm_gem_map_detach(dma_buf, attach);
321 }
322
323 /**
324 * amdgpu_gem_prime_res_obj - &drm_driver.gem_prime_res_obj implementation
325 * @obj: GEM buffer object
326 *
327 * Returns:
328 * The buffer object's reservation object.
329 */
amdgpu_gem_prime_res_obj(struct drm_gem_object * obj)330 struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
331 {
332 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
333
334 return bo->tbo.resv;
335 }
336
337 /**
338 * amdgpu_gem_begin_cpu_access - &dma_buf_ops.begin_cpu_access implementation
339 * @dma_buf: shared DMA buffer
340 * @direction: direction of DMA transfer
341 *
342 * This is called before CPU access to the shared DMA buffer's memory. If it's
343 * a read access, the buffer is moved to the GTT domain if possible, for optimal
344 * CPU read performance.
345 *
346 * Returns:
347 * 0 on success or negative error code.
348 */
amdgpu_gem_begin_cpu_access(struct dma_buf * dma_buf,enum dma_data_direction direction)349 static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf,
350 enum dma_data_direction direction)
351 {
352 struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
353 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
354 struct ttm_operation_ctx ctx = { true, false };
355 u32 domain = amdgpu_display_supported_domains(adev);
356 int ret;
357 bool reads = (direction == DMA_BIDIRECTIONAL ||
358 direction == DMA_FROM_DEVICE);
359
360 if (!reads || !(domain & AMDGPU_GEM_DOMAIN_GTT))
361 return 0;
362
363 /* move to gtt */
364 ret = amdgpu_bo_reserve(bo, false);
365 if (unlikely(ret != 0))
366 return ret;
367
368 if (!bo->pin_count && (bo->allowed_domains & AMDGPU_GEM_DOMAIN_GTT)) {
369 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
370 ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
371 }
372
373 amdgpu_bo_unreserve(bo);
374 return ret;
375 }
376
377 static const struct dma_buf_ops amdgpu_dmabuf_ops = {
378 .attach = amdgpu_gem_map_attach,
379 .detach = amdgpu_gem_map_detach,
380 .map_dma_buf = drm_gem_map_dma_buf,
381 .unmap_dma_buf = drm_gem_unmap_dma_buf,
382 .release = drm_gem_dmabuf_release,
383 .begin_cpu_access = amdgpu_gem_begin_cpu_access,
384 .map = drm_gem_dmabuf_kmap,
385 .unmap = drm_gem_dmabuf_kunmap,
386 .mmap = drm_gem_dmabuf_mmap,
387 .vmap = drm_gem_dmabuf_vmap,
388 .vunmap = drm_gem_dmabuf_vunmap,
389 };
390
391 /**
392 * amdgpu_gem_prime_export - &drm_driver.gem_prime_export implementation
393 * @dev: DRM device
394 * @gobj: GEM buffer object
395 * @flags: flags like DRM_CLOEXEC and DRM_RDWR
396 *
397 * The main work is done by the &drm_gem_prime_export helper, which in turn
398 * uses &amdgpu_gem_prime_res_obj.
399 *
400 * Returns:
401 * Shared DMA buffer representing the GEM buffer object from the given device.
402 */
amdgpu_gem_prime_export(struct drm_device * dev,struct drm_gem_object * gobj,int flags)403 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
404 struct drm_gem_object *gobj,
405 int flags)
406 {
407 struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
408 struct dma_buf *buf;
409
410 if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
411 bo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID)
412 return ERR_PTR(-EPERM);
413
414 buf = drm_gem_prime_export(dev, gobj, flags);
415 if (!IS_ERR(buf)) {
416 buf->file->f_mapping = dev->anon_inode->i_mapping;
417 buf->ops = &amdgpu_dmabuf_ops;
418 }
419
420 return buf;
421 }
422
423 /**
424 * amdgpu_gem_prime_import - &drm_driver.gem_prime_import implementation
425 * @dev: DRM device
426 * @dma_buf: Shared DMA buffer
427 *
428 * The main work is done by the &drm_gem_prime_import helper, which in turn
429 * uses &amdgpu_gem_prime_import_sg_table.
430 *
431 * Returns:
432 * GEM buffer object representing the shared DMA buffer for the given device.
433 */
amdgpu_gem_prime_import(struct drm_device * dev,struct dma_buf * dma_buf)434 struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
435 struct dma_buf *dma_buf)
436 {
437 struct drm_gem_object *obj;
438
439 if (dma_buf->ops == &amdgpu_dmabuf_ops) {
440 obj = dma_buf->priv;
441 if (obj->dev == dev) {
442 /*
443 * Importing dmabuf exported from out own gem increases
444 * refcount on gem itself instead of f_count of dmabuf.
445 */
446 drm_gem_object_get(obj);
447 return obj;
448 }
449 }
450
451 return drm_gem_prime_import(dev, dma_buf);
452 }
453