1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_adc.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of ADC LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_ADC ADC
47 * @brief ADC LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_ADC_H__
53 #define __GR55XX_LL_ADC_H__
54
55 /* Includes ------------------------------------------------------------------*/
56 #include "gr55xx.h"
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 #if defined(AON)
63
64 /** @defgroup LL_ADC_STRUCTURES Structures
65 * @{
66 */
67
68 /* Exported types ------------------------------------------------------------*/
69 /** @defgroup LL_ADC_ES_INIT ADC Exported init structures
70 * @{
71 */
72
73 /**
74 * @brief LL ADC init Structure definition
75 */
76 typedef struct _ll_adc_init {
77 uint32_t channel_p; /**< Specifies the input source to ADC channel P.
78 This parameter can be any value of @ref LL_ADC_EC_INPUT_SRC.
79 This parament can be modified afterwards using unitary function
80 @ref ll_adc_set_channelp(). */
81
82 uint32_t channel_n; /**< Specifies the input source to ADC channel N.
83 This parameter can be any value of @ref LL_ADC_EC_INPUT_SRC.
84 This parament can be modified afterwards using unitary function
85 @ref ll_adc_set_channeln(). */
86
87 uint32_t input_mode; /**< Specifies the operation mode for the ADC sample.
88 This parameter can be a value of @ref LL_ADC_EC_INPUT_MODE.
89 This parament can be modified afterwards using unitary function
90 @ref ll_adc_set_input_mode(). */
91
92 uint32_t ref_source; /**< Specifies the source of the ADC reference.
93 This parameter can be a value of @ref LL_ADC_EC_REFERENCE_SRC.
94 This parament can be modified afterwards using unitary function
95 @ref ll_adc_set_ref(). */
96
97 uint32_t ref_value; /*!< Specifies the value of the ADC buffered reference.
98 This parameter can be a value of @ref LL_ADC_EC_REFERENCE.
99 This parament can be modified afterwards using unitary function
100 @ref ll_adc_set_ref_value(). */
101
102 uint32_t clock; /**< Specifies the clock of ADC.
103 This parameter can be a value of @ref LL_ADC_EC_CLK.
104 This parament can be modified afterwards using unitary function
105 @ref ll_adc_set_clock(). */
106 } ll_adc_init_t;
107
108 /** @} */
109
110 /** @} */
111
112 /**
113 * @defgroup LL_ADC_MACRO Defines
114 * @{
115 */
116
117 /* Exported constants --------------------------------------------------------*/
118 /** @defgroup LL_ADC_Exported_Constants ADC Exported Constants
119 * @{
120 */
121
122 /** @defgroup LL_ADC_EC_CLK ADC CLOCK
123 * @{
124 */
125 #define LL_ADC_CLK_16 (0x00000000UL) /**< 16 MHz */
126 #define LL_ADC_CLK_8 (1UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 8 MHz */
127 #define LL_ADC_CLK_4 (2UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 4 MHz */
128 #define LL_ADC_CLK_2 (3UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 2 MHz */
129 #define LL_ADC_CLK_1P6 (4UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 1.6 MHz */
130 #define LL_ADC_CLK_1 (5UL << AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos) /**< 1 MHz */
131 /** @} */
132
133 /** @defgroup LL_ADC_EC_REFERENCE ADC Buffered Internal Reference Value
134 * @{
135 */
136 #define LL_ADC_REF_VALUE_0P8 (0x3UL << AON_SNSADC_CFG_REF_VALUE_Pos) /**< Reference = 0.85 V */
137 #define LL_ADC_REF_VALUE_1P2 (0x7UL << AON_SNSADC_CFG_REF_VALUE_Pos) /**< Reference = 1.28 V */
138 #define LL_ADC_REF_VALUE_1P6 (0xAUL << AON_SNSADC_CFG_REF_VALUE_Pos) /**< Reference = 1.60 V */
139
140 /** @} */
141
142 /** @defgroup LL_ADC_EC_INPUT_MODE ADC Input Mode
143 * @{
144 */
145 #define LL_ADC_INPUT_SINGLE (1UL << AON_SNSADC_CFG_SINGLE_EN_Pos) /**< Single ended mode */
146 #define LL_ADC_INPUT_DIFFERENTIAL (0x00000000UL) /**< Differential mode */
147 /** @} */
148
149 /** @defgroup LL_ADC_EC_INPUT_SRC ADC Input Source
150 * @{
151 */
152 #define LL_ADC_INPUT_SRC_IO0 (0UL) /**< Select MSIO0 as input */
153 #define LL_ADC_INPUT_SRC_IO1 (1UL) /**< Select MSIO1 as input */
154 #define LL_ADC_INPUT_SRC_IO2 (2UL) /**< Select MSIO2 as input */
155 #define LL_ADC_INPUT_SRC_IO3 (3UL) /**< Select MSIO3 as input */
156 #define LL_ADC_INPUT_SRC_IO4 (4UL) /**< Select MSIO4 as input */
157 #define LL_ADC_INPUT_SRC_TMP (5UL) /**< Select temperature as input */
158 #define LL_ADC_INPUT_SRC_BAT (6UL) /**< Select Vbattery as input */
159 #define LL_ADC_INPUT_SRC_REF (7UL) /**< Select reference as input */
160
161 /** @} */
162
163 /** @defgroup LL_ADC_EC_REFERENCE_SRC ADC Reference Source
164 * @{
165 */
166 #define LL_ADC_REF_SRC_BUF_INT (0x00000000UL) /**< Select buffered internal
167 reference as reference */
168 #define LL_ADC_REF_SRC_IO0 (3UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO0 as reference */
169 #define LL_ADC_REF_SRC_IO1 (4UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO1 as reference */
170 #define LL_ADC_REF_SRC_IO2 (5UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO2 as reference */
171 #define LL_ADC_REF_SRC_IO3 (6UL << AON_SNSADC_CFG_REF_SEL_Pos) /**< Select MSIO3 as reference */
172 /** @} */
173
174 /** @} */
175
176 /* Exported macro ------------------------------------------------------------*/
177 /** @defgroup LL_ADC_Exported_Macros ADC Exported Macros
178 * @{
179 */
180
181 /** @defgroup LL_ADC_EM_WRITE_READ Common Write and read registers Macros
182 * @{
183 */
184
185 /**
186 * @brief Write a value in ADC register
187 * @param __instance__ ADC instance
188 * @param __REG__ Register to be written
189 * @param __VALUE__ Value to be written in the register
190 * @retval None
191 */
192 #define LL_ADC_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG((__instance__)->__REG__, (__VALUE__))
193
194 /**
195 * @brief Read a value in ADC register
196 * @param __instance__ ADC instance
197 * @param __REG__ Register to be read
198 * @retval Register value
199 */
200 #define LL_ADC_ReadReg(__instance__, __REG__) READ_REG((__instance__)->__REG__)
201
202 /** @} */
203
204 /** @} */
205
206 /* Private types -------------------------------------------------------------*/
207 /* Private variables ---------------------------------------------------------*/
208 /* Private constants ---------------------------------------------------------*/
209 /* Private macros ------------------------------------------------------------*/
210 /** @defgroup LL_ADC_Private_Macros ADC Private Macros
211 * @{
212 */
213
214 /** @defgroup LL_ADC_EC_DEFAULT_CONFIG InitStruct default configuartion
215 * @{
216 */
217
218 /**
219 * @brief LL ADC InitStrcut default configuartion
220 */
221 #define LL_ADC_DEFAULT_CONFIG \
222 { \
223 .channel_p = LL_ADC_INPUT_SRC_IO0, \
224 .channel_n = LL_ADC_INPUT_SRC_IO1, \
225 .input_mode = LL_ADC_INPUT_DIFFERENTIAL, \
226 .ref_source = LL_ADC_REF_SRC_BUF_INT, \
227 .ref_value = LL_ADC_REF_VALUE_1P5, \
228 .clock = LL_ADC_CLK_16 \
229 }
230 /** @} */
231
232 /** @} */
233
234 /** @} */
235
236 /* Exported functions --------------------------------------------------------*/
237 /** @defgroup LL_ADC_DRIVER_FUNCTIONS Functions
238 * @{
239 */
240
241 /** @defgroup LL_ADC_EF_Configuration Basic Configuration
242 * @{
243 */
244
245 /**
246 * @brief Enable ADC module.
247 *
248 * Register|BitsName
249 * --------|--------
250 * SNSADC_CFG | REG4
251 *
252 * @retval None
253 */
ll_adc_enable(void)254 __STATIC_INLINE void ll_adc_enable(void)
255 {
256 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk);
257 }
258
259 /**
260 * @brief Disable ADC module.
261 *
262 * Register|BitsName
263 * --------|--------
264 * SNSADC_CFG | REG4
265 *
266 * @retval None
267 */
ll_adc_disable(void)268 __STATIC_INLINE void ll_adc_disable(void)
269 {
270 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk);
271 }
272
273 /**
274 * @brief Check if ADC module is enabled.
275 *
276 * Register|BitsName
277 * --------|--------
278 * SNSADC_CFG | REG4
279 *
280 * @retval State of bit (1 or 0).
281 */
ll_adc_is_enabled(void)282 __STATIC_INLINE uint32_t ll_adc_is_enabled(void)
283 {
284 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_EN_Msk) == (AON_SNSADC_CFG_EN_Msk));
285 }
286
287 /**
288 * @brief Enable ADC clock.
289 *
290 * Register|BitsName
291 * --------|--------
292 * MSIO_PAD_CFG_1 | ADC_CLK_EN
293 *
294 * @retval None
295 */
ll_adc_enable_clock(void)296 __STATIC_INLINE void ll_adc_enable_clock(void)
297 {
298 GLOBAL_EXCEPTION_DISABLE();
299 SET_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN);
300 GLOBAL_EXCEPTION_ENABLE();
301 }
302
303 /**
304 * @brief Disable ADC clock.
305 *
306 * Register|BitsName
307 * --------|--------
308 * MSIO_PAD_CFG_1 | ADC_CLK_EN
309 *
310 * @retval None
311 */
ll_adc_disable_clock(void)312 __STATIC_INLINE void ll_adc_disable_clock(void)
313 {
314 GLOBAL_EXCEPTION_DISABLE();
315 CLEAR_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN);
316 GLOBAL_EXCEPTION_ENABLE();
317 }
318
319 /**
320 * @brief Check if ADC clock is enabled.
321 *
322 * Register|BitsName
323 * --------|--------
324 * MSIO_PAD_CFG_1 | ADC_CLK_EN
325 *
326 * @retval State of bit (1 or 0).
327 */
ll_adc_is_enabled_clock(void)328 __STATIC_INLINE uint32_t ll_adc_is_enabled_clock(void)
329 {
330 return (READ_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_EN) == (AON_MSIO_PAD_CFG_1_ADC_CLK_EN));
331 }
332
333 /**
334 * @brief Set ADC clock source.
335 *
336 * Register|BitsName
337 * --------|--------
338 * MSIO_PAD_CFG_1 | ADC_CLK_SEL
339 *
340 * @param clk This parameter can be one of the following values:
341 * @arg @ref LL_ADC_CLK_16
342 * @arg @ref LL_ADC_CLK_8
343 * @arg @ref LL_ADC_CLK_4
344 * @arg @ref LL_ADC_CLK_2
345 * @arg @ref LL_ADC_CLK_1P6
346 * @arg @ref LL_ADC_CLK_1
347 * @retval None
348 */
ll_adc_set_clock(uint32_t clk)349 __STATIC_INLINE void ll_adc_set_clock(uint32_t clk)
350 {
351 GLOBAL_EXCEPTION_DISABLE();
352 MODIFY_REG(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_SEL, clk);
353 GLOBAL_EXCEPTION_ENABLE();
354 }
355
356 /**
357 * @brief Return source for ADC clock.
358 *
359 * Register|BitsName
360 * --------|--------
361 * MSIO_PAD_CFG_1 | ADC_CLK_SEL
362 *
363 * @retval Returned value can be one of the following values:
364 * @arg @ref LL_ADC_CLK_16
365 * @arg @ref LL_ADC_CLK_8
366 * @arg @ref LL_ADC_CLK_4
367 * @arg @ref LL_ADC_CLK_2
368 * @arg @ref LL_ADC_CLK_1P6
369 * @arg @ref LL_ADC_CLK_1
370 */
ll_adc_get_clock(void)371 __STATIC_INLINE uint32_t ll_adc_get_clock(void)
372 {
373 return (uint32_t)(READ_BITS(AON->MSIO_PAD_CFG_1, AON_MSIO_PAD_CFG_1_ADC_CLK_SEL) >> \
374 AON_MSIO_PAD_CFG_1_ADC_CLK_SEL_Pos);
375 }
376
377 /**
378 * @brief Set ADC bias reference.
379 *
380 * Register|BitsName
381 * --------|--------
382 * SNSADC_CFG | REG1
383 *
384 * @param value This parameter can be one of the following values:
385 * @arg @ref LL_ADC_REF_VALUE_0P8
386 * @arg @ref LL_ADC_REF_VALUE_1P2
387 * @arg @ref LL_ADC_REF_VALUE_1P6
388 * @retval None
389 */
ll_adc_set_ref_value(uint32_t value)390 __STATIC_INLINE void ll_adc_set_ref_value(uint32_t value)
391 {
392 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_VALUE_Msk, value);
393 }
394
395 /**
396 * @brief Return ADC bias reference.
397 *
398 * Register|BitsName
399 * --------|--------
400 * SNSADC_CFG | REG1
401 *
402 * @retval Returned value can be one of the following values:
403 * @arg @ref LL_ADC_REF_VALUE_0P8
404 * @arg @ref LL_ADC_REF_VALUE_1P2
405 * @arg @ref LL_ADC_REF_VALUE_1P6
406 */
ll_adc_get_ref_value(void)407 __STATIC_INLINE uint32_t ll_adc_get_ref_value(void)
408 {
409 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_VALUE_Msk) >> AON_SNSADC_CFG_REF_VALUE_Pos);
410 }
411
412 /**
413 * @brief Enable temperature sensor.
414 *
415 * Register|BitsName
416 * --------|--------
417 * SNSADC_CFG | REG2
418 *
419 * @retval None
420 */
ll_adc_enable_temp(void)421 __STATIC_INLINE void ll_adc_enable_temp(void)
422 {
423 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk);
424 }
425
426 /**
427 * @brief Disable temperature sensor.
428 *
429 * Register|BitsName
430 * --------|--------
431 * SNSADC_CFG | REG2
432 *
433 * @retval None
434 */
ll_adc_disable_temp(void)435 __STATIC_INLINE void ll_adc_disable_temp(void)
436 {
437 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk);
438 }
439
440 /**
441 * @brief Check if temperature sensor is enabled.
442 *
443 * Register|BitsName
444 * --------|--------
445 * SNSADC_CFG | REG2
446 *
447 * @retval State of bit (1 or 0).
448 */
ll_adc_is_enabled_temp(void)449 __STATIC_INLINE uint32_t ll_adc_is_enabled_temp(void)
450 {
451 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_TEMP_EN_Msk) == (AON_SNSADC_CFG_TEMP_EN_Msk));
452 }
453
454 /**
455 * @brief Enable Vbattery sensor.
456 *
457 * Register|BitsName
458 * --------|--------
459 * SNSADC_CFG | REG2
460 *
461 * @retval None
462 */
ll_adc_enable_vbat(void)463 __STATIC_INLINE void ll_adc_enable_vbat(void)
464 {
465 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk);
466 }
467
468 /**
469 * @brief Disable Vbattery sensor.
470 *
471 * Register|BitsName
472 * --------|--------
473 * SNSADC_CFG | REG2
474 *
475 * @retval None
476 */
ll_adc_disable_vbat(void)477 __STATIC_INLINE void ll_adc_disable_vbat(void)
478 {
479 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk);
480 }
481
482 /**
483 * @brief Check if Vbattery sensor is enabled.
484 *
485 * Register|BitsName
486 * --------|--------
487 * SNSADC_CFG | REG2
488 *
489 * @retval State of bit (1 or 0).
490 */
ll_adc_is_enabled_vbat(void)491 __STATIC_INLINE uint32_t ll_adc_is_enabled_vbat(void)
492 {
493 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_VBAT_EN_Msk) == (AON_SNSADC_CFG_VBAT_EN_Msk));
494 }
495
496 /**
497 * @brief Set ADC input mode.
498 *
499 * Register|BitsName
500 * --------|--------
501 * SNSADC_CFG | REG2
502 *
503 * @param mode This parameter can be one of the following values:
504 * @arg @ref LL_ADC_INPUT_SINGLE
505 * @arg @ref LL_ADC_INPUT_DIFFERENTIAL
506 * @retval None
507 */
ll_adc_set_input_mode(uint32_t mode)508 __STATIC_INLINE void ll_adc_set_input_mode(uint32_t mode)
509 {
510 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_SINGLE_EN_Msk, mode);
511 }
512
513 /**
514 * @brief Return ADC input mode.
515 *
516 * Register|BitsName
517 * --------|--------
518 * SNSADC_CFG | REG2
519 *
520 * @retval Returned value can be one of the following values:
521 * @arg @ref LL_ADC_INPUT_SINGLE
522 * @arg @ref LL_ADC_INPUT_DIFFERENTIAL
523 */
ll_adc_get_input_mode(void)524 __STATIC_INLINE uint32_t ll_adc_get_input_mode(void)
525 {
526 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_SINGLE_EN_Msk) >> AON_SNSADC_CFG_SINGLE_EN_Pos);
527 }
528
529 /**
530 * @brief Enable offset calibration.
531 * @note Enable offset calibration, used to swap inputs of comparator for offset
532 * calibration.
533 *
534 * Register|BitsName
535 * --------|--------
536 * SNSADC_CFG | REG2
537 *
538 * @retval None
539 */
ll_adc_enable_ofs_cal(void)540 __STATIC_INLINE void ll_adc_enable_ofs_cal(void)
541 {
542 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk);
543 }
544
545 /**
546 * @brief Disable offset calibration.
547 *
548 * Register|BitsName
549 * --------|--------
550 * SNSADC_CFG | REG2
551 *
552 * @retval None
553 */
ll_adc_disable_ofs_cal(void)554 __STATIC_INLINE void ll_adc_disable_ofs_cal(void)
555 {
556 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk);
557 }
558
559 /**
560 * @brief Check if offset calibration is enabled.
561 *
562 * Register|BitsName
563 * --------|--------
564 * SNSADC_CFG | REG2
565 *
566 * @retval State of bit (1 or 0).
567 */
ll_adc_is_enabled_ofs_cal(void)568 __STATIC_INLINE uint32_t ll_adc_is_enabled_ofs_cal(void)
569 {
570 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_OFS_CAL_EN_Msk) == (AON_SNSADC_CFG_OFS_CAL_EN_Msk));
571 }
572
573 /**
574 * @brief Set dynamic rang of ADC.
575 * @note When higher input signal frequencies close to Nyquist rate, you should set 1.
576 *
577 * Register|BitsName
578 * --------|--------
579 * SNSADC_CFG | REG2
580 *
581 * @param rang This parameter can be a value between: 1 ~ 7
582 * @retval None
583 */
ll_adc_set_dynamic_rang(uint32_t rang)584 __STATIC_INLINE void ll_adc_set_dynamic_rang(uint32_t rang)
585 {
586 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_DYMAMIC_Msk, (rang & 0x7) << AON_SNSADC_CFG_DYMAMIC_Pos);
587 }
588
589 /**
590 * @brief Return ADC dynamic rang.
591 *
592 * Register|BitsName
593 * --------|--------
594 * SNSADC_CFG | REG2
595 *
596 * @retval Returned value can be a value between: 1 ~ 7
597 */
ll_adc_get_dynamic_rang(void)598 __STATIC_INLINE uint32_t ll_adc_get_dynamic_rang(void)
599 {
600 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_DYMAMIC_Msk) >> AON_SNSADC_CFG_DYMAMIC_Pos);
601 }
602
603 /**
604 * @brief Set source of ADC input channelP.
605 *
606 * Register|BitsName
607 * --------|--------
608 * SNSADC_CFG | REG3
609 *
610 * @param source This parameter can be one of the following values:
611 * @arg @ref LL_ADC_INPUT_SRC_IO0
612 * @arg @ref LL_ADC_INPUT_SRC_IO1
613 * @arg @ref LL_ADC_INPUT_SRC_IO2
614 * @arg @ref LL_ADC_INPUT_SRC_IO3
615 * @arg @ref LL_ADC_INPUT_SRC_IO4
616 * @arg @ref LL_ADC_INPUT_SRC_TMP
617 * @arg @ref LL_ADC_INPUT_SRC_BAT
618 * @retval None
619 */
ll_adc_set_channelp(uint32_t source)620 __STATIC_INLINE void ll_adc_set_channelp(uint32_t source)
621 {
622 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_P_Msk, source << AON_SNSADC_CFG_CHN_P_Pos);
623 }
624
625 /**
626 * @brief Return source of ADC input channelP.
627 *
628 * Register|BitsName
629 * --------|--------
630 * SNSADC_CFG | REG3
631 *
632 * @retval Returned value can be one of the following values:
633 * @arg @ref LL_ADC_INPUT_SRC_IO0
634 * @arg @ref LL_ADC_INPUT_SRC_IO1
635 * @arg @ref LL_ADC_INPUT_SRC_IO2
636 * @arg @ref LL_ADC_INPUT_SRC_IO3
637 * @arg @ref LL_ADC_INPUT_SRC_IO4
638 * @arg @ref LL_ADC_INPUT_SRC_TMP
639 * @arg @ref LL_ADC_INPUT_SRC_BAT
640 */
ll_adc_get_channelp(void)641 __STATIC_INLINE uint32_t ll_adc_get_channelp(void)
642 {
643 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_P_Msk) >> AON_SNSADC_CFG_CHN_P_Pos);
644 }
645
646 /**
647 * @brief Set source of ADC input channelN.
648 *
649 * Register|BitsName
650 * --------|--------
651 * SNSADC_CFG | REG3
652 *
653 * @param source This parameter can be one of the following values:
654 * @arg @ref LL_ADC_INPUT_SRC_IO0
655 * @arg @ref LL_ADC_INPUT_SRC_IO1
656 * @arg @ref LL_ADC_INPUT_SRC_IO2
657 * @arg @ref LL_ADC_INPUT_SRC_IO3
658 * @arg @ref LL_ADC_INPUT_SRC_IO4
659 * @arg @ref LL_ADC_INPUT_SRC_TMP
660 * @arg @ref LL_ADC_INPUT_SRC_BAT
661 * @retval None
662 */
ll_adc_set_channeln(uint32_t source)663 __STATIC_INLINE void ll_adc_set_channeln(uint32_t source)
664 {
665 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_N_Msk, source << AON_SNSADC_CFG_CHN_N_Pos);
666 }
667
668 /**
669 * @brief Return source of ADC input channelN.
670 *
671 * Register|BitsName
672 * --------|--------
673 * SNSADC_CFG | REG3
674 *
675 * @retval Returned value can be one of the following values:
676 * @arg @ref LL_ADC_INPUT_SRC_IO0
677 * @arg @ref LL_ADC_INPUT_SRC_IO1
678 * @arg @ref LL_ADC_INPUT_SRC_IO2
679 * @arg @ref LL_ADC_INPUT_SRC_IO3
680 * @arg @ref LL_ADC_INPUT_SRC_IO4
681 * @arg @ref LL_ADC_INPUT_SRC_TMP
682 * @arg @ref LL_ADC_INPUT_SRC_BAT
683 */
ll_adc_get_channeln(void)684 __STATIC_INLINE uint32_t ll_adc_get_channeln(void)
685 {
686 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_CHN_N_Msk) >> AON_SNSADC_CFG_CHN_N_Pos);
687 }
688
689 /**
690 * @brief Enable ADC MAS_RST.
691 *
692 * Register|BitsName
693 * --------|--------
694 * SNSADC_CFG | REG4
695 *
696 * @retval None
697 */
ll_adc_enable_mas_rst(void)698 __STATIC_INLINE void ll_adc_enable_mas_rst(void)
699 {
700 SET_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk);
701 }
702
703 /**
704 * @brief Disable ADC MAS_RST.
705 *
706 * Register|BitsName
707 * --------|--------
708 * SNSADC_CFG | REG4
709 *
710 * @retval None
711 */
ll_adc_disable_mas_rst(void)712 __STATIC_INLINE void ll_adc_disable_mas_rst(void)
713 {
714 CLEAR_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk);
715 }
716
717 /**
718 * @brief Check if ADC MAS_RST is enabled.
719 *
720 * Register|BitsName
721 * --------|--------
722 * SNSADC_CFG | REG4
723 *
724 * @retval State of bit (1 or 0).
725 */
ll_adc_is_enabled_mas_rst(void)726 __STATIC_INLINE uint32_t ll_adc_is_enabled_mas_rst(void)
727 {
728 return (READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_MAS_RST_Msk) == (AON_SNSADC_CFG_MAS_RST_Msk));
729 }
730
731 /**
732 * @brief Set source of ADC reference.
733 *
734 * Register|BitsName
735 * --------|--------
736 * SNSADC_CFG | REG4
737 *
738 * @param source This parameter can be one of the following values:
739 * @arg @ref LL_ADC_REF_SRC_BUF_INT
740 * @arg @ref LL_ADC_REF_SRC_IO0
741 * @arg @ref LL_ADC_REF_SRC_IO1
742 * @arg @ref LL_ADC_REF_SRC_IO2
743 * @arg @ref LL_ADC_REF_SRC_IO3
744 * @retval None
745 */
ll_adc_set_ref(uint32_t source)746 __STATIC_INLINE void ll_adc_set_ref(uint32_t source)
747 {
748 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_SEL_Msk, source);
749 }
750
751 /**
752 * @brief Return source of ADC reference.
753 *
754 * Register|BitsName
755 * --------|--------
756 * SNSADC_CFG | REG4
757 *
758 * @retval Returned value can be one of the following values:
759 * @arg @ref LL_ADC_REF_SRC_BUF_INT
760 * @arg @ref LL_ADC_REF_SRC_IO0
761 * @arg @ref LL_ADC_REF_SRC_IO1
762 * @arg @ref LL_ADC_REF_SRC_IO2
763 * @arg @ref LL_ADC_REF_SRC_IO3
764 */
ll_adc_get_ref(void)765 __STATIC_INLINE uint32_t ll_adc_get_ref(void)
766 {
767 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_SEL_Msk) >> AON_SNSADC_CFG_REF_SEL_Pos);
768 }
769
770 /**
771 * @brief Set current of ADC reference circuit.
772 * @note When samples at 100kbps, you should set 0.
773 * When samples at 1mbps, you should set 7.
774 *
775 * Register|BitsName
776 * --------|--------
777 * SNSADC_CFG | REG4
778 *
779 * @param source This parameter can be a value between: 0 ~ 7
780 * @retval None
781 */
ll_adc_set_ref_current(uint32_t source)782 __STATIC_INLINE void ll_adc_set_ref_current(uint32_t source)
783 {
784 MODIFY_REG(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_HP_Msk, (source & 0x7) << AON_SNSADC_CFG_REF_HP_Pos);
785 }
786
787 /**
788 * @brief Return current of ADC reference circuit.
789 *
790 * Register|BitsName
791 * --------|--------
792 * SNSADC_CFG | REG4
793 *
794 * @retval Returned value can be a value between: 0 ~ 7
795 */
ll_adc_get_ref_current(void)796 __STATIC_INLINE uint32_t ll_adc_get_ref_current(void)
797 {
798 return (uint32_t)(READ_BITS(AON->SNSADC_CFG, AON_SNSADC_CFG_REF_HP_Msk) >> AON_SNSADC_CFG_REF_HP_Pos);
799 }
800
801 /** @} */
802
803 /** @defgroup LL_ADC_EF_FIFO_Access FIFO Access
804 * @{
805 */
806
807 /**
808 * @brief Return samples value of ADC by reading FIFO.
809 * @note There are two value in the register, both of them is 16bits.
810 *
811 * Register|BitsName
812 * --------|--------
813 * SENSE_ADC_FIFO | SENSE_ADC_FIFO
814 *
815 * @retval Smaples value of input
816 */
ll_adc_read_fifo(void)817 __STATIC_INLINE uint32_t ll_adc_read_fifo(void)
818 {
819 return (uint32_t)(READ_REG(MCU_SUB->SENSE_ADC_FIFO));
820 }
821
822 /**
823 * @brief Set threshold of ADC FIFO.
824 *
825 * Register|BitsName
826 * --------|--------
827 * SENSE_FF_THRESH | SENSE_FF_THRESH
828 *
829 * @param thresh This parameter can be a value between: 0 ~ 64
830 * @retval None
831 */
ll_adc_set_thresh(uint32_t thresh)832 __STATIC_INLINE void ll_adc_set_thresh(uint32_t thresh)
833 {
834 MODIFY_REG(MCU_SUB->SENSE_FF_THRESH, MCU_SUB_SNSADC_FF_THRESH, (thresh & 0x3F) << MCU_SUB_SNSADC_FF_THRESH_Pos);
835 }
836
837 /**
838 * @brief Return threshold of ADC FIFO.
839 *
840 * Register|BitsName
841 * --------|--------
842 * SENSE_FF_THRESH | SENSE_FF_THRESH
843 *
844 * @retval Returned value can be a value between: 0 ~ 64
845 */
ll_adc_get_thresh(void)846 __STATIC_INLINE uint32_t ll_adc_get_thresh(void)
847 {
848 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_FF_THRESH, MCU_SUB_SNSADC_FF_THRESH) >> MCU_SUB_SNSADC_FF_THRESH_Pos);
849 }
850
851 /**
852 * @brief Check if ADC FIFO is not empty.
853 *
854 * Register|BitsName
855 * --------|--------
856 * SENSE_ADC_STAT | VAL
857 *
858 * @retval State of bit (1 or 0).
859 */
ll_adc_is_fifo_notempty(void)860 __STATIC_INLINE uint32_t ll_adc_is_fifo_notempty(void)
861 {
862 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_ADC_STAT, MCU_SUB_SNSADC_STAT_VAL) == MCU_SUB_SNSADC_STAT_VAL);
863 }
864
865 /**
866 * @brief Return count of ADC FIFO.
867 *
868 * Register|BitsName
869 * --------|--------
870 * SENSE_ADC_STAT | FF_COUNT
871 *
872 * @retval Returned value can be a value between: 0 ~ 64
873 */
ll_adc_get_fifo_count(void)874 __STATIC_INLINE uint32_t ll_adc_get_fifo_count(void)
875 {
876 return (uint32_t)(READ_BITS(MCU_SUB->SENSE_ADC_STAT, MCU_SUB_SNSADC_STAT_FF_COUNT) >> \
877 MCU_SUB_SNSADC_STAT_FF_COUNT_Pos);
878 }
879
880 /** @} */
881
882 /** @defgroup LL_ADC_EF_Init Initialization and de-initialization functions
883 * @{
884 */
885
886 /**
887 * @brief De-initialize ADC registers (Registers restored to their default values).
888 * @retval An error_status_t enumeration value:
889 * - SUCCESS: ADC registers are de-initialized
890 * - ERROR: ADC registers are not de-initialized
891 */
892 error_status_t ll_adc_deinit(void);
893
894 /**
895 * @brief Initialize ADC registers according to the specified.
896 * parameters in p_adc_init.
897 * @param p_adc_init Pointer to a ll_adc_init_t structure that contains the configuration
898 * information for the specified ADC peripheral.
899 * @retval An error_status_t enumeration value:
900 * - SUCCESS: ADC registers are initialized according to p_adc_init content
901 * - ERROR: Problem occurred during ADC Registers initialization
902 */
903 error_status_t ll_adc_init(ll_adc_init_t *p_adc_init);
904
905 /**
906 * @brief Set each field of a @ref ll_adc_init_t type structure to default value.
907 * @param p_adc_init Pointer to a @ref ll_adc_init_t structure
908 * whose fields will be set to default values.
909 * @retval None
910 */
911 void ll_adc_struct_init(ll_adc_init_t *p_adc_init);
912
913 /** @} */
914
915 /** @} */
916
917 #endif /* AON */
918
919 #ifdef __cplusplus
920 }
921 #endif
922
923 #endif /* __GR55XX_LL_ADC_H__ */
924
925 /** @} */
926
927 /** @} */
928
929 /** @} */
930