1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_hmac.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of HMAC LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_HMAC HMAC
47 * @brief HMAC LL module driver.
48 * @{
49 */
50 /* Define to prevent recursive inclusion -------------------------------------*/
51 #ifndef __GR55XX_LL_HMAC_H__
52 #define __GR55XX_LL_HMAC_H__
53
54 /* Includes ------------------------------------------------------------------*/
55 #include "gr55xx.h"
56
57 #ifdef __cplusplus
58 extern "C" {
59 #endif
60
61 #if defined (HMAC)
62
63 /** @defgroup HMAC_LL_STRUCTURES Structures
64 * @{
65 */
66
67 /* Exported types ------------------------------------------------------------*/
68 /** @defgroup HMAC_LL_ES_INIT HMAC Exported Init structures
69 * @{
70 */
71
72 /**
73 * @brief LL HMAC Init Structure definition
74 */
75 typedef struct _ll_hmac_init_t {
76 uint32_t *p_key; /**< Key */
77
78 uint32_t *p_hash; /**< HASH value */
79 } ll_hmac_init_t;
80
81 /** @} */
82
83 /** @} */
84
85 /**
86 * @defgroup HMAC_LL_MACRO Defines
87 * @{
88 */
89
90 /* Exported constants --------------------------------------------------------*/
91 /** @defgroup HMAC_LL_Exported_Constants HMAC Exported Constants
92 * @{
93 */
94
95 /** @defgroup HMAC_LL_EC_GET_FLAG Get Flags Defines
96 * @brief Flags definitions which can be used with LL_HMAC_ReadReg function
97 * @{
98 */
99 #define LL_HMAC_FLAG_DATAREADY_SHA HMAC_STATUS_DATAREADY_SHA /**< HMAC data ready(SHA mode) */
100 #define LL_HMAC_FLAG_DATAREADY_HMAC HMAC_STATUS_DATAREADY_HMAC /**< HMAC data ready(HAMC mode) */
101 #define LL_HMAC_FLAG_DMA_MESSAGEDONE HMAC_STATUS_MESSAGEDONE_DMA /**< HMAC dma message done */
102 #define LL_HMAC_FLAG_DMA_DONE HMAC_STATUS_TRANSDONE_DMA /**< HMAC dma transfer done */
103 #define LL_HMAC_FLAG_DMA_ERR HMAC_STATUS_TRANSERR_DMA /**< HMAC dma transfer error */
104 #define LL_HMAC_FLAG_KEY_VALID HMAC_STATUS_KEYVALID /**< HMAC has fetched key */
105 /** @} */
106
107 /** @defgroup HMAC_LL_EC_HASH_MODE Hash Mode
108 * @{
109 */
110 #define LL_HMAC_HASH_STANDARD 0x00000000U /**< Standard Mode */
111 #define LL_HMAC_HASH_USER (1UL << HMAC_CONFIG_ENABLE_USERHASH) /**< User Mode */
112 /** @} */
113
114 /** @defgroup HMAC_LL_EC_CALCULATE_TYPE Calculate Type
115 * @{
116 */
117 #define LL_HMAC_CALCULATETYPE_HMAC 0x00000000U /**< HMAC mode */
118 #define LL_HMAC_CALCULATETYPE_SHA (1UL << HMAC_CONFIG_CALCTYPE_Pos) /**< SHA moe */
119 /** @} */
120
121 /** @defgroup HMAC_LL_EC_KEY_TYPE Key Type
122 * @{
123 */
124 #define LL_HMAC_KEYTYPE_MCU 0x00000000U /**< MCU */
125 #define LL_HMAC_KEYTYPE_AHB (1UL << HMAC_CONFIG_KEYTYPE_Pos) /**< AHB master */
126 #define LL_HMAC_KEYTYPE_KRAM (2UL << HMAC_CONFIG_KEYTYPE_Pos) /**< Key Port */
127 /** @} */
128
129 /** @defgroup HMAC_LL_EC_TRANSFER_SIZE Transfer Size
130 * @{
131 */
132 #define LL_HMAC_DMA_TRANSIZE_MIN (1) /**< Min size = 1 block */
133 #define LL_HMAC_DMA_TRANSIZE_MAX (512) /**< Min size = 512 blocks */
134 /** @} */
135
136 /** @} */
137
138 /* Exported macro ------------------------------------------------------------*/
139 /** @defgroup HMAC_LL_Exported_Macros HMAC Exported Macros
140 * @{
141 */
142
143 /** @defgroup HMAC_LL_EM_WRITE_READ Common Write and read registers Macros
144 * @{
145 */
146
147 /**
148 * @brief Write a value in HMAC register
149 * @param __INSTANCE__ HMAC Instance
150 * @param __REG__ Register to be written
151 * @param __VALUE__ Value to be written in the register
152 * @retval None
153 */
154 #define LL_HMAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
155
156 /**
157 * @brief Read a value in HMAC register
158 * @param __INSTANCE__ HMAC Instance
159 * @param __REG__ Register to be read
160 * @retval Register value
161 */
162 #define LL_HMAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
163
164 /** @} */
165
166 /** @} */
167
168 /** @} */
169
170 /* Exported functions --------------------------------------------------------*/
171 /** @defgroup HMAC_LL_DRIVER_FUNCTIONS Functions
172 * @{
173 */
174
175 /** @defgroup HMAC_LL_EF_Configuration Configuration functions
176 * @{
177 */
178
179 /**
180 * @brief Enable HMAC.
181
182 * Register|BitsName
183 * --------|--------
184 * CTRL | ENABLE
185
186 * @param HMACx HMAC instance
187 * @retval None
188 */
ll_hmac_enable(hmac_regs_t * HMACx)189 __STATIC_INLINE void ll_hmac_enable(hmac_regs_t *HMACx)
190 {
191 SET_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE);
192 }
193
194 /**
195 * @brief Disable HMAC.
196
197 * Register|BitsName
198 * --------|--------
199 * CTRL | ENABLE
200
201 * @param HMACx HMAC instance
202 * @retval None
203 */
ll_hmac_disable(hmac_regs_t * HMACx)204 __STATIC_INLINE void ll_hmac_disable(hmac_regs_t *HMACx)
205 {
206 CLEAR_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE);
207 }
208
209 /**
210 * @brief Indicate whether the HMAC is enabled.
211
212 * Register|BitsName
213 * --------|--------
214 * CTRL | ENABLE
215
216 * @param HMACx HMAC instance
217 * @retval State of bit (1 or 0).
218 */
ll_hmac_is_enabled(hmac_regs_t * HMACx)219 __STATIC_INLINE uint32_t ll_hmac_is_enabled(hmac_regs_t *HMACx)
220 {
221 return (READ_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE) == (HMAC_CTRL_ENABLE));
222 }
223
224 /**
225 * @brief Enable HMAC DMA mode.
226
227 * Register|BitsName
228 * --------|--------
229 * CTRL | START_DMA
230
231 * @param HMACx HMAC instance
232 * @retval None
233 */
ll_hmac_enable_dma_start(hmac_regs_t * HMACx)234 __STATIC_INLINE void ll_hmac_enable_dma_start(hmac_regs_t *HMACx)
235 {
236 SET_BITS(HMACx->CTRL, HMAC_CTRL_START_DMA);
237 }
238
239 /**
240 * @brief Disable HMAC DMA mode.
241
242 * Register|BitsName
243 * --------|--------
244 * CTRL | START_DMA
245
246 * @param HMACx HMAC instance
247 * @retval None
248 */
ll_hmac_disable_dma_start(hmac_regs_t * HMACx)249 __STATIC_INLINE void ll_hmac_disable_dma_start(hmac_regs_t *HMACx)
250 {
251 CLEAR_BITS(HMACx->CTRL, HMAC_CTRL_START_DMA);
252 }
253
254 /**
255 * @brief Indicate whether the HMAC DMA mode is enabled.
256
257 * Register|BitsName
258 * --------|--------
259 * CTRL | START_DMA
260
261 * @param HMACx HMAC instance
262 * @retval State of bit (1 or 0).
263 */
ll_hmac_is_enabled_dma_start(hmac_regs_t * HMACx)264 __STATIC_INLINE uint32_t ll_hmac_is_enabled_dma_start(hmac_regs_t *HMACx)
265 {
266 return (READ_BITS(HMACx->CTRL, HMAC_CTRL_START_DMA) == (HMAC_CTRL_START_DMA));
267 }
268
269 /**
270 * @brief Enable fetch key through AHB/key port.
271
272 * Register|BitsName
273 * --------|--------
274 * CTRL | ENABLE_RKEY
275
276 * @param HMACx HMAC instance
277 * @retval None
278 */
ll_hmac_enable_read_key(hmac_regs_t * HMACx)279 __STATIC_INLINE void ll_hmac_enable_read_key(hmac_regs_t *HMACx)
280 {
281 SET_BITS(HMACx->CTRL, HMAC_CTRL_ENABLE_RKEY);
282 }
283
284 /**
285 * @brief Enable last block transfer in MCU/DMA mode.
286
287 * Register|BitsName
288 * --------|--------
289 * CTRL | LASTTRANSFER
290
291 * @param HMACx HMAC instance
292 * @retval None
293 */
ll_hmac_enable_last_transfer(hmac_regs_t * HMACx)294 __STATIC_INLINE void ll_hmac_enable_last_transfer(hmac_regs_t *HMACx)
295 {
296 SET_BITS(HMACx->CTRL, HMAC_CTRL_LASTTRANSFER);
297 }
298
299 /**
300 * @brief Enable user HASH.
301
302 * Register|BitsName
303 * --------|--------
304 * CONFIG | ENABLE_USERHASH
305
306 * @param HMACx HMAC instance
307 * @retval None
308 */
ll_hmac_enable_user_hash(hmac_regs_t * HMACx)309 __STATIC_INLINE void ll_hmac_enable_user_hash(hmac_regs_t *HMACx)
310 {
311 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_ENABLE_USERHASH);
312 }
313
314 /**
315 * @brief Disable user HASH.
316
317 * Register|BitsName
318 * --------|--------
319 * CONFIG | ENABLE_USERHASH
320
321 * @param HMACx HMAC instance
322 * @retval None
323 */
ll_hmac_disable_user_hash(hmac_regs_t * HMACx)324 __STATIC_INLINE void ll_hmac_disable_user_hash(hmac_regs_t *HMACx)
325 {
326 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_ENABLE_USERHASH);
327 }
328
329 /**
330 * @brief Indicate whether the user HASH is enabled.
331
332 * Register|BitsName
333 * --------|--------
334 * CONFIG | ENABLE_USERHASH
335
336 * @param HMACx HMAC instance
337 * @retval State of bit (1 or 0).
338 */
ll_hmac_is_enabled_user_hash(hmac_regs_t * HMACx)339 __STATIC_INLINE uint32_t ll_hmac_is_enabled_user_hash(hmac_regs_t *HMACx)
340 {
341 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_ENABLE_USERHASH) == (HMAC_CONFIG_ENABLE_USERHASH));
342 }
343
344 /**
345 * @brief Enable HMAC in little endian.
346
347 * Register|BitsName
348 * --------|--------
349 * CONFIG | ENDIAN
350
351 * @param HMACx HMAC instance
352 * @retval None
353 */
ll_hmac_enable_little_endian(hmac_regs_t * HMACx)354 __STATIC_INLINE void ll_hmac_enable_little_endian(hmac_regs_t *HMACx)
355 {
356 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_ENDIAN);
357 }
358
359 /**
360 * @brief Disable HMAC in little endian.
361
362 * Register|BitsName
363 * --------|--------
364 * CONFIG | ENDIAN
365
366 * @param HMACx HMAC instance
367 * @retval None
368 */
ll_hmac_disable_little_endian(hmac_regs_t * HMACx)369 __STATIC_INLINE void ll_hmac_disable_little_endian(hmac_regs_t *HMACx)
370 {
371 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_ENDIAN);
372 }
373
374 /**
375 * @brief Indicate whether the HMAC is in little endian.
376
377 * Register|BitsName
378 * --------|--------
379 * CONFIG | ENDIAN
380
381 * @param HMACx HMAC instance
382 * @retval State of bit (1 or 0).
383 */
ll_hmac_is_enabled_little_endian(hmac_regs_t * HMACx)384 __STATIC_INLINE uint32_t ll_hmac_is_enabled_little_endian(hmac_regs_t *HMACx)
385 {
386 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_ENDIAN) == (HMAC_CONFIG_ENDIAN));
387 }
388
389 /**
390 * @brief Set ways to obtain HMAC key.
391
392 * Register|BitsName
393 * --------|--------
394 * CONFIG | KEYTYPE
395
396 * @param HMACx HMAC instance
397 * @param type This parameter can be one of the following values:
398 * @arg @ref LL_HMAC_KEYTYPE_MCU
399 * @arg @ref LL_HMAC_KEYTYPE_AHB
400 * @arg @ref LL_HMAC_KEYTYPE_KRAM
401 * @retval None
402 */
ll_hmac_set_key_type(hmac_regs_t * HMACx,uint32_t type)403 __STATIC_INLINE void ll_hmac_set_key_type(hmac_regs_t *HMACx, uint32_t type)
404 {
405 MODIFY_REG(HMACx->CONFIG, HMAC_CONFIG_KEYTYPE, type);
406 }
407
408 /**
409 * @brief Get ways to obtain HMAC key.
410
411 * Register|BitsName
412 * --------|--------
413 * CONFIG | KEYTYPE
414
415 * @param HMACx HMAC instance
416 * @retval Returned value can be one of the following values:
417 * @arg @ref LL_HMAC_KEYTYPE_MCU
418 * @arg @ref LL_HMAC_KEYTYPE_AHB
419 * @arg @ref LL_HMAC_KEYTYPE_KRAM
420 */
ll_hmac_get_key_type(hmac_regs_t * HMACx)421 __STATIC_INLINE uint32_t ll_hmac_get_key_type(hmac_regs_t *HMACx)
422 {
423 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_KEYTYPE));
424 }
425
426 /**
427 * @brief Enable SHA mode.
428
429 * Register|BitsName
430 * --------|--------
431 * CONFIG | CALCTYPE
432
433 * @param HMACx HMAC instance
434 * @retval None
435 */
ll_hmac_enable_sha(hmac_regs_t * HMACx)436 __STATIC_INLINE void ll_hmac_enable_sha(hmac_regs_t *HMACx)
437 {
438 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_CALCTYPE);
439 }
440
441 /**
442 * @brief Disable SHA mode.
443
444 * Register|BitsName
445 * --------|--------
446 * CONFIG | CALCTYPE
447
448 * @param HMACx HMAC instance
449 * @retval None
450 */
ll_hmac_disable_sha(hmac_regs_t * HMACx)451 __STATIC_INLINE void ll_hmac_disable_sha(hmac_regs_t *HMACx)
452 {
453 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_CALCTYPE);
454 }
455
456 /**
457 * @brief Indicate whether the SHA mode is enabled.
458
459 * Register|BitsName
460 * --------|--------
461 * CONFIG | CALCTYPE
462
463 * @param HMACx HMAC instance
464 * @retval State of bit (1 or 0).
465 */
ll_hmac_is_enabled_sha(hmac_regs_t * HMACx)466 __STATIC_INLINE uint32_t ll_hmac_is_enabled_sha(hmac_regs_t *HMACx)
467 {
468 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_CALCTYPE) == (HMAC_CONFIG_CALCTYPE));
469 }
470
471 /**
472 * @brief Enable private mode.
473
474 * Register|BitsName
475 * --------|--------
476 * CONFIG | PRIVATE
477
478 * @param HMACx HMAC instance
479 * @retval None
480 */
ll_hmac_enable_private(hmac_regs_t * HMACx)481 __STATIC_INLINE void ll_hmac_enable_private(hmac_regs_t *HMACx)
482 {
483 SET_BITS(HMACx->CONFIG, HMAC_CONFIG_PRIVATE);
484 }
485
486 /**
487 * @brief Disable private mode.
488
489 * Register|BitsName
490 * --------|--------
491 * CONFIG | PRIVATE
492
493 * @param HMACx HMAC instance
494 * @retval None
495 */
ll_hmac_disable_private(hmac_regs_t * HMACx)496 __STATIC_INLINE void ll_hmac_disable_private(hmac_regs_t *HMACx)
497 {
498 CLEAR_BITS(HMACx->CONFIG, HMAC_CONFIG_PRIVATE);
499 }
500
501 /**
502 * @brief Indicate whether the private mode is enabled.
503
504 * Register|BitsName
505 * --------|--------
506 * CONFIG | PRIVATE
507
508 * @param HMACx HMAC instance
509 * @retval State of bit (1 or 0).
510 */
ll_hmac_is_enabled_private(hmac_regs_t * HMACx)511 __STATIC_INLINE uint32_t ll_hmac_is_enabled_private(hmac_regs_t *HMACx)
512 {
513 return (READ_BITS(HMACx->CONFIG, HMAC_CONFIG_PRIVATE) == (HMAC_CONFIG_PRIVATE));
514 }
515
516 /** @} */
517
518 /** @defgroup HMAC_LL_EF_IT_Management IT_Management
519 * @{
520 */
521
522 /**
523 * @brief Enable the done interrupt for HMAC.
524
525 * Register|BitsName
526 * --------|--------
527 * INTERRUPT | ENABLE
528
529 * @param HMACx HMAC instance
530 * @retval None
531 */
ll_hmac_enable_it_done(hmac_regs_t * HMACx)532 __STATIC_INLINE void ll_hmac_enable_it_done(hmac_regs_t *HMACx)
533 {
534 SET_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_ENABLE);
535 }
536
537 /**
538 * @brief Disable the done interrupt for HMAC.
539
540 * Register|BitsName
541 * --------|--------
542 * INTERRUPT | ENABLE
543
544 * @param HMACx HMAC instance
545 * @retval None
546 */
ll_hmac_disable_it_done(hmac_regs_t * HMACx)547 __STATIC_INLINE void ll_hmac_disable_it_done(hmac_regs_t *HMACx)
548 {
549 CLEAR_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_ENABLE);
550 }
551
552 /**
553 * @brief Indicate whether Done Interrupt is enabled.
554
555 * Register|BitsName
556 * --------|--------
557 * INTERRUPT | ENABLE
558
559 * @param HMACx HMAC instance
560 * @retval State of bit (1 or 0).
561 */
ll_hmac_is_enabled_it_done(hmac_regs_t * HMACx)562 __STATIC_INLINE uint32_t ll_hmac_is_enabled_it_done(hmac_regs_t *HMACx)
563 {
564 return (READ_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_ENABLE) == (HMAC_INTERRUPT_ENABLE));
565 }
566
567 /** @} */
568
569 /** @defgroup HMAC_LL_EF_IT_Management IT_Management
570 * @{
571 */
572
573 /**
574 * @brief Indicate whether SHA Ready flag is set.
575
576 * Register|BitsName
577 * --------|--------
578 * STATUS | DATAREADY_SHA
579
580 * @param HMACx HMAC instance
581 * @retval State of bit (1 or 0).
582 */
ll_hmac_is_action_flag_sha_ready(hmac_regs_t * HMACx)583 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_sha_ready(hmac_regs_t *HMACx)
584 {
585 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_DATAREADY_SHA) == HMAC_STATUS_DATAREADY_SHA);
586 }
587
588 /**
589 * @brief Indicate whether HMAC Ready flag is set.
590
591 * Register|BitsName
592 * --------|--------
593 * STATUS | DATAREADY_HMAC
594
595 * @param HMACx HMAC instance
596 * @retval State of bit (1 or 0).
597 */
ll_hmac_is_action_flag_hmac_ready(hmac_regs_t * HMACx)598 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_hmac_ready(hmac_regs_t *HMACx)
599 {
600 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_DATAREADY_HMAC) == HMAC_STATUS_DATAREADY_HMAC);
601 }
602
603 /**
604 * @brief Indicate whether DMA Transmit Message Done flag is set.
605
606 * Register|BitsName
607 * --------|--------
608 * STATUS | MESSAGEDONE_DMA
609
610 * @param HMACx HMAC instance
611 * @retval State of bit (1 or 0).
612 */
ll_hmac_is_action_flag_dma_message_done(hmac_regs_t * HMACx)613 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_message_done(hmac_regs_t *HMACx)
614 {
615 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_MESSAGEDONE_DMA) == HMAC_STATUS_MESSAGEDONE_DMA);
616 }
617
618 /**
619 * @brief Indicate whether DMA Transfer Done flag is set.
620
621 * Register|BitsName
622 * --------|--------
623 * STATUS | TRANSDONE_DMA
624
625 * @param HMACx HMAC instance
626 * @retval State of bit (1 or 0).
627 */
ll_hmac_is_action_flag_dma_done(hmac_regs_t * HMACx)628 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_done(hmac_regs_t *HMACx)
629 {
630 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_TRANSDONE_DMA) == HMAC_STATUS_TRANSDONE_DMA);
631 }
632
633 /**
634 * @brief Indicate whether DMA Transfer Error flag is set.
635
636 * Register|BitsName
637 * --------|--------
638 * STATUS | TRANSERR_DMA
639
640 * @param HMACx HMAC instance
641 * @retval State of bit (1 or 0).
642 */
ll_hmac_is_action_flag_dma_error(hmac_regs_t * HMACx)643 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_dma_error(hmac_regs_t *HMACx)
644 {
645 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_TRANSERR_DMA) == HMAC_STATUS_TRANSERR_DMA);
646 }
647
648 /**
649 * @brief Indicate whether Key Valid flag is set.
650
651 * Register|BitsName
652 * --------|--------
653 * STATUS | KEYVALID
654
655 * @param HMACx HMAC instance
656 * @retval State of bit (1 or 0).
657 */
ll_hmac_is_action_flag_key_valid(hmac_regs_t * HMACx)658 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_key_valid(hmac_regs_t *HMACx)
659 {
660 return (READ_BITS(HMACx->STATUS, HMAC_STATUS_KEYVALID) == HMAC_STATUS_KEYVALID);
661 }
662
663 /**
664 * @brief Indicate whether Done interrupt flag is set.
665
666 * Register|BitsName
667 * --------|--------
668 * INTERRUPT | DONE
669
670 * @param HMACx HMAC instance
671 * @retval State of bit (1 or 0).
672 */
ll_hmac_is_action_flag_it_done(hmac_regs_t * HMACx)673 __STATIC_INLINE uint32_t ll_hmac_is_action_flag_it_done(hmac_regs_t *HMACx)
674 {
675 return (READ_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_DONE) == HMAC_INTERRUPT_DONE);
676 }
677
678 /**
679 * @brief Clear Done interrupt flag.
680
681 * Register|BitsName
682 * --------|--------
683 * INTERRUPT | DONE
684
685 * @param HMACx HMAC instance
686 * @retval None
687 */
ll_hmac_clear_flag_it_done(hmac_regs_t * HMACx)688 __STATIC_INLINE void ll_hmac_clear_flag_it_done(hmac_regs_t *HMACx)
689 {
690 CLEAR_BITS(HMACx->INTERRUPT, HMAC_INTERRUPT_DONE);
691 }
692
693 /** @} */
694
695 /** @defgroup HMAC_LL_EF_DMA_Management DMA_Management
696 * @{
697 */
698
699 /**
700 * @brief Set HMAC transfer blocks in DMA mode.
701
702 * Register|BitsName
703 * --------|--------
704 * TRANSIZE | TRANSIZE
705
706 * @param HMACx HMAC instance
707 * @param block This parameter can be one of the following values: 1 ~ 512
708 * @retval None
709 */
ll_hmac_set_dma_transfer_block(hmac_regs_t * HMACx,uint32_t block)710 __STATIC_INLINE void ll_hmac_set_dma_transfer_block(hmac_regs_t *HMACx, uint32_t block)
711 {
712 MODIFY_REG(HMACx->TRAN_SIZE, HMAC_TRANSIZE, (block << ITEM_6) - 1);
713 }
714
715 /**
716 * @brief Get HMAC transfer blocks in DMA mode.
717
718 * Register|BitsName
719 * --------|--------
720 * TRANSIZE | TRANSIZE
721
722 * @param HMACx HMAC instance
723 * @retval Return value is between: 1 ~ 512
724 */
ll_hmac_get_dma_transfer_block(hmac_regs_t * HMACx)725 __STATIC_INLINE uint32_t ll_hmac_get_dma_transfer_block(hmac_regs_t *HMACx)
726 {
727 return ((READ_BITS(HMACx->TRAN_SIZE, HMAC_TRANSIZE) + 1) >> ITEM_6);
728 }
729
730 /**
731 * @brief Set HMAC read address of RAM in DMA mode.
732
733 * Register|BitsName
734 * --------|--------
735 * RSTART_ADDR | RSTART_ADDR
736
737 * @param HMACx HMAC instance
738 * @param address This parameter can be one of the address in RAM
739 * @retval None
740 */
ll_hmac_set_dma_read_address(hmac_regs_t * HMACx,uint32_t address)741 __STATIC_INLINE void ll_hmac_set_dma_read_address(hmac_regs_t *HMACx, uint32_t address)
742 {
743 WRITE_REG(HMACx->RSTART_ADDR, address);
744 }
745
746 /**
747 * @brief Get HMAC read address of RAM in DMA mode.
748
749 * Register|BitsName
750 * --------|--------
751 * RSTART_ADDR | RSTART_ADDR
752
753 * @param HMACx HMAC instance
754 * @retval Return value is the address in RAM
755 */
ll_hmac_get_dma_read_address(hmac_regs_t * HMACx)756 __STATIC_INLINE uint32_t ll_hmac_get_dma_read_address(hmac_regs_t *HMACx)
757 {
758 return (READ_REG(HMACx->RSTART_ADDR));
759 }
760
761 /**
762 * @brief Set HMAC write address of RAM in DMA mode.
763
764 * Register|BitsName
765 * --------|--------
766 * WSTART_ADDR | WSTART_ADDR
767
768 * @param HMACx HMAC instance
769 * @param address This parameter can be one of the address in RAM
770 * @retval None
771 */
ll_hmac_set_dma_write_address(hmac_regs_t * HMACx,uint32_t address)772 __STATIC_INLINE void ll_hmac_set_dma_write_address(hmac_regs_t *HMACx, uint32_t address)
773 {
774 WRITE_REG(HMACx->WSTART_ADDR, address);
775 }
776
777 /**
778 * @brief Get HMAC write address of RAM in DMA mode.
779
780 * Register|BitsName
781 * --------|--------
782 * WSTART_ADDR | WSTART_ADDR
783
784 * @param HMACx HMAC instance
785 * @retval Return value is the address in RAM
786 */
ll_hmac_get_dma_write_address(hmac_regs_t * HMACx)787 __STATIC_INLINE uint32_t ll_hmac_get_dma_write_address(hmac_regs_t *HMACx)
788 {
789 return (READ_REG(HMACx->WSTART_ADDR));
790 }
791
792 /** @} */
793
794 /** @defgroup HMAC_LL_EF_Data_Management Data_Management
795 * @{
796 */
797
798 /**
799 * @brief Set user HASH[255:224].
800
801 * Register|BitsName
802 * --------|--------
803 * USER_HASH[0] | USER_HASH
804
805 * @param HMACx HMAC instance
806 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
807 * @retval None
808 */
ll_hmac_set_user_hash_255_224(hmac_regs_t * HMACx,uint32_t hash)809 __STATIC_INLINE void ll_hmac_set_user_hash_255_224(hmac_regs_t *HMACx, uint32_t hash)
810 {
811 WRITE_REG(HMACx->USER_HASH[0], hash);
812 }
813
814 /**
815 * @brief Set user HASH[223:192].
816
817 * Register|BitsName
818 * --------|--------
819 * USER_HASH[1] | USER_HASH
820
821 * @param HMACx HMAC instance
822 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
823 * @retval None
824 */
ll_hmac_set_user_hash_223_192(hmac_regs_t * HMACx,uint32_t hash)825 __STATIC_INLINE void ll_hmac_set_user_hash_223_192(hmac_regs_t *HMACx, uint32_t hash)
826 {
827 WRITE_REG(HMACx->USER_HASH[1], hash);
828 }
829
830 /**
831 * @brief Set user HASH[191:160].
832
833 * Register|BitsName
834 * --------|--------
835 * USER_HASH[2] | USER_HASH
836
837 * @param HMACx HMAC instance
838 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
839 * @retval None
840 */
ll_hmac_set_user_hash_191_160(hmac_regs_t * HMACx,uint32_t hash)841 __STATIC_INLINE void ll_hmac_set_user_hash_191_160(hmac_regs_t *HMACx, uint32_t hash)
842 {
843 WRITE_REG(HMACx->USER_HASH[ITEM_2], hash);
844 }
845
846 /**
847 * @brief Set user HASH[159:128].
848
849 * Register|BitsName
850 * --------|--------
851 * USER_HASH[3] | USER_HASH
852
853 * @param HMACx HMAC instance
854 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
855 * @retval None
856 */
ll_hmac_set_user_hash_159_128(hmac_regs_t * HMACx,uint32_t hash)857 __STATIC_INLINE void ll_hmac_set_user_hash_159_128(hmac_regs_t *HMACx, uint32_t hash)
858 {
859 WRITE_REG(HMACx->USER_HASH[ITEM_3], hash);
860 }
861
862 /**
863 * @brief Set user HASH[127:96].
864
865 * Register|BitsName
866 * --------|--------
867 * USER_HASH[4] | USER_HASH
868
869 * @param HMACx HMAC instance
870 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
871 * @retval None
872 */
ll_hmac_set_user_hash_127_96(hmac_regs_t * HMACx,uint32_t hash)873 __STATIC_INLINE void ll_hmac_set_user_hash_127_96(hmac_regs_t *HMACx, uint32_t hash)
874 {
875 WRITE_REG(HMACx->USER_HASH[ITEM_4], hash);
876 }
877
878 /**
879 * @brief Set user HASH[95:64].
880
881 * Register|BitsName
882 * --------|--------
883 * USER_HASH[5] | USER_HASH
884
885 * @param HMACx HMAC instance
886 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
887 * @retval None
888 */
ll_hmac_set_user_hash_95_64(hmac_regs_t * HMACx,uint32_t hash)889 __STATIC_INLINE void ll_hmac_set_user_hash_95_64(hmac_regs_t *HMACx, uint32_t hash)
890 {
891 WRITE_REG(HMACx->USER_HASH[ITEM_5], hash);
892 }
893
894 /**
895 * @brief Set user HASH[63:32].
896
897 * Register|BitsName
898 * --------|--------
899 * USER_HASH[6] | USER_HASH
900
901 * @param HMACx HMAC instance
902 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
903 * @retval None
904 */
ll_hmac_set_user_hash_63_32(hmac_regs_t * HMACx,uint32_t hash)905 __STATIC_INLINE void ll_hmac_set_user_hash_63_32(hmac_regs_t *HMACx, uint32_t hash)
906 {
907 WRITE_REG(HMACx->USER_HASH[ITEM_6], hash);
908 }
909
910 /**
911 * @brief Set user HASH[31:0].
912
913 * Register|BitsName
914 * --------|--------
915 * USER_HASH[7] | USER_HASH
916
917 * @param HMACx HMAC instance
918 * @param hash This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
919 * @retval None
920 */
ll_hmac_set_user_hash_31_0(hmac_regs_t * HMACx,uint32_t hash)921 __STATIC_INLINE void ll_hmac_set_user_hash_31_0(hmac_regs_t *HMACx, uint32_t hash)
922 {
923 WRITE_REG(HMACx->USER_HASH[ITEM_7], hash);
924 }
925
926 /**
927 * @brief Get abstract from HMAC.
928
929 * Register|BitsName
930 * --------|--------
931 * FIFO_OUT | FIFO_OUT
932
933 * @param HMACx HMAC instance
934 * @retval Abstract
935 */
ll_hmac_get_data(hmac_regs_t * HMACx)936 __STATIC_INLINE uint32_t ll_hmac_get_data(hmac_regs_t *HMACx)
937 {
938 return (READ_REG(HMACx->FIFO_OUT));
939 }
940
941 /**
942 * @brief Send data to calculate.
943
944 * Register|BitsName
945 * --------|--------
946 * FIFO_MESSAGE | FIFO_MESSAGE
947
948 * @param HMACx HMAC instance
949 * @param data This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
950 * @retval None
951 */
ll_hmac_set_data(hmac_regs_t * HMACx,uint32_t data)952 __STATIC_INLINE void ll_hmac_set_data(hmac_regs_t *HMACx, uint32_t data)
953 {
954 WRITE_REG(HMACx->MESSAGE_FIFO, data);
955 }
956
957 /**
958 * @brief Set HMAC key0.
959
960 * Register|BitsName
961 * --------|--------
962 * KEY[0] | KEY
963
964 * @param HMACx HMAC instance
965 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
966 * @retval None
967 */
ll_hmac_set_key0(hmac_regs_t * HMACx,uint32_t key)968 __STATIC_INLINE void ll_hmac_set_key0(hmac_regs_t *HMACx, uint32_t key)
969 {
970 WRITE_REG(HMACx->KEY[0], key);
971 }
972
973 /**
974 * @brief Set HMAC key1.
975
976 * Register|BitsName
977 * --------|--------
978 * KEY[1] | KEY
979
980 * @param HMACx HMAC instance
981 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
982 * @retval None
983 */
ll_hmac_set_key1(hmac_regs_t * HMACx,uint32_t key)984 __STATIC_INLINE void ll_hmac_set_key1(hmac_regs_t *HMACx, uint32_t key)
985 {
986 WRITE_REG(HMACx->KEY[1], key);
987 }
988
989 /**
990 * @brief Set HMAC key2.
991
992 * Register|BitsName
993 * --------|--------
994 * KEY[2] | KEY
995
996 * @param HMACx HMAC instance
997 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
998 * @retval None
999 */
ll_hmac_set_key2(hmac_regs_t * HMACx,uint32_t key)1000 __STATIC_INLINE void ll_hmac_set_key2(hmac_regs_t *HMACx, uint32_t key)
1001 {
1002 WRITE_REG(HMACx->KEY[ITEM_2], key);
1003 }
1004
1005 /**
1006 * @brief Set HMAC key3.
1007
1008 * Register|BitsName
1009 * --------|--------
1010 * KEY[3] | KEY
1011
1012 * @param HMACx HMAC instance
1013 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1014 * @retval None
1015 */
ll_hmac_set_key3(hmac_regs_t * HMACx,uint32_t key)1016 __STATIC_INLINE void ll_hmac_set_key3(hmac_regs_t *HMACx, uint32_t key)
1017 {
1018 WRITE_REG(HMACx->KEY[ITEM_3], key);
1019 }
1020
1021 /**
1022 * @brief Set HMAC key4.
1023
1024 * Register|BitsName
1025 * --------|--------
1026 * KEY[4] | KEY
1027
1028 * @param HMACx HMAC instance
1029 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1030 * @retval None
1031 */
ll_hmac_set_key4(hmac_regs_t * HMACx,uint32_t key)1032 __STATIC_INLINE void ll_hmac_set_key4(hmac_regs_t *HMACx, uint32_t key)
1033 {
1034 WRITE_REG(HMACx->KEY[ITEM_4], key);
1035 }
1036
1037 /**
1038 * @brief Set HMAC key5.
1039
1040 * Register|BitsName
1041 * --------|--------
1042 * KEY[5] | KEY
1043
1044 * @param HMACx HMAC instance
1045 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1046 * @retval None
1047 */
ll_hmac_set_key5(hmac_regs_t * HMACx,uint32_t key)1048 __STATIC_INLINE void ll_hmac_set_key5(hmac_regs_t *HMACx, uint32_t key)
1049 {
1050 WRITE_REG(HMACx->KEY[ITEM_5], key);
1051 }
1052
1053 /**
1054 * @brief Set HMAC key6.
1055
1056 * Register|BitsName
1057 * --------|--------
1058 * KEY[6] | KEY
1059
1060 * @param HMACx HMAC instance
1061 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1062 * @retval None
1063 */
ll_hmac_set_key6(hmac_regs_t * HMACx,uint32_t key)1064 __STATIC_INLINE void ll_hmac_set_key6(hmac_regs_t *HMACx, uint32_t key)
1065 {
1066 WRITE_REG(HMACx->KEY[ITEM_6], key);
1067 }
1068
1069 /**
1070 * @brief Set HMAC key7.
1071
1072 * Register|BitsName
1073 * --------|--------
1074 * KEY[7] | KEY
1075
1076 * @param HMACx HMAC instance
1077 * @param key This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1078 * @retval None
1079 */
ll_hmac_set_key7(hmac_regs_t * HMACx,uint32_t key)1080 __STATIC_INLINE void ll_hmac_set_key7(hmac_regs_t *HMACx, uint32_t key)
1081 {
1082 WRITE_REG(HMACx->KEY[ITEM_7], key);
1083 }
1084
1085 /**
1086 * @brief Set HMAC key address in memory.
1087
1088 * Register|BitsName
1089 * --------|--------
1090 * KEY_ADDR | KEY_ADDR
1091
1092 * @param HMACx HMAC instance
1093 * @param address This parameter can be one of the address in RAM
1094 * @retval None
1095 */
ll_hmac_set_key_address(hmac_regs_t * HMACx,uint32_t address)1096 __STATIC_INLINE void ll_hmac_set_key_address(hmac_regs_t *HMACx, uint32_t address)
1097 {
1098 WRITE_REG(HMACx->KEY_ADDR, address);
1099 }
1100
1101 /**
1102 * @brief Get HMAC key address in memory.
1103
1104 * Register|BitsName
1105 * --------|--------
1106 * KEY_ADDR | KEY_ADDR
1107
1108 * @param HMACx HMAC instance
1109 * @retval Return value is the address in RAM
1110 */
ll_hmac_get_key_address(hmac_regs_t * HMACx)1111 __STATIC_INLINE uint32_t ll_hmac_get_key_address(hmac_regs_t *HMACx)
1112 {
1113 return (READ_REG(HMACx->KEY_ADDR));
1114 }
1115
1116 /**
1117 * @brief Set HMAC fetch key port mask.
1118
1119 * Register|BitsName
1120 * --------|--------
1121 * KPORT_MASK | KPORT_MASK
1122
1123 * @param HMACx HMAC instance
1124 * @param mask This parameter can be one of the following values: 0 ~ 0xFFFFFFFF
1125 * @retval None
1126 */
ll_hmac_set_key_port_mask(hmac_regs_t * HMACx,uint32_t mask)1127 __STATIC_INLINE void ll_hmac_set_key_port_mask(hmac_regs_t *HMACx, uint32_t mask)
1128 {
1129 WRITE_REG(HMACx->KPORT_MASK, mask);
1130 }
1131
1132 /** @} */
1133
1134 /** @defgroup HMAC_LL_EF_Init Initialization and de-initialization functions
1135 * @{
1136 */
1137
1138 /**
1139 * @brief De-initialize HMAC registers (Registers restored to their default values).
1140 * @param HMACx HMAC Instance
1141 * @retval An error_status_t enumeration value:
1142 * - SUCCESS: HMAC registers are de-initialized
1143 * - ERROR: HMAC registers are not de-initialized
1144 */
1145 error_status_t ll_hmac_deinit(hmac_regs_t *HMACx);
1146
1147 /**
1148 * @brief Initialize HMAC registers according to the specified
1149 * parameters in p_hmac_init.
1150 * @param HMACx HMAC Instance
1151 * @param p_hmac_init Pointer to a ll_hmac_init_t structure that contains the configuration
1152 * information for the specified HMAC peripheral.
1153 * @retval An error_status_t enumeration value:
1154 * - SUCCESS: HMAC registers are initialized according to p_hmac_init content
1155 * - ERROR: Problem occurred during HMAC Registers initialization
1156 */
1157 error_status_t ll_hmac_init(hmac_regs_t *HMACx, ll_hmac_init_t *p_hmac_init);
1158
1159 /**
1160 * @brief Set each field of a @ref ll_hmac_init_t type structure to default value.
1161 * @param p_hmac_init Pointer to a @ref ll_hmac_init_t structure
1162 * whose fields will be set to default values.
1163 * @retval None
1164 */
1165 void ll_hmac_struct_init(ll_hmac_init_t *p_hmac_init);
1166
1167 /** @} */
1168
1169 /** @} */
1170
1171 #endif /* HMAC */
1172
1173 #ifdef __cplusplus
1174 }
1175 #endif
1176
1177 #endif /* __GR55XX_LL_HMAC_H__ */
1178
1179 /** @} */
1180
1181 /** @} */
1182
1183 /** @} */
1184