1 /**
2 ****************************************************************************************
3 *
4 * @file gr55xx_ll_rng.h
5 * @author BLE Driver Team
6 * @brief Header file containing functions prototypes of RNG LL library.
7 *
8 ****************************************************************************************
9 * @attention
10 #####Copyright (c) 2019 GOODIX
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 * Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 * Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 * Neither the name of GOODIX nor the names of its contributors may be used
21 to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 POSSIBILITY OF SUCH DAMAGE.
35 ****************************************************************************************
36 */
37
38 /** @addtogroup PERIPHERAL Peripheral Driver
39 * @{
40 */
41
42 /** @addtogroup LL_DRIVER LL Driver
43 * @{
44 */
45
46 /** @defgroup LL_RNG RNG
47 * @brief RNG LL module driver.
48 * @{
49 */
50
51 /* Define to prevent recursive inclusion -------------------------------------*/
52 #ifndef __GR55XX_LL_RNG_H__
53 #define __GR55XX_LL_RNG_H__
54
55 /* Includes ------------------------------------------------------------------*/
56 #include "gr55xx.h"
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 #if defined (RNG)
63
64 /** @defgroup RNG_LL_STRUCTURES Structures
65 * @{
66 */
67
68 /* Exported types ------------------------------------------------------------*/
69 /** @defgroup RNG_LL_ES_INIT RNG Exported Init structures
70 * @{
71 */
72
73 /**
74 * @brief LL RNG Init Structure definition
75 */
76 typedef struct _ll_rng_init {
77 uint32_t seed; /**< Specifies the seed source for the LFSR.
78 This parameter can be a value of @ref RNG_LL_EC_SEED_SOURCE */
79
80 uint32_t lfsr_mode; /**< Specifies the configuration mode for the LFSR.
81 This parameter can be a value of @ref RNG_LL_EC_LFSR_MODE */
82
83 uint32_t out_mode; /**< Specifies the Output mode for the RNG.
84 This parameter can be a value of @ref RNG_LL_EC_OUTPUT_MODE */
85
86 uint32_t post_mode; /**< Specifies post-process configuration for the RNG.
87 This parameter can be a value of @ref RNG_LL_EC_POST_PRO */
88
89 uint32_t interrupt; /**< Specifies interrupt configuration for the RNG.
90 This parameter can be a value of @ref RNG_LL_EC_IT */
91 } ll_rng_init_t;
92
93 /** @} */
94
95 /** @} */
96
97 /** @defgroup RNG_LL_MACRO Defines
98 * @{
99 */
100 /* Exported constants --------------------------------------------------------*/
101 /** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
102 * @{
103 */
104
105 /** @defgroup RNG_LL_EC_SEED_SOURCE LFSR seed source
106 * @{
107 */
108 #define LL_RNG_SEED_FR0_S0 (4UL << RNG_CONFIG_LFSR_SEED_SEL_Pos) /**< LFSR seed is from the
109 switching oscillator s0. */
110 #define LL_RNG_SEED_USER (6UL << RNG_CONFIG_LFSR_SEED_SEL_Pos) /**< LFSR seed is configured
111 by users. */
112 /** @} */
113
114 /** @defgroup RNG_LL_EC_LFSR_MODE LFSR configuration mode
115 * @{
116 */
117 #define LL_RNG_LFSR_MODE_59BIT (0x00000000UL) /**< 59 bit LFSR. */
118 #define LL_RNG_LFSR_MODE_128BIT (1UL << RNG_CONFIG_LFSR_MODE_Pos) /**< 128 bit LFSR. */
119 /** @} */
120
121 /** @defgroup RNG_LL_EC_POST_PRO Post-process mode
122 * @{
123 */
124 #define LL_RNG_POST_PRO_NOT (0x00000000UL) /**< No post process. */
125 #define LL_RNG_POST_PRO_SKIPPING (1UL << RNG_CONFIG_POST_MODE_Pos) /**< bit skipping. */
126 #define LL_RNG_POST_PRO_COUNTING (2UL << RNG_CONFIG_POST_MODE_Pos) /**< bit counting. */
127 #define LL_RNG_POST_PRO_NEUMANN (3UL << RNG_CONFIG_POST_MODE_Pos) /**< Von-Neumann. */
128 /** @} */
129
130 /** @defgroup RNG_LL_EC_IT RNG hardware interrupt enable.
131 * @{
132 */
133 #define LL_RNG_IT_DISABLE (0x00000000UL) /**< Disable RNG interrupt. */
134 #define LL_RNG_IT_ENABLE (1UL << RNG_CONFIG_IRQ_EN_Pos) /**< Enable RNG interrupt. */
135 /** @} */
136
137 /** @defgroup RNG_LL_EC_OUTPUT_MODE RNG Output mode
138 * @{
139 */
140 #define LL_RNG_OUTPUT_FR0_S0 (4UL << RNG_CONFIG_OUT_MODE_Pos) /**< Digital RNG direct output,
141 ring oscillator s0. */
142 #define LL_RNG_OUTPUT_CYCLIC_PARITY (6UL << RNG_CONFIG_OUT_MODE_Pos) /**< LFSR and RNG cyclic sampling
143 and parity generation. */
144 #define LL_RNG_OUTPUT_CYCLIC (7UL << RNG_CONFIG_OUT_MODE_Pos) /**< LFSR and RNG cyclic sampling. */
145 #define LL_RNG_OUTPUT_LFSR_RNG (8UL << RNG_CONFIG_OUT_MODE_Pos) /**< LFSR ⊕ RNG. */
146 #define LL_RNG_OUTPUT_LFSR (9UL << RNG_CONFIG_OUT_MODE_Pos) /**< LFSR direct output. */
147 /** @} */
148
149 /** @} */
150
151 /* Exported macro ------------------------------------------------------------*/
152 /** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
153 * @{
154 */
155
156 /** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
157 * @{
158 */
159
160 /**
161 * @brief Write a value in RNG register
162 * @param __instance__ RNG instance
163 * @param __REG__ Register to be written
164 * @param __VALUE__ Value to be written in the register
165 * @retval None.
166 */
167 #define LL_RNG_WriteReg(__instance__, __REG__, __VALUE__) WRITE_REG(__instance__->__REG__, (__VALUE__))
168
169 /**
170 * @brief Read a value in RNG register
171 * @param __instance__ RNG instance
172 * @param __REG__ Register to be read
173 * @retval Register value
174 */
175 #define LL_RNG_ReadReg(__instance__, __REG__) READ_REG(__instance__->__REG__)
176 /** @} */
177
178 /** @} */
179 /** @} */
180
181 /* Exported functions --------------------------------------------------------*/
182 /** @defgroup RNG_LL_Exported_Functions Functions
183 * @{
184 */
185
186 /** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
187 * @{
188 */
189
190 /**
191 * @brief Enable Random Number Generation.
192 *
193 * Register|BitsName
194 * --------|--------
195 * CTRL | RNG_RUN
196 *
197 * @param RNGx RNG instance.
198 * @retval None
199 */
ll_rng_enable(rng_regs_t * RNGx)200 __STATIC_INLINE void ll_rng_enable(rng_regs_t *RNGx)
201 {
202 SET_BITS(RNGx->CTRL, RNG_CTRL_RUN_EN);
203 }
204
205 /**
206 * @brief Disable Random Number Generation.
207 *
208 * Register|BitsName
209 * --------|--------
210 * CTRL | RNG_RUN
211 *
212 * @param RNGx RNG instance.
213 * @retval None
214 */
ll_rng_disable(rng_regs_t * RNGx)215 __STATIC_INLINE void ll_rng_disable(rng_regs_t *RNGx)
216 {
217 CLEAR_BITS(RNGx->CTRL, RNG_CTRL_RUN_EN);
218 }
219
220 /**
221 * @brief Check if Random Number Generator is enabled.
222 *
223 * Register|BitsName
224 * --------|--------
225 * CTRL | RNG_RUN
226 *
227 * @param RNGx RNG instance.
228 * @retval State of bit (1 or 0).
229 */
ll_rng_is_enabled(rng_regs_t * RNGx)230 __STATIC_INLINE uint32_t ll_rng_is_enabled(rng_regs_t *RNGx)
231 {
232 return (READ_BITS(RNGx->CTRL, RNG_CTRL_RUN_EN) == (RNG_CTRL_RUN_EN));
233 }
234
235 /**
236 * @brief Enable Ring oscillator TRNG enabled signal.
237 *
238 * Register|BitsName
239 * --------|--------
240 * CONFIG | RNG_FRO_EN
241 *
242 * @param RNGx RNG instance.
243 * @retval None
244 */
ll_rng_enable_fro(rng_regs_t * RNGx)245 __STATIC_INLINE void ll_rng_enable_fro(rng_regs_t *RNGx)
246 {
247 SET_BITS(RNGx->CONFIG, RNG_CONFIG_FRO_EN);
248 }
249
250 /**
251 * @brief Disable Ring oscillator TRNG enabled signal.
252 *
253 * Register|BitsName
254 * --------|--------
255 * CTRL | RNG_RUN
256 *
257 * @param RNGx RNG instance.
258 * @retval None
259 */
ll_rng_disable_fro(rng_regs_t * RNGx)260 __STATIC_INLINE void ll_rng_disable_fro(rng_regs_t *RNGx)
261 {
262 CLEAR_BITS(RNGx->CONFIG, RNG_CONFIG_FRO_EN);
263 }
264
265 /**
266 * @brief Check if Ring oscillator TRNG enabled signal is enabled.
267 *
268 * Register|BitsName
269 * --------|--------
270 * CTRL | RNG_RUN
271 *
272 * @param RNGx RNG instance.
273 * @retval State of bit (1 or 0).
274 */
ll_rng_fro_is_enabled(rng_regs_t * RNGx)275 __STATIC_INLINE uint32_t ll_rng_fro_is_enabled(rng_regs_t *RNGx)
276 {
277 return (READ_BITS(RNGx->CONFIG, RNG_CONFIG_FRO_EN) == (RNG_CONFIG_FRO_EN));
278 }
279
280 /**
281 * @brief Set source of LFSR seed.
282 *
283 * Register|BitsName
284 * --------|--------
285 * CONFIG | RNG_LFSR_SEED_SEL
286 *
287 * @param RNGx RNG instance.
288 * @param seed This parameter can be one of the following values:
289 * @arg @ref LL_RNG_SEED_FR0_S0
290 * @arg @ref LL_RNG_SEED_USER
291 * @retval None
292 */
ll_rng_set_lfsr_seed(rng_regs_t * RNGx,uint32_t seed)293 __STATIC_INLINE void ll_rng_set_lfsr_seed(rng_regs_t *RNGx, uint32_t seed)
294 {
295 MODIFY_REG(RNGx->CONFIG, RNG_CONFIG_LFSR_SEED_SEL, seed);
296 }
297
298 /**
299 * @brief Get source of LFSR seed.
300 *
301 * Register|BitsName
302 * --------|--------
303 * CONFIG | RNG_LFSR_SEED_SEL
304 *
305 * @param RNGx RNG instance.
306 * @retval Returned value can be one of the following values:
307 * @arg @ref LL_RNG_SEED_FR0_S0
308 * @arg @ref LL_RNG_SEED_USER
309 */
ll_rng_get_lfsr_seed(rng_regs_t * RNGx)310 __STATIC_INLINE uint32_t ll_rng_get_lfsr_seed(rng_regs_t *RNGx)
311 {
312 return READ_BITS(RNGx->CONFIG, RNG_CONFIG_LFSR_SEED_SEL);
313 }
314
315 /**
316 * @brief Set LFSR configuration mode.
317 *
318 * Register|BitsName
319 * --------|--------
320 * CONFIG | RNG_LFSR_MODE
321 *
322 * @param RNGx RNG instance.
323 * @param mode This parameter can be one of the following values:
324 * @arg @ref LL_RNG_LFSR_MODE_59BIT
325 * @arg @ref LL_RNG_LFSR_MODE_128BIT
326 * @retval None
327 */
ll_rng_set_lfsr_mode(rng_regs_t * RNGx,uint32_t mode)328 __STATIC_INLINE void ll_rng_set_lfsr_mode(rng_regs_t *RNGx, uint32_t mode)
329 {
330 MODIFY_REG(RNGx->CONFIG, RNG_CONFIG_LFSR_MODE, mode);
331 }
332
333 /**
334 * @brief Get LFSR configuration mode.
335 *
336 * Register|BitsName
337 * --------|--------
338 * CONFIG | RNG_LFSR_MODE
339 *
340 * @param RNGx RNG instance.
341 * @retval Returned value can be one of the following values:
342 * @arg @ref LL_RNG_LFSR_MODE_59BIT
343 * @arg @ref LL_RNG_LFSR_MODE_128BIT
344 */
ll_rng_get_lfsr_mode(rng_regs_t * RNGx)345 __STATIC_INLINE uint32_t ll_rng_get_lfsr_mode(rng_regs_t *RNGx)
346 {
347 return READ_BITS(RNGx->CONFIG, RNG_CONFIG_LFSR_MODE);
348 }
349
350 /**
351 * @brief Set RNG post-process configuration.
352 *
353 * Register|BitsName
354 * --------|--------
355 * CONFIG | RNG_POST_MODE
356 *
357 * @param RNGx RNG instance.
358 * @param post This parameter can be one of the following values:
359 * @arg @ref LL_RNG_POST_PRO_NOT
360 * @arg @ref LL_RNG_POST_PRO_SKIPPING
361 * @arg @ref LL_RNG_POST_PRO_COUNTING
362 * @arg @ref LL_RNG_POST_PRO_NEUMANN
363 * @retval None
364 */
ll_rng_set_post_mode(rng_regs_t * RNGx,uint32_t post)365 __STATIC_INLINE void ll_rng_set_post_mode(rng_regs_t *RNGx, uint32_t post)
366 {
367 MODIFY_REG(RNGx->CONFIG, RNG_CONFIG_POST_MODE, post);
368 }
369
370 /**
371 * @brief Get RNG post-process configuration.
372 *
373 * Register|BitsName
374 * --------|--------
375 * CONFIG | RNG_POST_MODE
376 *
377 * @param RNGx RNG instance.
378 * @retval Returned value can be one of the following values:
379 * @arg @ref LL_RNG_POST_PRO_NOT
380 * @arg @ref LL_RNG_POST_PRO_SKIPPING
381 * @arg @ref LL_RNG_POST_PRO_COUNTING
382 * @arg @ref LL_RNG_POST_PRO_NEUMANN
383 */
ll_rng_get_post_mode(rng_regs_t * RNGx)384 __STATIC_INLINE uint32_t ll_rng_get_post_mode(rng_regs_t *RNGx)
385 {
386 return READ_BITS(RNGx->CONFIG, RNG_CONFIG_POST_MODE);
387 }
388
389 /**
390 * @brief set RNG output mode.
391 *
392 * Register|BitsName
393 * --------|--------
394 * CONFIG | RNG_OUT_MODE
395 *
396 * @param RNGx RNG instance.
397 * @param mode This parameter can be one of the following values:
398 * @arg @ref LL_RNG_OUTPUT_FR0_S0
399 * @arg @ref LL_RNG_OUTPUT_CYCLIC_PARITY
400 * @arg @ref LL_RNG_OUTPUT_CYCLIC
401 * @arg @ref LL_RNG_OUTPUT_LFSR_RNG
402 * @arg @ref LL_RNG_OUTPUT_LFSR
403 * @retval None
404 */
ll_rng_set_output_mode(rng_regs_t * RNGx,uint32_t mode)405 __STATIC_INLINE void ll_rng_set_output_mode(rng_regs_t *RNGx, uint32_t mode)
406 {
407 MODIFY_REG(RNGx->CONFIG, RNG_CONFIG_OUT_MODE, mode);
408 }
409
410 /**
411 * @brief get RNG output mode.
412 *
413 * Register|BitsName
414 * --------|--------
415 * CONFIG | RNG_OUT_MODE
416 *
417 * @param RNGx RNG instance.
418 * @retval Returned value can be one of the following values:
419 * @arg @ref LL_RNG_OUTPUT_FR0_S0
420 * @arg @ref LL_RNG_OUTPUT_CYCLIC_PARITY
421 * @arg @ref LL_RNG_OUTPUT_CYCLIC
422 * @arg @ref LL_RNG_OUTPUT_LFSR_RNG
423 * @arg @ref LL_RNG_OUTPUT_LFSR
424 */
ll_rng_get_output_mode(rng_regs_t * RNGx)425 __STATIC_INLINE uint32_t ll_rng_get_output_mode(rng_regs_t *RNGx)
426 {
427 return READ_BITS(RNGx->CONFIG, RNG_CONFIG_OUT_MODE);
428 }
429
430 /**
431 * @brief set the waiting time that RNG input reaches stable.
432 *
433 * Register|BitsName
434 * --------|--------
435 * TSCON | RNG_TRDY_TIME
436 *
437 * @param RNGx RNG instance.
438 * @param time range between 0x1 and 0xFF.
439 * @retval None
440 */
ll_rng_set_trdy_time(rng_regs_t * RNGx,uint32_t time)441 __STATIC_INLINE void ll_rng_set_trdy_time(rng_regs_t *RNGx, uint32_t time)
442 {
443 MODIFY_REG(RNGx->TSCON, RNG_TSCON_TRDY_TIME, time);
444 }
445
446 /**
447 * @brief get the waiting time that RNG input reaches stable.
448 *
449 * Register|BitsName
450 * --------|--------
451 * TSCON | RNG_TRDY_TIME
452 *
453 * @param RNGx RNG instance.
454 * @retval Between Min_Time = 0 and Max_Time = 0xFF
455 */
ll_rng_get_trdy_time(rng_regs_t * RNGx)456 __STATIC_INLINE uint32_t ll_rng_get_trdy_time(rng_regs_t *RNGx)
457 {
458 return READ_BITS(RNGx->TSCON, RNG_TSCON_TRDY_TIME);
459 }
460
461
462 /**
463 * @brief set RNG seed configured by user.
464 *
465 * Register|BitsName
466 * --------|--------
467 * USER | RNG_USER_SEED
468 *
469 * @param RNGx RNG instance.
470 * @param seed range between 0x1 and 0xFFFF.
471 * @retval None
472 */
ll_rng_set_user_seed(rng_regs_t * RNGx,uint32_t seed)473 __STATIC_INLINE void ll_rng_set_user_seed(rng_regs_t *RNGx, uint32_t seed)
474 {
475 WRITE_REG(RNGx->USER_SEED, seed);
476 }
477
478 /** @} */
479
480 /** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
481 * @{
482 */
483
484 /**
485 * @brief Indicate if the Flag of RNG long run test is set or not.
486 *
487 * Register |BitsName
488 * ---------|--------
489 * LR_STATUS| RNG_LR_FLAG
490 *
491 * @param RNGx RNG instance.
492 * @retval State of bit (1 or 0).
493 */
ll_rng_is_active_flag_lr(rng_regs_t * RNGx)494 __STATIC_INLINE uint32_t ll_rng_is_active_flag_lr(rng_regs_t *RNGx)
495 {
496 return (READ_BITS(RNGx->LR_STATUS, RNG_LR_STATUS_FLAG) == (RNG_LR_STATUS_FLAG));
497 }
498
499 /**
500 * @brief Indicate if the RNG Status Flag is set or not.
501 *
502 * Register|BitsName
503 * --------|--------
504 * STATUS | RNG_READY
505 *
506 * @param RNGx RNG instance.
507 * @retval State of bit (1 or 0).
508 */
ll_rng_is_active_flag_sts(rng_regs_t * RNGx)509 __STATIC_INLINE uint32_t ll_rng_is_active_flag_sts(rng_regs_t *RNGx)
510 {
511 return (READ_BITS(RNGx->STATUS, RNG_STATUS_READY) == (RNG_STATUS_READY));
512 }
513
514 /**
515 * @brief Clear RNG Status flag.
516 *
517 * Register|BitsName
518 * --------|--------
519 * STATUS | RNG_READY
520 *
521 * @param RNGx RNG instance.
522 * @retval None
523 */
ll_rng_clear_flag_sts(rng_regs_t * RNGx)524 __STATIC_INLINE void ll_rng_clear_flag_sts(rng_regs_t *RNGx)
525 {
526 WRITE_REG(RNGx->STATUS, RNG_STATUS_READY);
527 }
528
529 /** @} */
530
531 /** @defgroup RNG_LL_EF_IT_Management IT Management
532 * @{
533 */
534
535 /**
536 * @brief Enable Random Number Generator Interrupt
537 *
538 * Register|BitsName
539 * --------|--------
540 * CONFIG | RNG_IRQ_EN
541 *
542 * @param RNGx RNG instance.
543 * @retval None
544 */
ll_rng_enable_it(rng_regs_t * RNGx)545 __STATIC_INLINE void ll_rng_enable_it(rng_regs_t *RNGx)
546 {
547 SET_BITS(RNGx->CONFIG, RNG_CONFIG_IRQ_EN);
548 }
549
550 /**
551 * @brief Disable Random Number Generator Interrupt
552 *
553 * Register|BitsName
554 * --------|--------
555 * CONFIG | RNG_IRQ_EN
556 *
557 * @param RNGx RNG instance.
558 * @retval None
559 */
ll_rng_disable_it(rng_regs_t * RNGx)560 __STATIC_INLINE void ll_rng_disable_it(rng_regs_t *RNGx)
561 {
562 CLEAR_BITS(RNGx->CONFIG, RNG_CONFIG_IRQ_EN);
563 }
564
565 /**
566 * @brief Check if Random Number Generator Interrupt is enabled
567 *
568 * Register|BitsName
569 * --------|--------
570 * CONFIG | RNG_IRQ_EN
571 *
572 * @param RNGx RNG instance.
573 * @retval State of bit (1 or 0).
574 */
ll_rng_is_enabled_it(rng_regs_t * RNGx)575 __STATIC_INLINE uint32_t ll_rng_is_enabled_it(rng_regs_t *RNGx)
576 {
577 return (READ_BITS(RNGx->CONFIG, RNG_CONFIG_IRQ_EN) == (RNG_CONFIG_IRQ_EN));
578 }
579
580 /** @} */
581
582 /** @defgroup RNG_LL_EF_Data_Management Data Management
583 * @{
584 */
585
586 /**
587 * @brief Return32-bit Random Number value
588 *
589 * Register|BitsName
590 * --------|--------
591 * DATA | RNG_DATA
592 *
593 * @param RNGx RNG instance.
594 * @retval Generated 32-bit random value
595 */
ll_rng_read_random_data32(rng_regs_t * RNGx)596 __STATIC_INLINE uint32_t ll_rng_read_random_data32(rng_regs_t *RNGx)
597 {
598 return (uint32_t)(READ_REG(RNGx->DATA));
599 }
600
601 /**
602 * @brief Return8-bit RNG Long Run Test counts.
603 *
604 * Register |BitsName
605 * ---------|--------
606 * LR_STATUS| RNG_LR_CNT
607 *
608 * @param RNGx RNG instance.
609 * @retval Output Data[7:0]
610 */
ll_rng_read_lr_count(rng_regs_t * RNGx)611 __STATIC_INLINE uint32_t ll_rng_read_lr_count(rng_regs_t *RNGx)
612 {
613 return READ_BITS(RNGx->LR_STATUS, RNG_LR_STATUS_CNT) >> RNG_LR_STATUS_CNT_Pos;
614 }
615
616 /** @} */
617
618 /** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
619 * @{
620 */
621
622 /**
623 * @brief De-initialize the RNG registers to their default reset values.
624 * @param RNGx RNG instance.
625 * @retval An error_status_t enumeration value:
626 * - SUCCESS: RNG registers are de-initialized
627 * - ERROR: RNG registers are not de-initialized
628 */
629 error_status_t ll_rng_deinit(rng_regs_t *RNGx);
630
631 /**
632 * @brief Initialize RNG registers according to the specified
633 * parameters in p_rng_init.
634 * @param RNGx RNG Instance
635 * @param p_rng_init Pointer to a ll_rng_init_t structure that contains the configuration
636 * information for the specified RNG peripheral.
637 * @retval An error_status_t enumeration value:
638 * - SUCCESS: RNG registers are initialized according to p_rng_init content
639 * - ERROR: Problem occurred during RNG Registers initialization
640 */
641 error_status_t ll_rng_init(rng_regs_t *RNGx, ll_rng_init_t *p_rng_init);
642
643 /**
644 * @brief Set each field of a @ref ll_rng_init_t type structure to default value.
645 * @param p_rng_init Pointer to a @ref ll_rng_init_t structure
646 * whose fields will be set to default values.
647 * @retval None
648 */
649 void ll_rng_struct_init(ll_rng_init_t *p_rng_init);
650
651 /** @} */
652
653 /** @} */
654
655 #endif /* RNG */
656
657 #ifdef __cplusplus
658 }
659 #endif
660
661 #endif /* __GR55XX_LL_RNG_H__ */
662
663 /** @} */
664
665 /** @} */
666
667 /** @} */
668