1 /*
2 * Copyright (c) 2021 Bestechnic (Shanghai) Co., Ltd. All rights reserved.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15 #ifndef NORFLASH_HAL_H
16 #define NORFLASH_HAL_H
17
18 #ifdef __cplusplus
19 extern "C" {
20 #endif
21
22 #include "plat_types.h"
23 #include "hal_cmu.h"
24
25 // 64M Bytes
26 #define HAL_NORFLASH_ADDR_MASK 0x03FFFFFF
27
28 #define HAL_NORFLASH_DEVICE_ID_LEN 3
29
30 #define HAL_NORFLASH_CP_ID_LEN 2
31 #define HAL_NORFLASH_UNIQUE_ID_LEN 16
32
33 #define FLASH_SECTOR_SIZE_IN_BYTES 4096
34 #define FLASH_BLOCK_SIZE_IN_BYTES (32*1024)
35
36 #define NORFLASH_PUYA_ID_PREFIX 0x85
37
38 #define NORFLASH_XTS_ID_PREFIX 0x0B
39
40 #define NORFLASH_XMC_ID_PREFIX 0x20
41
42 #define NORFLASH_ZBIT_ID_PREFIX 0x5E
43
44 #define NORFLASH_WB_ID_PREFIX 0xEF
45
46 #define NORFLASH_GD_ID_PREFIX 0xC8
47
48 enum HAL_NORFLASH_RET_T {
49 HAL_NORFLASH_OK,
50 HAL_NORFLASH_SUSPENDED,
51 HAL_NORFLASH_ERR,
52 HAL_NORFLASH_BAD_ID,
53 HAL_NORFLASH_BAD_DIV,
54 HAL_NORFLASH_BAD_CALIB_ID,
55 HAL_NORFLASH_BAD_CFG,
56 HAL_NORFLASH_BAD_OP,
57 HAL_NORFLASH_BAD_CALIB_MAGIC,
58 HAL_NORFLASH_BAD_ADDR,
59 HAL_NORFLASH_BAD_LEN,
60 HAL_NORFLASH_BAD_REMAP_ID,
61 HAL_NORFLASH_BAD_REMAP_OFFSET,
62 HAL_NORFLASH_BAD_ERASE_TYPE,
63 HAL_NORFLASH_NOT_OPENED,
64 HAL_NORFLASH_CFG_NULL,
65 };
66
67 enum HAL_NORFLASH_SPEED {
68 HAL_NORFLASH_SPEED_13M = 13000000,
69 HAL_NORFLASH_SPEED_26M = 26000000,
70 HAL_NORFLASH_SPEED_52M = 52000000,
71 HAL_NORFLASH_SPEED_78M = 78000000,
72 HAL_NORFLASH_SPEED_104M = 104000000,
73 HAL_NORFLASH_SPEED_130M = 130000000,
74 HAL_NORFLASH_SPEED_156M = 156000000,
75 HAL_NORFLASH_SPEED_182M = 182000000,
76 HAL_NORFLASH_SPEED_208M = 208000000,
77 HAL_NORFLASH_SPEED_234M = 234000000,
78 };
79
80 enum HAL_NORFLASH_REMAP_ID_T {
81 HAL_NORFLASH_REMAP_ID_0,
82 HAL_NORFLASH_REMAP_ID_1,
83 HAL_NORFLASH_REMAP_ID_2,
84 HAL_NORFLASH_REMAP_ID_3,
85
86 HAL_NORFLASH_REMAP_ID_QTY,
87 };
88
89 enum HAL_NORFLASH_OP_MODE {
90 // Different groups can be used together, different flash-device may support different option(s)
91
92 // (1) basic read mode
93 // standard spi mode
94 HAL_NORFLASH_OP_MODE_STAND_SPI = (1 << 0),
95 // fast spi mode
96 HAL_NORFLASH_OP_MODE_FAST_SPI = (1 << 1),
97 // dual mode
98 HAL_NORFLASH_OP_MODE_DUAL_OUTPUT = (1 << 2),
99 // dual mode
100 HAL_NORFLASH_OP_MODE_DUAL_IO = (1 << 3),
101 // quad mode
102 HAL_NORFLASH_OP_MODE_QUAD_OUTPUT = (1 << 4),
103 // quad mode
104 HAL_NORFLASH_OP_MODE_QUAD_IO = (1 << 5),
105 // dtr mode
106 HAL_NORFLASH_OP_MODE_DTR = (1 << 6),
107
108 // (2) extend read mode
109 // read accelerate (no cmd bettween read operation) :
110 // may need Dual or Quad Mode
111 HAL_NORFLASH_OP_MODE_CONTINUOUS_READ = (1 << 12),
112 // read high performance mode
113 HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE = (1 << 13),
114 // read wrap mode
115 HAL_NORFLASH_OP_MODE_READ_WRAP = (1 << 14),
116
117 // (3) program mode.
118 // page program mode
119 HAL_NORFLASH_OP_MODE_PAGE_PROGRAM = (1 << 16),
120 // dual program mode
121 HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM = (1 << 17),
122 // quad program mode
123 HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM = (1 << 18),
124 // erase in standard spi mode
125 HAL_NORFLASH_OP_MODE_ERASE_IN_STD = (1 << 19),
126
127 // (4) advanced features
128 // suspend and resume
129 HAL_NORFLASH_OP_MODE_SUSPEND = (1 << 24),
130
131 HAL_NORFLASH_OP_MODE_RESERVED = 0xFFFFFFFF,
132 };
133
134 struct HAL_NORFLASH_CONFIG_T {
135 uint32_t source_clk;
136 uint32_t speed;
137 enum HAL_NORFLASH_OP_MODE mode;
138
139 /* internal use : can be config if need to (useful for rom) */
140 uint8_t override_config:1;
141 uint8_t neg_phase:1;
142 uint8_t pos_neg:1;
143 uint8_t reserved_3:1;
144 uint8_t samdly:3;
145 uint8_t div; /* least 2 */
146 uint8_t dualmode:1;
147 uint8_t holdpin:1;
148 uint8_t wprpin:1;
149 uint8_t quadmode:1;
150
151 uint8_t spiruen:3;
152 uint8_t spirden:3;
153
154 uint8_t dualiocmd;
155 uint8_t rdcmd;
156 uint8_t frdcmd;
157 uint8_t qrdcmd; /* quad io cmd */
158 #if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)
159 uint8_t dec_enable; /* 1: enable decoder, 0: disable decoder */
160 uint8_t dec_idx; /* decoder key index ,from 0 to 3 */
161 uint32_t dec_addr; /* start address where to decode */
162 uint32_t dec_size; /* bytes number will be decoded */
163 #endif
164 };
165
166 #ifdef ARM_CMNS
167 #define NORFLASH_API_WRAP(n) n##_se
168 #else
169 #define NORFLASH_API_WRAP(n) n
170 #endif
171
172 #ifndef ARM_CMNS
173 /* hal api */
174 void hal_norflash_set_boot_freq(enum HAL_CMU_FREQ_T freq);
175 const struct HAL_NORFLASH_CONFIG_T *hal_norflash_get_init_config(void);
176 enum HAL_NORFLASH_RET_T hal_norflash_init(void);
177 enum HAL_NORFLASH_RET_T hal_norflash_deinit(void);
178 enum HAL_NORFLASH_RET_T hal_norflash_open(enum HAL_FLASH_ID_T id, const struct HAL_NORFLASH_CONFIG_T *cfg);
179 enum HAL_NORFLASH_RET_T hal_norflash_reopen(enum HAL_FLASH_ID_T id, const struct HAL_NORFLASH_CONFIG_T *cfg);
180 enum HAL_NORFLASH_RET_T hal_norflash_apply_config(enum HAL_FLASH_ID_T id, const struct HAL_NORFLASH_CONFIG_T *cfg, uint32_t timing_idx);
181 uint32_t hal_norflash_get_timing_index(enum HAL_FLASH_ID_T id);
182 void hal_norflash_show_calib_result(enum HAL_FLASH_ID_T id);
183 enum HAL_CMU_FREQ_T hal_norflash_clk_to_cmu_freq(uint32_t clk);
184 enum HAL_NORFLASH_RET_T hal_norflash_get_size(enum HAL_FLASH_ID_T id, uint32_t *total_size, uint32_t *block_size, uint32_t *sector_size, uint32_t *page_size);
185 enum HAL_NORFLASH_RET_T hal_norflash_get_boundary(enum HAL_FLASH_ID_T id, uint32_t address, uint32_t* block_boundary, uint32_t* sector_boundary);
186 enum HAL_NORFLASH_RET_T hal_norflash_get_id(enum HAL_FLASH_ID_T id, uint8_t *value, uint32_t len);
187 enum HAL_NORFLASH_RET_T hal_norflash_get_unique_id(enum HAL_FLASH_ID_T id, uint8_t *value, uint32_t len);
188 enum HAL_NORFLASH_RET_T hal_norflash_enable_protection(enum HAL_FLASH_ID_T id);
189 enum HAL_NORFLASH_RET_T hal_norflash_disable_protection(enum HAL_FLASH_ID_T id);
190 enum HAL_NORFLASH_RET_T hal_norflash_erase_chip(enum HAL_FLASH_ID_T id);
191 enum HAL_NORFLASH_RET_T hal_norflash_erase_suspend(enum HAL_FLASH_ID_T id, uint32_t start_address, uint32_t len, int suspend);
192 enum HAL_NORFLASH_RET_T hal_norflash_erase(enum HAL_FLASH_ID_T id, uint32_t start_address, uint32_t len);
193 enum HAL_NORFLASH_RET_T hal_norflash_erase_resume(enum HAL_FLASH_ID_T id, int suspend);
194 enum HAL_NORFLASH_RET_T hal_norflash_write_suspend(enum HAL_FLASH_ID_T id, uint32_t start_address, const uint8_t *buffer, uint32_t len, int suspend);
195 enum HAL_NORFLASH_RET_T hal_norflash_write(enum HAL_FLASH_ID_T id, uint32_t start_address, const uint8_t *buffer, uint32_t len);
196 enum HAL_NORFLASH_RET_T hal_norflash_write_resume(enum HAL_FLASH_ID_T id, int suspend);
197 enum HAL_NORFLASH_RET_T hal_norflash_suspend_check_irq(enum HAL_FLASH_ID_T id, uint32_t irq_num);
198 enum HAL_NORFLASH_RET_T hal_norflash_read(enum HAL_FLASH_ID_T id, uint32_t start_address, uint8_t *buffer, uint32_t len);
199 enum HAL_NORFLASH_RET_T hal_norflash_close(enum HAL_FLASH_ID_T id);
200 void hal_norflash_sleep(enum HAL_FLASH_ID_T id);
201 void hal_norflash_wakeup(enum HAL_FLASH_ID_T id);
202 int hal_norflash_busy(void);
203 uint32_t hal_norflash_mem_read_bus_lock(enum HAL_FLASH_ID_T id);
204 void hal_norflash_mem_read_bus_unlock(enum HAL_FLASH_ID_T id, uint32_t status);
205 uint32_t hal_norflash_get_flash_total_size(enum HAL_FLASH_ID_T id);
206 int hal_norflash_opened(enum HAL_FLASH_ID_T id);
207 enum HAL_NORFLASH_RET_T hal_norflash_get_open_state(enum HAL_FLASH_ID_T id);
208 int hal_norflash_security_register_is_locked(enum HAL_FLASH_ID_T id, uint32_t start_address, uint32_t len);
209 enum HAL_NORFLASH_RET_T hal_norflash_security_register_lock(enum HAL_FLASH_ID_T id, uint32_t start_address, uint32_t len);
210 enum HAL_NORFLASH_RET_T hal_norflash_security_register_erase(enum HAL_FLASH_ID_T id, uint32_t start_address, uint32_t len);
211 enum HAL_NORFLASH_RET_T hal_norflash_security_register_write(enum HAL_FLASH_ID_T id, uint32_t start_address, const uint8_t *buffer, uint32_t len);
212 enum HAL_NORFLASH_RET_T hal_norflash_security_register_read(enum HAL_FLASH_ID_T id, uint32_t start_address, uint8_t *buffer, uint32_t len);
213 void hal_norflash_reset_remap(enum HAL_FLASH_ID_T id);
214 enum HAL_NORFLASH_RET_T hal_norflash_config_remap(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t addr, uint32_t len, uint32_t offset);
215 enum HAL_NORFLASH_RET_T hal_norflash_enable_remap(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id);
216 enum HAL_NORFLASH_RET_T hal_norflash_disable_remap(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id);
217 int hal_norflash_get_remap_status(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id);
218 void hal_norflash_boot_reset_remap(enum HAL_FLASH_ID_T id);
219 enum HAL_NORFLASH_RET_T hal_norflash_boot_config_remap(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t addr, uint32_t len, uint32_t offset);
220 enum HAL_NORFLASH_RET_T hal_norflash_boot_disable_remap(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id);
221 enum HAL_NORFLASH_RET_T hal_norflash_boot_enable_remap(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id);
222 int hal_norflash_boot_get_remap_status(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id);
223 #else /* !ARM_CMNS */
224 #define hal_norflash_get_id hal_norflash_get_id_se
225 #define hal_norflash_get_flash_total_size hal_norflash_get_flash_total_size_se
226 #define hal_norflash_get_size hal_norflash_get_size_se
227 #define hal_norflash_show_calib_result hal_norflash_show_calib_result_se
228 #define hal_norflash_erase hal_norflash_erase_se
229 #define hal_norflash_write hal_norflash_write_se
230 #define hal_norflash_read hal_norflash_read_se
231 #define hal_norflash_sleep hal_norflash_sleep_se
232 #define hal_norflash_wakeup hal_norflash_wakeup_se
233 #define hal_norflash_opened hal_norflash_opened_se
234 #define hal_norflash_get_open_state hal_norflash_get_open_state_se
235 #define hal_norflash_write_resume hal_norflash_write_resume_se
236 #define hal_norflash_erase_resume hal_norflash_erase_resume_se
237 #define hal_norflash_write_suspend hal_norflash_write_suspend_se
238 #define hal_norflash_erase_suspend hal_norflash_erase_suspend_se
239 #define hal_norflash_enable_remap hal_norflash_enable_remap_se
240 #define hal_norflash_disable_remap hal_norflash_disable_remap_se
241 #define hal_norflash_config_remap hal_norflash_config_remap_se
242 #define hal_norflash_get_remap_status hal_norflash_get_remap_status_se
243 #define hal_norflash_get_unique_id hal_norflash_get_unique_id_se
244 #define hal_norflash_disable_protection hal_norflash_disable_protection_se
245 #define hal_norflash_security_register_lock hal_norflash_security_register_lock_se
246 #define hal_norflash_security_register_read hal_norflash_security_register_read_se
247 #define hal_norflash_erase_remap hal_norflash_erase_remap_se
248 #define hal_norflash_write_remap hal_norflash_write_remap_se
249 #define hal_norflash_read_remap hal_norflash_read_remap_se
250
251 enum HAL_NORFLASH_RET_T hal_norflash_get_id_se(enum HAL_FLASH_ID_T id, uint8_t *value, uint32_t len);
252 uint32_t hal_norflash_get_flash_total_size_se(enum HAL_FLASH_ID_T id);
253 enum HAL_NORFLASH_RET_T hal_norflash_get_size_se0(uint32_t *total_size,
254 uint32_t *block_size, uint32_t *sector_size, uint32_t *page_size);
255 enum HAL_NORFLASH_RET_T hal_norflash_get_size_se1(uint32_t *total_size,
256 uint32_t *block_size, uint32_t *sector_size, uint32_t *page_size);
hal_norflash_get_size_se(enum HAL_FLASH_ID_T id,uint32_t * total_size,uint32_t * block_size,uint32_t * sector_size,uint32_t * page_size)257 static inline enum HAL_NORFLASH_RET_T hal_norflash_get_size_se(enum HAL_FLASH_ID_T id, uint32_t *total_size,
258 uint32_t *block_size, uint32_t *sector_size, uint32_t *page_size)
259 {
260 if (id == HAL_FLASH_ID_0)
261 return hal_norflash_get_size_se0(total_size, block_size, sector_size, page_size);
262 else if (id == HAL_FLASH_ID_1)
263 return hal_norflash_get_size_se1(total_size, block_size, sector_size, page_size);
264 else
265 return HAL_NORFLASH_BAD_ID;
266 }
267 void hal_norflash_show_calib_result_se(enum HAL_FLASH_ID_T id);
268 enum HAL_NORFLASH_RET_T hal_norflash_erase_se(enum HAL_FLASH_ID_T id, uint32_t start_address, uint32_t len);
269 enum HAL_NORFLASH_RET_T hal_norflash_write_se(enum HAL_FLASH_ID_T id, uint32_t start_address, const uint8_t *buffer, uint32_t len);
270 enum HAL_NORFLASH_RET_T hal_norflash_read_se(enum HAL_FLASH_ID_T id, uint32_t start_address, uint8_t *buffer, uint32_t len);
271 void hal_norflash_sleep_se(enum HAL_FLASH_ID_T id);
272 void hal_norflash_wakeup_se(enum HAL_FLASH_ID_T id);
273 int hal_norflash_opened_se(enum HAL_FLASH_ID_T id);
274 enum HAL_NORFLASH_RET_T hal_norflash_get_open_state_se(enum HAL_FLASH_ID_T id);
275 enum HAL_NORFLASH_RET_T hal_norflash_write_resume_se(enum HAL_FLASH_ID_T id, int suspend);
276 enum HAL_NORFLASH_RET_T hal_norflash_erase_resume_se(enum HAL_FLASH_ID_T id, int suspend);
277 enum HAL_NORFLASH_RET_T hal_norflash_enable_remap_se(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id);
278 enum HAL_NORFLASH_RET_T hal_norflash_disable_remap_se(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id);
279 enum HAL_NORFLASH_RET_T hal_norflash_config_remap_se0(enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t addr, uint32_t len, uint32_t offset);
280 enum HAL_NORFLASH_RET_T hal_norflash_config_remap_se1(enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t addr, uint32_t len, uint32_t offset);
hal_norflash_config_remap_se(enum HAL_FLASH_ID_T id,enum HAL_NORFLASH_REMAP_ID_T remap_id,uint32_t addr,uint32_t len,uint32_t offset)281 static inline enum HAL_NORFLASH_RET_T hal_norflash_config_remap_se(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t addr, uint32_t len, uint32_t offset)
282 {
283 if (id == HAL_FLASH_ID_0)
284 return hal_norflash_config_remap_se0(remap_id, addr, len, offset);
285 else if (id == HAL_FLASH_ID_1)
286 return hal_norflash_config_remap_se1(remap_id, addr, len, offset);
287 else
288 return HAL_NORFLASH_BAD_ID;
289 }
290 int hal_norflash_get_remap_status_se(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id);
291 enum HAL_NORFLASH_RET_T hal_norflash_write_suspend_se0(uint32_t start_address, const uint8_t *buffer, uint32_t len, int suspend);
292 enum HAL_NORFLASH_RET_T hal_norflash_write_suspend_se1(uint32_t start_address, const uint8_t *buffer, uint32_t len, int suspend);
hal_norflash_write_suspend_se(enum HAL_FLASH_ID_T id,uint32_t start_address,const uint8_t * buffer,uint32_t len,int suspend)293 static inline enum HAL_NORFLASH_RET_T hal_norflash_write_suspend_se(enum HAL_FLASH_ID_T id, uint32_t start_address, const uint8_t *buffer, uint32_t len, int suspend)
294 {
295 if (id == HAL_FLASH_ID_0)
296 return hal_norflash_write_suspend_se0(start_address, buffer, len, suspend);
297 else if (id == HAL_FLASH_ID_1)
298 return hal_norflash_write_suspend_se1(start_address, buffer, len, suspend);
299 else
300 return HAL_NORFLASH_BAD_ID;
301 }
302 enum HAL_NORFLASH_RET_T hal_norflash_get_unique_id_se(enum HAL_FLASH_ID_T id, uint8_t *value, uint32_t len);
303 enum HAL_NORFLASH_RET_T hal_norflash_security_register_lock_se(enum HAL_FLASH_ID_T id, uint32_t start_address, uint32_t len);
304 enum HAL_NORFLASH_RET_T hal_norflash_security_register_read_se(enum HAL_FLASH_ID_T id, uint32_t start_address, uint8_t *buffer, uint32_t len);
305 enum HAL_NORFLASH_RET_T hal_norflash_erase_suspend_se(enum HAL_FLASH_ID_T id, uint32_t start_address, uint32_t len, int suspend);
306 enum HAL_NORFLASH_RET_T hal_norflash_disable_protection_se(enum HAL_FLASH_ID_T id);
307
308 enum HAL_NORFLASH_RET_T hal_norflash_read_remap_se0(enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t start_address, uint8_t *buffer, uint32_t len);
309 enum HAL_NORFLASH_RET_T hal_norflash_read_remap_se1(enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t start_address, uint8_t *buffer, uint32_t len);
hal_norflash_read_remap_se(enum HAL_FLASH_ID_T id,enum HAL_NORFLASH_REMAP_ID_T remap_id,uint32_t start_address,uint8_t * buffer,uint32_t len)310 static inline enum HAL_NORFLASH_RET_T hal_norflash_read_remap_se(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t start_address, uint8_t *buffer, uint32_t len)
311 {
312 if (id == HAL_FLASH_ID_0)
313 return hal_norflash_read_remap_se0(remap_id, start_address, buffer, len);
314 else if (id == HAL_FLASH_ID_1)
315 return hal_norflash_read_remap_se1(remap_id, start_address, buffer, len);
316 else
317 return HAL_NORFLASH_BAD_ID;
318 }
319 enum HAL_NORFLASH_RET_T hal_norflash_write_remap_se0(enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t start_address, uint8_t *buffer, uint32_t len);
320 enum HAL_NORFLASH_RET_T hal_norflash_write_remap_se1(enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t start_address, uint8_t *buffer, uint32_t len);
hal_norflash_write_remap_se(enum HAL_FLASH_ID_T id,enum HAL_NORFLASH_REMAP_ID_T remap_id,uint32_t start_address,uint8_t * buffer,uint32_t len)321 static inline enum HAL_NORFLASH_RET_T hal_norflash_write_remap_se(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t start_address, uint8_t *buffer, uint32_t len)
322 {
323 if (id == HAL_FLASH_ID_0)
324 return hal_norflash_write_remap_se0(remap_id, start_address, buffer, len);
325 else if (id == HAL_FLASH_ID_1)
326 return hal_norflash_write_remap_se1(remap_id, start_address, buffer, len);
327 else
328 return HAL_NORFLASH_BAD_ID;
329 }
330 enum HAL_NORFLASH_RET_T hal_norflash_erase_remap_se(enum HAL_FLASH_ID_T id, enum HAL_NORFLASH_REMAP_ID_T remap_id, uint32_t start_address, uint32_t len);
331 #endif /* ARM_CMNS */
332
333 #ifdef __cplusplus
334 }
335 #endif
336
337 #endif /* NORFLASH_HAL_H */
338