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Searched refs:ARCH_DMA_MINALIGN (Results 1 – 25 of 120) sorted by relevance

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/third_party/uboot/u-boot-2020.01/drivers/crypto/fsl/
Dfsl_blob.c34 if (!IS_ALIGNED((uintptr_t)key_mod, ARCH_DMA_MINALIGN) || in blob_decap()
35 !IS_ALIGNED((uintptr_t)src, ARCH_DMA_MINALIGN) || in blob_decap()
36 !IS_ALIGNED((uintptr_t)dst, ARCH_DMA_MINALIGN)) { in blob_decap()
48 size = ALIGN(16, ARCH_DMA_MINALIGN); in blob_decap()
52 size = ALIGN(BLOB_SIZE(len), ARCH_DMA_MINALIGN); in blob_decap()
62 size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN); in blob_decap()
71 size = ALIGN(len, ARCH_DMA_MINALIGN); in blob_decap()
99 if (!IS_ALIGNED((uintptr_t)key_mod, ARCH_DMA_MINALIGN) || in blob_encap()
100 !IS_ALIGNED((uintptr_t)src, ARCH_DMA_MINALIGN) || in blob_encap()
101 !IS_ALIGNED((uintptr_t)dst, ARCH_DMA_MINALIGN)) { in blob_encap()
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Dfsl_hash.c175 if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) || in caam_hash()
176 !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) { in caam_hash()
181 size = ALIGN(buf_len, ARCH_DMA_MINALIGN); in caam_hash()
189 size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN); in caam_hash()
194 size = ALIGN(driver_hash[algo].digestsize, ARCH_DMA_MINALIGN); in caam_hash()
Djr.c115 jr->input_ring = (dma_addr_t *)memalign(ARCH_DMA_MINALIGN, in jr_init()
121 ARCH_DMA_MINALIGN); in jr_init()
123 (struct op_ring *)memalign(ARCH_DMA_MINALIGN, jr->op_size); in jr_init()
214 ~(ARCH_DMA_MINALIGN - 1); in jr_enqueue()
216 sizeof(struct jr_info), ARCH_DMA_MINALIGN); in jr_enqueue()
240 start = (unsigned long)&jr->input_ring[head] & ~(ARCH_DMA_MINALIGN - 1); in jr_enqueue()
242 sizeof(dma_addr_t), ARCH_DMA_MINALIGN); in jr_enqueue()
249 ~(ARCH_DMA_MINALIGN - 1); in jr_enqueue()
251 ARCH_DMA_MINALIGN); in jr_enqueue()
455 desc = memalign(ARCH_DMA_MINALIGN, sizeof(uint32_t) * 6); in instantiate_rng()
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/third_party/uboot/u-boot-2020.01/arch/arm/mach-omap2/
Dsec-common.c59 static uint32_t secure_rom_call_args[5] __aligned(ARCH_DMA_MINALIGN) __section(".data");
88 roundup(sizeof(secure_rom_call_args), ARCH_DMA_MINALIGN)); in secure_rom_call()
118 rounddown((u32)*image, ARCH_DMA_MINALIGN), in secure_boot_verify_image()
119 roundup((u32)*image + *size, ARCH_DMA_MINALIGN)); in secure_boot_verify_image()
160 rounddown((u32)*image, ARCH_DMA_MINALIGN), in secure_boot_verify_image()
161 roundup((u32)*image + *size, ARCH_DMA_MINALIGN)); in secure_boot_verify_image()
290 static struct ppa_tee_load_info tee_info __aligned(ARCH_DMA_MINALIGN);
339 rounddown((u32)loadptr, ARCH_DMA_MINALIGN), in secure_tee_install()
340 roundup((u32)loadptr + tee_file_size, ARCH_DMA_MINALIGN)); in secure_tee_install()
343 roundup(sizeof(tee_info), ARCH_DMA_MINALIGN)); in secure_tee_install()
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/third_party/uboot/u-boot-2020.01/include/
Dmemalign.h79 ALLOC_ALIGN_BUFFER_PAD(type, name, size, ARCH_DMA_MINALIGN, pad)
81 ALLOC_ALIGN_BUFFER(type, name, size, ARCH_DMA_MINALIGN)
94 DEFINE_ALIGN_BUFFER(type, name, size, ARCH_DMA_MINALIGN)
111 return memalign(ARCH_DMA_MINALIGN, ALIGN(size, ARCH_DMA_MINALIGN)); in malloc_cache_aligned()
/third_party/uboot/u-boot-2020.01/drivers/net/
Dftgmac100.c75 struct ftgmac100_txdes txdes[PKTBUFSTX] __aligned(ARCH_DMA_MINALIGN);
76 struct ftgmac100_rxdes rxdes[PKTBUFSRX] __aligned(ARCH_DMA_MINALIGN);
313 start = ((ulong)&priv->txdes[0]) & ~(ARCH_DMA_MINALIGN - 1); in ftgmac100_start()
314 end = start + roundup(sizeof(priv->txdes), ARCH_DMA_MINALIGN); in ftgmac100_start()
323 start = ((ulong)&priv->rxdes[0]) & ~(ARCH_DMA_MINALIGN - 1); in ftgmac100_start()
324 end = start + roundup(sizeof(priv->rxdes), ARCH_DMA_MINALIGN); in ftgmac100_start()
373 ulong des_start = ((ulong)curr_des) & ~(ARCH_DMA_MINALIGN - 1); in ftgmac100_free_pkt()
375 roundup(sizeof(*curr_des), ARCH_DMA_MINALIGN); in ftgmac100_free_pkt()
395 ulong des_start = ((ulong)curr_des) & ~(ARCH_DMA_MINALIGN - 1); in ftgmac100_recv()
397 roundup(sizeof(*curr_des), ARCH_DMA_MINALIGN); in ftgmac100_recv()
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Dfec_mxc.c64 #define RXDESC_PER_CACHELINE (ARCH_DMA_MINALIGN/sizeof(struct fec_bd))
67 #if ((ARCH_DMA_MINALIGN < 16) || (ARCH_DMA_MINALIGN % 16 != 0))
71 #if ((PKTALIGN < ARCH_DMA_MINALIGN) || \
72 (PKTALIGN % ARCH_DMA_MINALIGN != 0))
343 size = roundup(dsize, ARCH_DMA_MINALIGN); in fec_rbd_init()
377 ARCH_DMA_MINALIGN); in fec_tbd_init()
490 ARCH_DMA_MINALIGN); in fec_open()
730 end = roundup(addr + length, ARCH_DMA_MINALIGN); in fecmxc_send()
731 addr &= ~(ARCH_DMA_MINALIGN - 1); in fecmxc_send()
754 size = roundup(2 * sizeof(struct fec_bd), ARCH_DMA_MINALIGN); in fecmxc_send()
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/third_party/uboot/u-boot-2020.01/arch/sandbox/include/asm/
Dcache.h18 #define ARCH_DMA_MINALIGN __BIGGEST_ALIGNMENT__ macro
20 #define ARCH_DMA_MINALIGN 16 macro
22 #define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
/third_party/uboot/u-boot-2020.01/arch/sh/include/asm/
Dcache.h17 #define ARCH_DMA_MINALIGN 32 macro
25 #ifndef ARCH_DMA_MINALIGN
26 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/third_party/uboot/u-boot-2020.01/cmd/
Delf.c57 flush_cache(rounddown((unsigned long)dst, ARCH_DMA_MINALIGN), in load_elf64_image_phdr()
58 roundup(phdr->p_memsz, ARCH_DMA_MINALIGN)); in load_elf64_image_phdr()
120 flush_cache(rounddown(shdr->sh_addr, ARCH_DMA_MINALIGN), in load_elf64_image_shdr()
122 ARCH_DMA_MINALIGN) - in load_elf64_image_shdr()
123 rounddown(shdr->sh_addr, ARCH_DMA_MINALIGN)); in load_elf64_image_shdr()
172 flush_cache(rounddown((unsigned long)dst, ARCH_DMA_MINALIGN), in load_elf_image_phdr()
173 roundup(phdr->p_memsz, ARCH_DMA_MINALIGN)); in load_elf_image_phdr()
225 flush_cache(rounddown(shdr->sh_addr, ARCH_DMA_MINALIGN), in load_elf_image_shdr()
227 ARCH_DMA_MINALIGN) - in load_elf_image_shdr()
228 rounddown(shdr->sh_addr, ARCH_DMA_MINALIGN)); in load_elf_image_shdr()
/third_party/uboot/u-boot-2020.01/common/
Dbouncebuf.c16 const ulong align_mask = ARCH_DMA_MINALIGN - 1; in addr_aligned()
40 state->len_aligned = roundup(len, ARCH_DMA_MINALIGN); in bounce_buffer_start()
44 state->bounce_buffer = memalign(ARCH_DMA_MINALIGN, in bounce_buffer_start()
/third_party/uboot/u-boot-2020.01/drivers/remoteproc/
Drproc-elf-loader.c177 flush_cache(rounddown((unsigned long)dst, ARCH_DMA_MINALIGN),
179 ARCH_DMA_MINALIGN) -
180 rounddown((unsigned long)dst, ARCH_DMA_MINALIGN));
233 flush_cache(rounddown((ulong)ptr, ARCH_DMA_MINALIGN),
234 roundup((ulong)ptr + filesz, ARCH_DMA_MINALIGN) -
235 rounddown((ulong)ptr, ARCH_DMA_MINALIGN));
/third_party/uboot/u-boot-2020.01/arch/microblaze/include/asm/
Dcache.h16 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE macro
18 #define ARCH_DMA_MINALIGN 16 macro
/third_party/uboot/u-boot-2020.01/arch/riscv/include/asm/
Dcache.h19 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE macro
21 #define ARCH_DMA_MINALIGN 32 macro
/third_party/uboot/u-boot-2020.01/arch/mips/include/asm/
Dcache.h12 #define ARCH_DMA_MINALIGN (L1_CACHE_BYTES) macro
19 #define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
Dcacheops.h30 int i, lines = ((len - 1) / ARCH_DMA_MINALIGN) + 1; in icache_lock()
36 "n" (i * ARCH_DMA_MINALIGN), in icache_lock()
/third_party/uboot/u-boot-2020.01/arch/arc/include/asm/
Dcache.h17 #define ARCH_DMA_MINALIGN 128 macro
20 #define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/
Ddma-mapping.h16 *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, ROUND(len, ARCH_DMA_MINALIGN)); in dma_alloc_coherent()
/third_party/uboot/u-boot-2020.01/arch/nds32/include/asm/
Dcache.h58 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE macro
60 #define ARCH_DMA_MINALIGN 32 macro
/third_party/uboot/u-boot-2020.01/drivers/fpga/
Dversalpl.c18 if ((ulong)buf != ALIGN((ulong)buf, ARCH_DMA_MINALIGN)) { in versal_align_dma_buffer()
19 new_buf = (ulong *)ALIGN((ulong)buf, ARCH_DMA_MINALIGN); in versal_align_dma_buffer()
Dzynqpl.c304 if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) { in zynq_align_dma_buffer()
305 new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN); in zynq_align_dma_buffer()
314 new_buf -= ARCH_DMA_MINALIGN; in zynq_align_dma_buffer()
390 roundup(bsize, ARCH_DMA_MINALIGN)); in zynq_load()
532 roundup(srclen << 2, ARCH_DMA_MINALIGN)); in zynq_decrypt_load()
538 roundup(dstlen << 2, ARCH_DMA_MINALIGN)); in zynq_decrypt_load()
/third_party/uboot/u-boot-2020.01/drivers/usb/host/
Dohci.h24 #if ARCH_DMA_MINALIGN > 16
25 #define ED_ALIGNMENT ARCH_DMA_MINALIGN
30 #if CONFIG_IS_ENABLED(DM_USB) && ARCH_DMA_MINALIGN > 32
31 #define TD_ALIGNMENT ARCH_DMA_MINALIGN
/third_party/uboot/u-boot-2020.01/env/
Dsf.c101 saved_buffer = memalign(ARCH_DMA_MINALIGN, saved_size); in env_sf_save()
159 tmp_env1 = (env_t *)memalign(ARCH_DMA_MINALIGN, in env_sf_load()
161 tmp_env2 = (env_t *)memalign(ARCH_DMA_MINALIGN, in env_sf_load()
257 buf = (char *)memalign(ARCH_DMA_MINALIGN, CONFIG_ENV_SIZE); in env_sf_load()
/third_party/uboot/u-boot-2020.01/drivers/net/higmacv300/
Dhigmac.c362 queue_phy_addr = (higmac_desc *)memalign(ARCH_DMA_MINALIGN, size); in higmac_memalign_queue_addr()
368 flush_cache((uintptr_t)queue_phy_addr, ALIGN(size, ARCH_DMA_MINALIGN)); in higmac_memalign_queue_addr()
713 addr = (phys_addr_t)(uintptr_t)memalign(ARCH_DMA_MINALIGN, in higmac_recv_rx_fq()
719 ALIGN(addr + HIETH_BUFFER_SIZE, ARCH_DMA_MINALIGN)); in higmac_recv_rx_fq()
730 flush_cache((uintptr_t)rx_fq_desc & ~(ARCH_DMA_MINALIGN - 1), in higmac_recv_rx_fq()
731 ALIGN(sizeof(*rx_fq_desc), ARCH_DMA_MINALIGN)); in higmac_recv_rx_fq()
769 invalidate_dcache_range((uintptr_t)rx_bq_desc & ~(ARCH_DMA_MINALIGN - 1), in higmac_recv()
770 ALIGN((uintptr_t)rx_bq_desc + sizeof(*rx_bq_desc), ARCH_DMA_MINALIGN)); in higmac_recv()
789 ALIGN((unsigned int)(addr + len), ARCH_DMA_MINALIGN)); in higmac_recv()
867 flush_cache((uintptr_t)packet, ALIGN((u32)length, ARCH_DMA_MINALIGN)); in higmac_send()
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/third_party/uboot/u-boot-2020.01/drivers/bootcount/
Dbootcount_ram.c41 ~(ARCH_DMA_MINALIGN - 1)) + ARCH_DMA_MINALIGN)); in bootcount_store()

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