Searched refs:CLK_APMIXED_ARMPLL (Results 1 – 10 of 10) sorted by relevance
/third_party/uboot/u-boot-2020.01/arch/arm/mach-mediatek/mt8516/ |
D | init.c | 43 [CLK_APMIXED_ARMPLL] = 1300000000, in mtk_pll_early_init()
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/third_party/uboot/u-boot-2020.01/arch/arm/mach-mediatek/mt7629/ |
D | init.c | 29 [CLK_APMIXED_ARMPLL] = 1250000000, in mtk_pll_early_init()
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/third_party/uboot/u-boot-2020.01/include/dt-bindings/clock/ |
D | mt7629-clk.h | 159 #define CLK_APMIXED_ARMPLL 0 macro
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D | mt8516-clk.h | 14 #define CLK_APMIXED_ARMPLL 0 macro
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D | mt8518-clk.h | 11 #define CLK_APMIXED_ARMPLL 0 macro
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D | mt7623-clk.h | 177 #define CLK_APMIXED_ARMPLL 0 macro
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/third_party/uboot/u-boot-2020.01/drivers/clk/mediatek/ |
D | clk-mt7623.c | 44 PLL(CLK_APMIXED_ARMPLL, 0x200, 0x20c, 0x80000001, 0, 167 FACTOR0(CLK_TOP_ARMPLL_1P3G, CLK_APMIXED_ARMPLL, 1, 1),
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D | clk-mt7629.c | 48 PLL(CLK_APMIXED_ARMPLL, 0x200, 0x20c, 0x1, 0,
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D | clk-mt8516.c | 37 PLL(CLK_APMIXED_ARMPLL, 0x0100, 0x0110, 0x00000001, 0,
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D | clk-mt8518.c | 37 PLL(CLK_APMIXED_ARMPLL, 0x0100, 0x0110, 0x00000001,
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