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Searched refs:CLK_TOP_ATB_SEL (Results 1 – 2 of 2) sorted by relevance

/third_party/uboot/u-boot-2020.01/include/dt-bindings/clock/
Dmt7629-clk.h107 #define CLK_TOP_ATB_SEL 93 macro
/third_party/uboot/u-boot-2020.01/drivers/clk/mediatek/
Dclk-mt7629.c394 MUX_GATE(CLK_TOP_ATB_SEL, atb_parents, 0x90, 0, 2, 7),