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Searched refs:CLK_TOP_MEM_SEL (Results 1 – 5 of 5) sorted by relevance

/third_party/uboot/u-boot-2020.01/include/dt-bindings/clock/
Dmt7629-clk.h88 #define CLK_TOP_MEM_SEL 74 macro
Dmt7623-clk.h102 #define CLK_TOP_MEM_SEL 88 macro
/third_party/uboot/u-boot-2020.01/drivers/clk/mediatek/
Dclk-mt7623.c509 MUX_GATE(CLK_TOP_MEM_SEL, mem_parents, 0x40, 8, 1, 15),
604 GATE_INFRA(CLK_INFRA_M4U, CLK_TOP_MEM_SEL, 8),
607 GATE_INFRA(CLK_INFRA_RAMBUFIF, CLK_TOP_MEM_SEL, 14),
608 GATE_INFRA(CLK_INFRA_CPUM, CLK_TOP_MEM_SEL, 15),
Dclk-mt7629.c365 MUX_GATE(CLK_TOP_MEM_SEL, mem_parents, 0x40, 8, 1, 15),
/third_party/uboot/u-boot-2020.01/arch/arm/dts/
Dmt7629.dtsi124 <&topckgen CLK_TOP_MEM_SEL>,