Searched refs:CLK_TOP_SYSPLL1_D16 (Results 1 – 4 of 4) sorted by relevance
| /third_party/uboot/u-boot-2020.01/include/dt-bindings/clock/ |
| D | mt7629-clk.h | 41 #define CLK_TOP_SYSPLL1_D16 28 macro
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| D | mt7623-clk.h | 36 #define CLK_TOP_SYSPLL1_D16 23 macro
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| /third_party/uboot/u-boot-2020.01/drivers/clk/mediatek/ |
| D | clk-mt7629.c | 104 FACTOR0(CLK_TOP_SYSPLL1_D16, CLK_APMIXED_MAINPLL, 1, 32),
282 CLK_TOP_SYSPLL1_D16
296 CLK_TOP_SYSPLL1_D16,
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| D | clk-mt7623.c | 109 FACTOR1(CLK_TOP_SYSPLL1_D16, CLK_TOP_SYSPLL_D2, 1, 16),
302 CLK_TOP_SYSPLL1_D16,
410 CLK_TOP_SYSPLL1_D16,
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