Searched refs:CLK_TOP_SYSPLL2_D4 (Results 1 – 4 of 4) sorted by relevance
/third_party/uboot/u-boot-2020.01/drivers/clk/mediatek/ |
D | clk-mt7629.c | 106 FACTOR0(CLK_TOP_SYSPLL2_D4, CLK_APMIXED_MAINPLL, 1, 12), 205 CLK_TOP_SYSPLL2_D4, 219 CLK_TOP_SYSPLL2_D4, 232 CLK_TOP_SYSPLL2_D4, 260 CLK_TOP_SYSPLL2_D4,
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D | clk-mt7623.c | 111 FACTOR1(CLK_TOP_SYSPLL2_D4, CLK_TOP_SYSPLL_D3, 1, 4), 298 CLK_TOP_SYSPLL2_D4, 364 CLK_TOP_SYSPLL2_D4, 384 CLK_TOP_SYSPLL2_D4, 462 CLK_TOP_SYSPLL2_D4,
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/third_party/uboot/u-boot-2020.01/include/dt-bindings/clock/ |
D | mt7629-clk.h | 43 #define CLK_TOP_SYSPLL2_D4 30 macro
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D | mt7623-clk.h | 38 #define CLK_TOP_SYSPLL2_D4 25 macro
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