Searched refs:CLK_TOP_SYSPLL4_D2 (Results 1 – 4 of 4) sorted by relevance
/third_party/uboot/u-boot-2020.01/drivers/clk/mediatek/ |
D | clk-mt7629.c | 112 FACTOR0(CLK_TOP_SYSPLL4_D2, CLK_APMIXED_MAINPLL, 1, 14), 204 CLK_TOP_SYSPLL4_D2, 233 CLK_TOP_SYSPLL4_D2, 244 CLK_TOP_SYSPLL4_D2, 288 CLK_TOP_SYSPLL4_D2,
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D | clk-mt7623.c | 115 FACTOR1(CLK_TOP_SYSPLL4_D2, CLK_TOP_SYSPLL_D7, 1, 2), 266 CLK_TOP_SYSPLL4_D2, 290 CLK_TOP_SYSPLL4_D2, 299 CLK_TOP_SYSPLL4_D2, 383 CLK_TOP_SYSPLL4_D2, 411 CLK_TOP_SYSPLL4_D2,
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/third_party/uboot/u-boot-2020.01/include/dt-bindings/clock/ |
D | mt7629-clk.h | 49 #define CLK_TOP_SYSPLL4_D2 36 macro
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D | mt7623-clk.h | 42 #define CLK_TOP_SYSPLL4_D2 29 macro
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