Searched refs:CLK_TOP_SYSPLL_D5 (Results 1 – 4 of 4) sorted by relevance
/third_party/uboot/u-boot-2020.01/drivers/clk/mediatek/ |
D | clk-mt7623.c | 104 FACTOR0(CLK_TOP_SYSPLL_D5, CLK_APMIXED_MAINPLL, 1, 5), 113 FACTOR1(CLK_TOP_SYSPLL3_D2, CLK_TOP_SYSPLL_D5, 1, 2), 114 FACTOR1(CLK_TOP_SYSPLL3_D4, CLK_TOP_SYSPLL_D5, 1, 4), 189 CLK_TOP_SYSPLL_D5, 228 CLK_TOP_SYSPLL_D5, 428 CLK_TOP_SYSPLL_D5 440 CLK_TOP_SYSPLL_D5, 458 CLK_TOP_SYSPLL_D5,
|
D | clk-mt7629.c | 108 FACTOR0(CLK_TOP_SYSPLL_D5, CLK_APMIXED_MAINPLL, 1, 5), 154 CLK_TOP_SYSPLL_D5, 313 CLK_TOP_SYSPLL_D5 352 CLK_TOP_SYSPLL_D5,
|
/third_party/uboot/u-boot-2020.01/include/dt-bindings/clock/ |
D | mt7629-clk.h | 45 #define CLK_TOP_SYSPLL_D5 32 macro
|
D | mt7623-clk.h | 31 #define CLK_TOP_SYSPLL_D5 18 macro
|