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Searched refs:DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 (Results 1 – 19 of 19) sorted by relevance

/third_party/uboot/u-boot-2020.01/include/configs/km/
Dkm-mpc8360.h39 DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
Dkm-mpc83xx.h13 DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
Dkm-mpc832x.h45 #define CONFIG_SYS_DDR_CLK_CNTL (DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
Dkm-mpc8309.h79 #define CONFIG_SYS_DDR_CLK_CNTL (DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
/third_party/uboot/u-boot-2020.01/include/configs/
Dmpc8308_p1m.h43 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
DMPC832XEMDS.h67 #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
Dve8313.h92 #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
DMPC8308RDB.h40 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
DMPC8323ERDB.h67 #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
DMPC8313ERDB_NOR.h124 #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
DMPC8349EMDS.h57 | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
DMPC8349EMDS_SDRAM.h57 | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
DMPC8313ERDB_NAND.h152 #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
DMPC8315ERDB.h38 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
DMPC837XEMDS.h39 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
Dhrcon.h28 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
Dstrider.h28 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
/third_party/uboot/u-boot-2020.01/board/tqc/tqm834x/
Dtqm834x.c349 DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05; in set_ddr_config()
/third_party/uboot/u-boot-2020.01/include/
Dmpc83xx.h1308 #define DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 0x02000000 macro